CN101841390B - Transmission channel coding and multiplexing method and bit level processor - Google Patents
Transmission channel coding and multiplexing method and bit level processor Download PDFInfo
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Abstract
The embodiment of the invention discloses a transmission channel coding and multiplexing method and a bit level processor. Through redistricting, extracting and combining transmission channel coding and multiplexing processes in a 3 GPP Release4 standard and a 3 GPP Release5 standard in the prior art, the invention provides a channel coding and multiplexing method suitable for the 3 GPP Release4 standard and the 3 GPP Release5 standard and also provides a bit level processor corresponding to the channel coding and multiplexing method. The bit level processor can realize the channel coding and multiplexing processes in the 3 GPP Release4 standard and the 3 GPP Release5 standard through the same hardware resources, and due to the simplification of the coding and multiplexing processes, a corresponding hardware module is reduced relative to the traditional bit level processor in the aspect of hardware realization, thereby the waste of the hardware resources, the area of a baseband chip and the power consumption of the baseband chip are reduced.
Description
Technical field
The present invention relates to field moving communicating field, more particularly, relate to a kind of transmission channel coding and multiplexing method and bit level processor.
Background technology
In TD-SCDMA system, in order to guarantee the transmitting of data in wireless link, physical layer need to be to carrying out sending after rate matching from MAC and high-rise data flow again.Simultaneously physical layer to receive from the data on wireless link need to decode with demultiplexing after, then send MAC and high level to.Wherein transmission channel coding multiplex process and decoding demultiplexing process are all to realize by the bit level processor on baseband chip.
In 3GPP Release4 standard, to providing as follows of transmission channel coding and multiplex process:
1) each transmission block is added to CRC;
2) transmission block cascade/code block segmentation;
3) chnnel coding;
4) radio frames is balanced;
5) interweave for the first time;
6) radio frame segmentation;
7) rate-matched;
8) transmission channel is multiplexing;
9) bit scramble;
10) physical channel segmentation;
11) interweave for the second time;
12) subframe segmentation;
13) physical channel mapping.
In 3GPP Release5 standard, the providing as follows of the chnnel coding of HS-DSCH and multiplex process:
1) each code block is added to CRC;
2) code block segmentation;
3) chnnel coding;
4) physical layer H-APQ function;
5) bit scramble;
6) HS-DSCH interweaves;
7) 16QAM constellation rearrangement;
8) physical channel mapping.
In 3GPP Release4 standard and 3GPP Release5 standard, physical layer is the inverse process of rate matching process to the decoding reconciliation multiplex process receiving from the data on wireless link.
By the research to prior art, inventor finds: in prior art, 3GPP Release4 standard is not used mutually with the chnnel coding multiplex process of 3GPP Release5 standard, on realizing, hardware needs to be respectively 3GPP Release4 standard and the corresponding bit level processor of 3GPP Release5 standard configuration, the corresponding baseband chip of 3GPPRelease4 standard and the corresponding baseband chip of 3GPP Release5 standard can not be general, cause the waste of hardware resource, also caused the increase of baseband chip power consumption simultaneously.
Summary of the invention
For solving the problems of the technologies described above, the invention provides a kind of chnnel coding and multiplexing method and corresponding bit level processor that can simultaneously be applicable to 3GPP Release4 standard and 3GPP Release5 standard, to realize the waste that reduces sheet hardware resource, reduce the area of baseband chip simultaneously, reduce the power consumption of baseband chip.
A kind of chnnel coding and multiplexing method that the embodiment of the present invention provides, comprising:
Transmission block is processed;
Chnnel coding;
Radio frames is processed for the first time;
Transmission channel is processed;
Radio frames is processed for the second time;
The physical channel of 16QAM is processed.
The embodiment of the present invention also provides a kind of bit level processor, and this processor comprises:
Parameters R AM unit, data RAM unit, control module unit, code multiplexing unit;
Described code multiplexing unit comprises: transmission block processing unit, chnnel coding unit, radio frames processing unit, transmission channel processing unit, the physical channel processing unit of radio frames processing unit and 16QAM for the second time for the first time;
Described control module unit for reading parameter from parameters R AM unit, reads the data that need code multiplexing from data RAM unit, and according to parameter call code multiplexing unit;
Described transmission block processing unit, for carrying out transmission block processing to the data that receive from control module unit;
Described chnnel coding unit, carries out chnnel coding for the data after transmission block is processed;
The described processing unit of radio frames for the first time, carries out radio frames for the first time for the data to after chnnel coding and processes;
Described transmission channel processing unit, carries out transmission channel processing for the data after the data to after chnnel coding or radio frames processing for the first time;
The described processing unit of radio frames for the second time, carries out radio frames for the second time for the data after transmission channel is processed and processes;
The physical channel processing unit of described 16QAM, processes for the data after radio frames processing for the second time being carried out to the physical channel of 16QAM, and the data after processing is sent to control module unit.
The technical scheme that the application embodiment of the present invention provides, by transmission channel coding and multiplex process in 3GPP Release4 standard in prior art and 3GPP Release5 standard repartitioned and extract merging, a kind of chnnel coding and multiplexing method that is simultaneously applicable to 3GPP Release4 standard and 3GPP Release5 standard is provided, and correspondence provides a kind of bit level processor of realizing the method, bit level processor on this baseband chip goes for the transmission channel coding of 3GPP Release4 standard and 3GPP Release5 standard and multiplexing, and the simplification due to coding and multiplex process, the existing bit level processor that compares on hardware is realized has reduced corresponding hardware module, therefore reduced the waste of hardware resource, reduced the area of baseband chip, reduced the power consumption of baseband chip.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is chnnel coding and the multiplexing method schematic flow sheet of the 3GPP Release4 standard after the embodiment of the present invention is repartitioned;
Fig. 2 is chnnel coding and the multiplexing method schematic flow sheet of the 3GPP Release5 standard after the embodiment of the present invention is repartitioned;
Fig. 3 is chnnel coding and the multiplexing method schematic flow sheet that is applicable to 3GPP Release4 standard and 3GPP Release5 standard in the embodiment of the present invention;
The structural representation of the bit level processor that Fig. 4 provides for the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
First the English that may use in the embodiment of the present invention is write a Chinese character in simplified form and described.
3GPP:3rd Generation Partnership Project, third generation partner program.
CTC:Centralized Traffic Control System, dispatching concentration.
CRC:Cyclical Redundancy Check, cyclic redundancy code.
DSCH:Down-Link Shared Channel, DSCH Downlink Shared Channel.
HSDPA:High Speed Downlink Packet Access, high speed downlink packet access.
HARQ:Hybrid Auto Repeat Request, mixed automatic retransfer request.
MAC:Media Access Control, medium access control.
MUX:Multiplexer, multiway analog switch.
QAM:Quadrature Amplitude Modulation, quadrature amplitude modulation.
RAM:random access memory, random asccess memory.
TD-SCDMA:Time Division-Synchronous Code Division Multiple Access, TD SDMA.
Embodiment mono-:
Shown in Figure 1, be transmission channel coding and multiplexing method schematic flow sheet in the 3GPP Release4 standard after repartitioning.
According to algorithm and hard-wired feature, transmission channel coding and multiplex process in former 3GPP Release4 standard can be repartitioned, after repartitioning, this process comprises the following steps:
S101, transmission block is processed.
This step is equivalent to the step of transmission channel coding and multiplex process in former 3GPP Release4 standard and " each transmission block is added to CRC, transmission block cascade, code block segmentation ".
For each transmission block adds cyclic redundancy check code, by the cyclic redundancy check (CRC) on transmission block, can realize error detection occurs function.In a Transmission Time Interval, all transmission blocks are all that concatenated in order is got up, if the bit number in the time interval is greater than the full-size of code block, so, after transmission block cascade, will carry out code block segmentation to bit sequence, the code block after segmentation has identical length.
In former 3GPP Release4 standard transmission chnnel coding and multiplex process, to realize each transmission block is added to CRC according to preset formula operation by the bit sequence in transmission block, the process of transmission block cascade and code block segmentation, by the merging abbreviation to described formula, and the control with data writing process of reading to RAM, the step of transmission channel coding and multiplex process in former 3GPP Release4 standard " can be added to CRC to each transmission block, transmission block cascade and code block segmentation " merge into transmission block and process, further can in a hardware module, realize each transmission block is added to CRC, transmission block cascade, code block segmentation.
S102, chnnel coding.
Code block is sent to chnnel coding functional module and encodes.This step is identical with " chnnel coding " in former 3GPP Release4 standard.
S103, radio frames is processed for the first time.
This step is equivalent to the step " radio frames is balanced, interweave for the first time, radio frame segmentation " of transmission channel coding and multiplex process in former 3GPP Release4 standard.
The effect of radio frames equilibrium be guarantee input bit sequence can mean allocation on corresponding radio frames, specifically by input bit sequence is filled, be achieved.The effect interweaving is to overcome paroxysmal mistake, and interweaving is for the first time the block interleaver of displacement between row, before radio frame segmentation, is to carry out for the data flow after radio frames equilibrium.The bit sequence of input is by segmentation and be mapped in continuous radio frames.
In former 3GPP Release4 standard transmission chnnel coding and multiplex process, be by the bit sequence in radio frames according to preset formula operation realize radio frames equilibrium, interweave for the first time, radio frame segmentation process, by the merging abbreviation to described formula with by can realize radio frames equilibrium in a hardware module to the control of the reading address of RAM, interweave for the first time, radio frame segmentation.
S104, transmission channel is processed.
This step is equivalent to the step " rate-matched, transmission channel multiplexing " of transmission channel coding and multiplex process in former 3GPP Release4 standard.
The effect of rate-matched is to guarantee that the multiplexing rear total bit rate of transmission channel is identical with total bit rate of distributed DPCH, and when the bit number transmitting in different delivery time intervals changes, bit will be retransmitted or be punched.Transmission channel is multiplexing is to deliver in transmission channel Multiplexing module from the radio frames of each transmission channel, and these radio frames are by continuous being multiplexed in a coding transmission channel.Wherein the multiplexing process of rate-matched and transmission channel is passed through to merge and abbreviation, by utilizing rate-matched result and coding transmission channel information co-controlling counter to realize, can realize by a public hardware module.
S105, radio frames is processed for the second time.
This step be equivalent to transmission channel coding and multiplex process in former 3GPP Release4 standard step " bit scramble, physical channel segmentation, for the second time interweave and subframe segmentation ".
The output bit of transmission channel multiplexer scrambled code in bit scrambler.When using more than one physical channel, physical channel segmentation is assigned to bit in different physical channels.Interweaving is for the second time a block interleaver, after frame is cut apart, carries out, and comprises the bit that is input to a matrix after filling up, displacement and the matrix bit output after deleting between matrix column.When the length of the time slot of coded combination transmission channel is greater than 5ms, need between interleave unit and physical channel map unit, increase for the second time a subframe segmenting unit.All operations in this step is all that the bit stream computing of the radio frames in coding transmission channel is carried out, therefore can carry out merging and abbreviation and the control with data writing process of reading to RAM to these operational formulas, and can realize bit scramble, physical channel segmentation, interweave and subframe segmentation for the second time by a hardware module.
S106, physical channel mapping.
The bit stream of subframe segmenting unit is mapped on the code channel in subframe gap; This step is identical with " physical channel mapping " in former 3GPPRelease4 standard.
3GPP Release5 has proposed HSDPA technology during with respect to one of 3GPP Release4 main improvement, makes downstream rate can reach 8-10Mbps, has greatly improved the efficiency of air interface.In order to support HSDPA, TD-SCDMA system has increased HS-DSCH channel with carrying high-speed downstream business datum.The chnnel coding of the HS-DSCH increasing and transmitting procedure are due to self character, reduced transmission block cascade, radio frames balanced, interweave for the first time, radio frame segmentation, transmission channel are multiplexing, physical channel segmentation and subcode are cut apart process, increased that physical layer HAPQ, HS-DSCH interweave and the process of 16QAM constellation rearrangement.
Shown in Figure 2, be chnnel coding and the multiplexing method schematic flow sheet of HS-DSCH in the 3GPP Release5 standard after repartitioning.
According to algorithm and hard-wired feature, chnnel coding and the multiplex process of HS-DSCH in 3GPP Release5 standard can be repartitioned, after repartitioning, this process comprises the following steps:
S201, transmission block is processed.
This step is equivalent to the step of transmission channel coding and multiplex process in former 3GPP Release5 standard and " each transmission block is added to CRC, code block segmentation ".
Error detection occurs function is to realize by the cyclic redundancy check (CRC) on transmission block.If the bit number in the time interval is greater than the full-size of code block, so, after transmission block cascade, will carry out code block segmentation to bit sequence.
In former 3GPP Release5 standard transmission chnnel coding and multiplex process, to realize each transmission block is added to CRC according to preset formula operation by the bit sequence in transmission block, the process of code block segmentation, by the merging abbreviation to described formula, and the control with data writing process of reading to RAM, the step of transmission channel coding and multiplex process in former 3GPP Release5 standard " can be added to CRC to each transmission block, code block segmentation " merge into transmission block and process, further can in a hardware module, realize each transmission block is added to CRC, code block segmentation.
S202, chnnel coding.
Code block is sent to chnnel coding functional module and encodes.This step is identical with " chnnel coding " in former 3GPP Release5 standard.
S203, physical layer HARQ.
Physical layer HARQ can provide the adjusting coupling of accurate speed based on channel condition.This step is identical with " physical layer HARQ " in former 3GPP Release5 standard.
S204, radio frames is processed.
This step is equivalent to the step " bit scramble, HS-DSCH interweave " of transmission channel coding and multiplex process in former 3GPP Release5 standard.
The output bit of transmission channel multiplexer scrambled code in bit scrambler.HS-DSCH interweaves and can first to list entries, be divided into two sequences, then each sequence is interweaved.All operations in this step is all that the bit stream computing of the radio frames in coding transmission channel is carried out, therefore can further in a hardware module, realize bit scramble by these operational formulas being carried out to merging and abbreviation and the control with data writing process of reading to RAM, HS-DSCH interweaves.
The output bit of transmission channel multiplexer scrambled code in bit scrambler.HS-DSCH interweaves with realizing the bit sequence in transmission channel is spread out.
S205, the physical channel of 16QAM is processed.
This step is equivalent to the step " 16QAM constellation rearrangement, physical channel mapping " of transmission channel coding and multiplex process in former 3GPP Release5 standard.
16QAM constellation rearrangement is realized by the information exchanging on different bit positions; The bit stream of subframe segmenting unit is mapped on the code channel in subframe gap, and the operation in this step is all that the bit stream after radio frames is processed carries out, and can in a hardware module, realize.
In 3GPP Release5 standard by the transmission channel coding multiplex process of the 3GPP Release4 standard after repartitioning and after repartitioning, the chnnel coding multiplex process of HS-DSCH is known, in this two process, there is the step that class Sihe is identical, can the step in this two process be merged, it is multiplexing that step after merging both can realize the transmission channel coding of 3GPP Release4 standard, and the chnnel coding that also can realize HS-DSCH in 3GPPRelease5 standard is multiplexing.
Shown in Figure 3, for merging chnnel coding and the signal of multiplexing method flow process in rear applicable 3GPP Release4 standard and 3GPP Release5 standard.The method comprises the following steps:
S301, transmission block is processed.
This step is equivalent to " each transmission block is added to CRC, transmission block cascade and code block segmentation " and " each transmission block is added to CRC, code block segmentation " in 3GPP Release5 standard in 3GPP Release4 standard.
For each transmission block adds cyclic redundancy check code, by the cyclic redundancy check (CRC) on transmission block, can realize error detection occurs function.In a Transmission Time Interval, all transmission blocks are all that concatenated in order is got up, if the bit number in the time interval is greater than the full-size of code block, so, after transmission block cascade, will carry out code block segmentation to bit sequence, the code block of segmentation has identical length.
S302, chnnel coding.
Code block is sent to chnnel coding functional module and encodes.
S303, radio frames is processed for the first time.
Radio frames is balanced, interweave for the first time, radio frame segmentation.
The effect of radio frames equilibrium be guarantee input bit sequence can mean allocation on corresponding radio frames, specifically by input bit sequence is filled, be achieved.The effect interweaving is to overcome paroxysmal mistake, and interweaving is for the first time the block interleaver of displacement between row, before radio frame segmentation, is to carry out for the data flow after radio frames equilibrium.The bit sequence of input is by segmentation and be mapped in continuous radio frames.This step is applicable to transmission channel coding and the multiplex process in 3GPP Release4 standard.Chnnel coding in 3GPPRelease5 standard and multiplex process be without carrying out this step operation, in actual motion without carrying out this step.
S304, transmission channel is processed.
This step is equivalent to " rate-matched, transmission channel are processed " and " the physical layer HARQ " in 3GPP Release5 standard in 3GPP Release4 standard.
The effect of rate-matched is to guarantee that the multiplexing rear total bit rate of transmission channel is same with total bit rate realization of the DPCH of distributing, and when the bit number transmitting in different delivery time intervals changes, bit is by retransmitted or punching.Transmission channel is multiplexing is to deliver in transmission channel Multiplexing module from the radio frames of each transmission channel, and these radio frames are by continuous being multiplexed in a coding transmission channel.
In 3GPP Release5 standard, physical layer HARQ can provide the adjusting coupling of accurate speed based on channel condition, so described rate-matched comprises the physical layer HARQ in 3GPP Release5 standard, can be realized by identical hardware module rate-matched in 3GPP Release4 standard and the physical layer HARQ in 3GPPRelease5 standard.
S305, radio frames is processed for the second time.
This step be equivalent in 3GPP Release4 standard " bit scramble, physical channel segmentation, for the second time interweave and subframe segmentation " and 3GPP Release5 standard in " bit scramble, HS-DSCH interweave ".
The output bit of transmission channel multiplexer scrambled code in bit scrambler.When using more than one physical channel, physical channel segmentation will be assigned in different physical channels by bit.Interweaving is for the second time a block interleaver, comprises the bit that is input to a matrix after filling up, displacement and the matrix bit output after deleting between matrix column.When the length of the time slot of coded combination transmission channel is greater than 5ms, need between interleave unit and physical channel map unit, increase for the second time a subframe segmenting unit.
HS-DSCH interweaves and can first to list entries, be divided into two sequences, then each sequence is interweaved, HS-DSCH interweave with in 3GPP Release4 standard, interweave to realize principle identical, therefore can be realized by identical hardware module in 3GPP Release4 standard interweave for the second time and 3GPP Release5 standard in HS-DSCH interweave.
S306, the physical channel of 16QAM is processed.
This step is equivalent to " physical channel mapping " and " 16QAM constellation rearrangement, the physical channel mapping " in 3GPPRelease5 standard in 3GPP Release4 standard.
16QAM constellation rearrangement is realized by the information exchanging on different bit positions; The bit stream of subframe segmenting unit is mapped on the code channel in subframe gap.Wherein: 16QAM constellation rearrangement is applicable to transmission channel coding and the multiplex process in 3GPPRelease5 standard, the chnnel coding in 3GPP Release4 standard and multiplex process be without carrying out this step operation, in actual motion without carrying out this step.
The present embodiment by chnnel coding and multiplex process in 3GPP Release4 standard in prior art and 3GPP Release5 standard repartition and extract merging, a kind of chnnel coding and multiplexing method that is simultaneously applicable to 3GPPRelease4 standard and 3GPP Release5 standard is provided.
By the description of above embodiment of the method, those skilled in the art can be well understood to the mode that the present invention can add essential general hardware platform by software and realize, can certainly pass through hardware, but in a lot of situation, the former is better execution mode.Understanding based on such, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in a storage medium, comprise that some instructions are with so that a computer equipment (can be personal computer, server, or the network equipment etc.) carry out all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as read-only memory (ROM), random access memory (RAM), magnetic disc or CDs.
Embodiment bis-:
Corresponding to embodiment of the method above, the present invention also provides the bit level processor in a kind of baseband chip that can realize above-mentioned chnnel coding and multiplex process, and shown in Figure 4, described bit level processor comprises:
Parameters R AM unit 401, data RAM unit 402, control module unit 403, code multiplexing unit;
Described code multiplexing unit comprises: transmission block processing unit 404, chnnel coding unit 405, radio frames processing unit 406, transmission channel processing unit 407, the physical channel processing unit 409 of radio frames processing unit 408 and 16QAM for the second time for the first time.
Described control module unit 403 for reading parameter from parameters R AM unit 401, reads the data of wanting code multiplexing from data RAM unit 402, and according to six code multiplexing unit of parameter call; Control control module unit 403 sends to corresponding code multiplexing unit by the data from getting according to ram cell 402 and processes, and the data from code multiplexing cell processing are sent to data RAM unit 402.
Described transmission block processing unit 404, for the data that receive from control module unit are carried out to transmission block processing, adds CRC, transmission block cascade, code block segmentation for realizing to each transmission block.
Described chnnel coding unit 405, carries out chnnel coding for the data after transmission block is processed.
The described processing unit of radio frames for the first time 406, carries out for the first time radio frames for the data to after chnnel coding and processes, for realizing radio frames equilibrium, interweave for the first time, radio frame segmentation; In 3GPPRelease5 standard, can not use this unit.
Described transmission channel processing unit 407, for the data after the data after chnnel coding or radio frames processing are for the first time carried out to transmission channel processing, for realizing rate-matched, transmission channel is multiplexing, in 3GPP Release5 standard, described rate-matched is physical layer HARQ.
The described processing unit of radio frames for the second time 408, for the data after transmission channel is processed, carrying out radio frames for the second time processes, for realizing bit scramble, physical channel segmentation, interweaving and subframe segmentation for the second time, the described processing unit of radio frames for the second time in 3GPP Release5 standard only for realizing bit scramble, HS-DSCH interweaves.
The physical channel processing unit 409 of described 16QAM, for the data after radio frames processing for the second time being carried out to the physical channel of 16QAM, process, and the data after processing are sent to control module unit 403, for realizing 16QAM constellation rearrangement, physical channel mapping, in 3GPP Release4 standard, the physical channel processing unit of described 16QAM is only for realizing reason channel mapping.
Six code multiplexing unit correspondences of described bit level processor are repartitioned six treatment steps of the chnnel coding multiplex process after merging.Described bit level processor can also be by arranging MUX circuit between rate matching module, by register being added to input branch, increase the different piece that combinational logic is optionally realized chnnel coding and multiplex process in 3GPP Release4 standard and 3GPP Release5 standard.
Due to the decoding of transmission channel, conciliating multiplex process is the inverse process of rate matching process, and the bit level processor that therefore can be provided by the present embodiment is realized decoding and the demultiplexing of transmission channel.
The bit level processor that the present embodiment provides can be realized chnnel coding and multiplex process in 3GPPRelease4 standard and 3GPP Release5 standard by identical hardware resource, and the simplification due to coding and multiplex process, the existing bit level processor that compares on hardware is realized has reduced corresponding hardware module, therefore reduced the waste of hardware resource, reduce the area of baseband chip, reduced the power consumption of baseband chip.
For device or system embodiment, because it is substantially corresponding to embodiment of the method, so relevant part is referring to the part explanation of embodiment of the method.Device described above or system embodiment are only schematic, the wherein said unit as separating component explanation can or can not be also physically to separate, the parts that show as unit can be or can not be also physical locations, can be positioned at a place, or also can be distributed in a plurality of network element.Can select according to the actual needs some or all of module wherein to realize the object of the present embodiment scheme.Those of ordinary skills, in the situation that not paying creative work, are appreciated that and implement.
In the several embodiment that provide in the application, should be understood that, disclosed system, apparatus and method, not surpassing in the application's spirit and scope, can realize in other way.Current embodiment is a kind of exemplary example, should be as restriction, and given particular content should in no way limit the application's object.For example, the division of described unit or subelement, is only that a kind of logic function is divided, and during actual realization, can have other dividing mode, and for example a plurality of unit or a plurality of subelement combine.In addition, a plurality of unit can or assembly can in conjunction with or can be integrated into another system, or some features can ignore, or do not carry out.
In addition, institute's descriptive system, the schematic diagram of apparatus and method and different embodiment, within not exceeding the application's scope, can with other system, module, technology or method in conjunction with or integrated.Another point, shown or discussed coupling each other or direct-coupling or communication connection can be by some interfaces, indirect coupling or the communication connection of device or unit can be electrically, machinery or other form.
The above is only the specific embodiment of the present invention; it should be pointed out that for those skilled in the art, under the premise without departing from the principles of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.
Claims (4)
1. transmission channel coding and a multiplexing method, is characterized in that, is applicable to 3GPP release4 standard and 3GPP release5 standard, comprising:
Transmission block is processed;
Chnnel coding;
Radio frames is processed for the first time, and wherein, described radio frames is for the first time processed and comprised: radio frames is balanced,
Interweave for the first time and radio frame segmentation, described interweaving is for the first time before described radio frame segmentation, and the data flow after described radio frames equilibrium is carried out;
Data after described chnnel coding or radio frames processing are for the first time carried out to transmission channel processing, comprising: the physical layer HARQ in the rate-matched in 3GPP Release4 standard, transmission channel processing and 3GPP Release5 standard;
Radio frames is processed for the second time, comprising: the bit scramble in 3GPP Release4 standard, physical channel segmentation, for the second time interweave and subframe segmentation and 3GPP Release5 standard in bit scramble, HS-DSCH interweave;
The physical channel of 16QAM is processed, and comprising: the physical channel mapping in 3GPP Release4 standard and the 16QAM constellation rearrangement in 3GPP Release5 standard, physical channel mapping;
Wherein, above arbitrary treatment step is only carried out in a hardware module;
Wherein, above arbitrary treatment step is by chnnel coding and multiplex process in 3GPP Release4 standard and 3GPP Release5 standard repartitioned and extract merging.
2. method according to claim 1, is characterized in that, described transmission block is processed, and comprising:
Each transmission block is added to CRC;
Transmission block cascade;
Code block segmentation.
3. a bit level processor, is characterized in that, described processor is applicable to the transmission channel of 3GPP release4 standard and 3GPP release5 standard and multiplexing, and this processor comprises:
Parameters R AM unit, data RAM unit, control module unit, code multiplexing unit;
Described code multiplexing unit comprises: transmission block processing unit, chnnel coding unit, radio frames processing unit, transmission channel processing unit, the physical channel processing unit of radio frames processing unit and 16QAM for the second time for the first time;
Described control module unit for reading parameter from parameters R AM unit, reads the data that need code multiplexing from data RAM unit, and according to parameter call code multiplexing unit;
Described transmission block processing unit, for carrying out transmission block processing to the data that receive from control module unit;
Described chnnel coding unit, carries out chnnel coding for the data after transmission block is processed;
The described processing unit of radio frames for the first time, for the data after chnnel coding being carried out to radio frames for the first time, process, wherein, described radio frames is for the first time processed and is comprised: radio frames is balanced, interweave for the first time and radio frame segmentation, described interweaving is for the first time before described radio frame segmentation, and the data flow after described radio frames equilibrium is carried out;
Described transmission channel processing unit, for to the data after chnnel coding or for the first time the data of radio frames after processing carry out transmission channel processing, for realize that rate-matched, the transmission channel of 3GPP Release4 standard processed and 3GPP Release5 standard in physical layer HARQ;
The described processing unit of radio frames for the second time, for the data after transmission channel is processed, carry out radio frames for the second time and process, for realize the bit scramble, physical channel segmentation of 3GPP Release4 standard, for the second time interweave and subframe segmentation and 3GPP Release5 standard in bit scramble, HS-DSCH interweave;
The physical channel processing unit of described 16QAM, for the data after radio frames processing for the second time being carried out to the physical channel of 16QAM, process, and the data after processing are sent to control module unit, for realizing the physical channel mapping of 3GPP Release4 standard and 16QAM constellation rearrangement, the physical channel in 3GPP Release5 standard, shine upon;
Wherein, above arbitrary processing unit is for repartitioning and extract merging to 3GPP Release4 standard and 3GPP Release5 standard chnnel coding and multiplex process.
4. bit level processor according to claim 3, is characterized in that, described control module unit comprises:
MUX circuit;
Described MUX circuit is for optionally calling code multiplexing unit according to the parameter information getting from parameters R AM unit.
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| CN105281868B (en) * | 2014-07-10 | 2018-05-22 | 普天信息技术有限公司 | A kind of sending method and device based on code block grouping |
| EP3902142A1 (en) | 2016-05-12 | 2021-10-27 | MediaTek Inc. | Qc-ldpc coding methods and apparatus |
| US10581457B2 (en) | 2017-01-09 | 2020-03-03 | Mediatek Inc. | Shift coefficient and lifting factor design for NR LDPC code |
| US10630319B2 (en) | 2017-01-24 | 2020-04-21 | Mediatek Inc. | Structure of interleaver with LDPC code |
| US10432227B2 (en) * | 2017-01-24 | 2019-10-01 | Mediatek Inc. | Location of interleaver with LDPC code |
| US10567116B2 (en) | 2017-05-12 | 2020-02-18 | Mediatek Inc. | Wireless communication using codebooks from a QC-LDPC code for shorter processing latency and improved decoder throughput efficiency |
| US10484011B2 (en) | 2017-05-12 | 2019-11-19 | Mediatek Inc. | Shift-coefficient table design of QC-LDPC code for larger code block sizes in mobile communications |
| US10484013B2 (en) | 2017-05-12 | 2019-11-19 | Mediatek Inc. | Shift-coefficient table design of QC-LDPC code for smaller code block sizes in mobile communications |
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