CN101833931A - Liquid crystal display device - Google Patents
Liquid crystal display device Download PDFInfo
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- CN101833931A CN101833931A CN 201010203315 CN201010203315A CN101833931A CN 101833931 A CN101833931 A CN 101833931A CN 201010203315 CN201010203315 CN 201010203315 CN 201010203315 A CN201010203315 A CN 201010203315A CN 101833931 A CN101833931 A CN 101833931A
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Abstract
The invention discloses a liquid crystal display device comprising a source driver, a grid driver, a pixel array unit and a grid pulse modulation unit, wherein the source driver is used for providing a plurality of data signals, the grid driver is used for providing a plurality of grid signals according to the modulation voltage of a high-potential grid signal, and the pixel array unit is used for displaying images according to the data signals and the grid signals. In addition, the grid driver can execute shutdown ghost attenuation operation on the pixel array unit according to a reset signal. The grid pulse modulation unit is used for providing the modulation voltage of the high-potential grid signal and executing waveform chamfering operation on the grid signals according to the modulation voltage of the high-potential grid signal. The waveform chamfering operation has a voltage clamping function controlled by the reset signal, and the voltage clamping function is disabled within a preset time interval after the liquid crystal display device is started up.
Description
Technical field
The present invention relates to a kind of liquid crystal indicator, refer to a kind of liquid crystal indicator of avoiding start-up picture generation noise phenomenon especially.
Background technology
Liquid crystal indicator (Liquid Crystal Display; LCD) have that external form is frivolous, advantages such as power saving and low radiation, therefore be widely used on the electronic products such as computer screen, mobile phone, PDA(Personal Digital Assistant), flat-surface television and other communication/amusement equipment.The voltage difference that the principle of work utilization of liquid crystal indicator changes the liquid crystal layer two ends changes the ordered state of the liquid crystal molecule in the liquid crystal layer, changes the light transmission of liquid crystal layer according to this, and the light source that cooperates backlight module again and provided is with show image.Fig. 1 is the synoptic diagram of known liquid crystal indicator.As shown in Figure 1, liquid crystal indicator 10 comprises pixel-array unit 100, source electrode driver 104, gate drivers 106 and grid-pulse modulation (GatePulse Modulation) unit 120 with a plurality of pixel PX.Source electrode driver 104 is used to provide a plurality of data-signals to pixel-array unit 100.Gate drivers 106 is used for according to noble potential grid signal modulation voltage VGHM and electronegative potential signal reference voltage VGL providing a plurality of signals to pixel-array unit 100, and pixel-array unit 100 promptly according to a plurality of data-signals and a plurality of signal with show image.Gate drivers 106 can be carried out the power-off ghost shadow attenuation operation to pixel-array unit 100 according to reset signal XON in addition.
Grid pulse modulation unit 120 is used to provide noble potential grid signal modulation voltage VGHM.Grid pulse modulation unit 120 comprises phase inverter 140, the first transistor 130, transistor seconds 135, resistance R x and diode 125.Phase inverter 140, the first transistor 130, transistor seconds 135 are used for according to top rake control signal VFLK noble potential grid signal modulation voltage VGHM is drop-down from noble potential signal reference voltage VGH with resistance R x, carry out the waveform chamfering running of signal according to this, 125 of diodes make the waveform chamfering running have voltage clamp function according to clamping voltage Vclamp.In the running of liquid crystal indicator 10, in the scheduled time slot after start, clamping voltage Vclamp can rise to the input voltage current potential and soon through diode 125 feed-in gate drivers 106, but this moment, electronegative potential signal reference voltage VGL did not set up operating potential as yet, so gate drivers 106 can't be carried out the normal logic running, thereby produces a plurality of noise likes (noise-like) signal.Again since the reset signal XON of this moment can activation gate drivers 106 export all signals to pixel-array unit 100 simultaneously, that is a plurality of noise like signals that produced in the scheduled time slot of gate drivers 106 after start all can feed-in pixel-array unit 100, the noise phenomenon that so can cause start-up picture, in other words, this noise phenomenon because of voltage clamp function in the start scheduled time slot just be enabled the institute cause.
Summary of the invention
Disclose a kind of liquid crystal indicator of avoiding start-up picture generation noise phenomenon according to embodiments of the invention, it comprises pixel-array unit, source electrode driver, gate drivers and grid pulse modulation unit.Pixel-array unit is used for carrying out image and shows running.Source electrode driver is electrically connected on pixel-array unit, is used to provide pixel-array unit and carries out a plurality of data-signals that image shows that running is required.Gate drivers is electrically connected on pixel-array unit, be used for carrying out a plurality of signals that image shows that running is required so that pixel-array unit to be provided, and be used for pixel-array unit being carried out the power-off ghost shadow attenuation operation according to reset signal according to noble potential grid signal modulation voltage.Grid pulse modulation unit is electrically connected on gate drivers, is used to provide noble potential grid signal modulation voltage, and grid pulse modulation unit has the voltage clamp function that is controlled by reset signal.In the running of liquid crystal indicator, in the scheduled time slot after the liquid crystal indicator start, reset signal is that first state is with the decapacitation voltage clamp function, behind scheduled time slot, reset signal switches to second state of first state that differs from, activation voltage clamp function according to this.
Disclose a kind of liquid crystal indicator of avoiding start-up picture generation noise phenomenon in addition according to embodiments of the invention, it comprises source electrode driver, gate drivers, pixel-array unit and grid pulse modulation unit.Source electrode driver is used to provide a plurality of data-signals.Gate drivers is used for according to noble potential grid signal modulation voltage so that a plurality of signals to be provided.Pixel-array unit is electrically connected on source electrode driver and gate drivers, is used for according to a plurality of data-signals and a plurality of signal with show image.Grid pulse modulation unit is electrically connected on gate drivers, is used to provide noble potential grid signal modulation voltage, and grid pulse modulation unit has to be controlled by selects the voltage of signals clamp function.In the running of liquid crystal indicator, in the scheduled time slot after the liquid crystal indicator start, selecting signal is that first state is with the decapacitation voltage clamp function, behind scheduled time slot, the selection signal switches to second state of first state that differs from, activation voltage clamp function according to this.
Description of drawings
Fig. 1 is the synoptic diagram of known liquid crystal indicator;
Fig. 2 is the structural representation of first embodiment of liquid crystal indicator of the present invention;
Fig. 3 is the structural representation of second embodiment of liquid crystal indicator of the present invention;
Fig. 4 is the structural representation of the 3rd embodiment of liquid crystal indicator of the present invention;
Fig. 5 is the structural representation of the 4th embodiment of liquid crystal indicator of the present invention;
Fig. 6 is the structural representation of the 5th embodiment of liquid crystal indicator of the present invention;
Fig. 7 is the structural representation of the 6th embodiment of liquid crystal indicator of the present invention;
Fig. 8 is the structural representation of the 7th embodiment of liquid crystal indicator of the present invention;
Fig. 9 is the structural representation of the 8th embodiment of liquid crystal indicator of the present invention.
Wherein, Reference numeral
10,20,30,40,50,60,70,80,90 liquid crystal indicators
100,200 pixel-array unit
104,204 source electrode drivers
106,206 gate drivers
120,220,320,420,520,620,720,820,920 grid pulse modulation unit
125,225,325 diodes
130,230 the first transistors
135,235 transistor secondses
140,240 phase inverters
250,450,550,650,750,850,950 selector switchs
451,551,851,951 the 3rd transistors
453,553,853,953 the 4th transistors
The PX pixel
Rx resistance
Ssel selects signal
The Vclamp clamping voltage
VFLK top rake control signal
VGH noble potential signal reference voltage
VGHM noble potential grid signal modulation voltage
VGL electronegative potential signal reference voltage
The Vref reference potential
The XON reset signal
Embodiment
Hereinafter cooperate appended accompanying drawing to elaborate especially exemplified by embodiment according to liquid crystal indicator of the present invention, but the scope that the embodiment that is provided is not contained in order to restriction the present invention.
Fig. 2 is the structural representation of first embodiment of liquid crystal indicator of the present invention.As shown in Figure 2, liquid crystal indicator 20 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and the grid pulse modulation unit 220 with a plurality of pixel PX.Source electrode driver 204 is used to provide a plurality of data-signals to pixel-array unit 200.Gate drivers 206 is used for according to noble potential grid signal modulation voltage VGHM and electronegative potential signal reference voltage VGL providing a plurality of signals to pixel-array unit 200, and pixel-array unit 200 promptly drives a plurality of pixel PX with show image according to a plurality of data-signals and a plurality of signal.Gate drivers 206 can be carried out the power-off ghost shadow attenuation operation to pixel-array unit 200 according to reset signal XON in addition, is known technology as for the running waveform correlation of reset signal XON, repeats no more.
Grid pulse modulation unit 220 is used to provide noble potential grid signal modulation voltage VGHM.Grid pulse modulation unit 220 comprises phase inverter 240, the first transistor 230, transistor seconds 235, resistance R x, diode 225 and selector switch 250.The first transistor 230 is P type thin film transistor (TFT) or p type field effect transistor, and transistor seconds 235 is N type thin film transistor (TFT) or n type field effect transistor.Phase inverter 240 comprises input end and output terminal, and wherein input end is used for receiving top rake control signal VFLK.The first transistor 230 comprises first end, second end and gate terminal, wherein first end is used for receiving noble potential signal reference voltage VGH, gate terminal is electrically connected on the output terminal of phase inverter 240, and second end is used for exporting noble potential grid signal modulation voltage VGHM to gate drivers 206.Capacitor C g is electrically connected between second end and reference potential Vref of the first transistor 230.In one embodiment, reference potential Vref is an earthing potential.Transistor seconds 235 comprises first end, second end and gate terminal, and wherein first end is electrically connected on second end of the first transistor 230, and gate terminal is electrically connected on the output terminal of phase inverter 240, and second end is electrically connected on resistance R x.Resistance R x is electrically connected between second end and reference potential Vref of transistor seconds 235.Selector switch 250 comprises first input end, second input end and output terminal, and wherein first input end is used for receiving clamping voltage Vclamp, and second input end is electrically connected on reference potential Vref, and output terminal is electrically connected on diode 225.Diode 225 comprises positive terminal (anode) and negative pole end (cathode), and wherein positive terminal is electrically connected on the output terminal of selector switch 250, and negative pole end is electrically connected on second end of the first transistor 230.
In the running of liquid crystal indicator 20, in the scheduled time slot after start, reset signal XON remains in first state, make selector switch 250 choose reference potential Vref according to this with the decapacitation voltage clamp function, so though clamping voltage Vclamp rises to the input voltage current potential soon, but this moment, clamping voltage Vclamp was not fed into the positive terminal of diode 225, that is the clamping voltage Vclamp of tool noble potential can't be fed into gate drivers 206 in scheduled time slot, so gate drivers 206 can not produce a plurality of noise like signals.That is to say that even the reset signal XON of tool first state activation gate drivers 206 in scheduled time slot exports all signals to pixel-array unit 200 simultaneously, the noise phenomenon of start-up picture can't take place.Behind scheduled time slot, reset signal XON switches to second state of first state that differs from, and makes selector switch 250 choose the clamping voltage Vclamp of tool noble potential with the activation voltage clamp function according to this.
Fig. 3 is the structural representation of second embodiment of liquid crystal indicator of the present invention.As shown in Figure 3, liquid crystal indicator 30 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 320.Grid pulse modulation unit 320 is similar to grid pulse modulation unit shown in Figure 2 220, and main difference is diode 225 is replaced into diode 325.Diode 325 comprises positive terminal and negative pole end, and wherein positive terminal is electrically connected on the output terminal of selector switch 250, and negative pole end is electrically connected on second end of transistor seconds 235.That is to say that the negative pole end of diode 325 is electrically connected on the connected node of transistor seconds 235 and resistance R x.In the running of liquid crystal indicator 30, when carrying out the discharge running of capacitor C g, selector switch 250 is chosen the clamping voltage Vclamp of tool noble potential with the activation voltage clamp function, when the node voltage of transistor seconds 235 and the connected node of resistance R x drops to clamping voltage Vclamp, diode 325 i.e. forward conducting, makes noble potential grid signal modulation voltage VGHM remain on clamping voltage Vclamp substantially up to carrying out the follow-up running that discharges and recharges according to this.Except that above-mentioned running about diode 325, all the other runnings of liquid crystal indicator 30 are same as liquid crystal indicator 20, repeat no more.
Fig. 4 is the structural representation of the 3rd embodiment of liquid crystal indicator of the present invention.As shown in Figure 4, liquid crystal indicator 40 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 420.Grid pulse modulation unit 420 is similar to grid pulse modulation unit shown in Figure 2 220, and main difference is selector switch 250 is replaced into selector switch 450.Selector switch 450 comprises the 3rd transistor 451 and the 4th transistor 453, and wherein the 3rd transistor 451 is N type thin film transistor (TFT) or n type field effect transistor, and the 4th transistor 453 is P type thin film transistor (TFT) or p type field effect transistor.The 3rd transistor 451 comprises first end, second end and gate terminal, and wherein first end is used for receiving clamping voltage Vclamp, and second end is electrically connected on the positive terminal of diode 225, and gate terminal is used for receiving reset signal XON.The 4th transistor 453 comprises first end, second end and gate terminal, and wherein first end is electrically connected on reference potential Vref, and second end is electrically connected on the positive terminal of diode 225, and gate terminal is used for receiving reset signal XON.When reset signal XON remained on first state, 453 conductings of the 4th transistor and the 3rd transistor 451 ended, and chose reference potential Vref according to this and were fed into the positive terminal of diode 225 and the decapacitation voltage clamp function.When reset signal XON remained on second state, 451 conductings of the 3rd transistor and the 4th transistor 453 ended, and the clamping voltage Vclamp that chooses the tool noble potential according to this is fed into the positive terminal of diode 225 and the activation voltage clamp function.Except that above-mentioned running about the 3rd transistor 451 and the 4th transistor 453, all the other runnings of liquid crystal indicator 40 are same as liquid crystal indicator 20, repeat no more.
Fig. 5 is the structural representation of the 4th embodiment of liquid crystal indicator of the present invention.As shown in Figure 5, liquid crystal indicator 50 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 520.Grid pulse modulation unit 520 is similar to grid pulse modulation unit shown in Figure 3 320, and main difference is selector switch 250 is replaced into selector switch 550.Selector switch 550 comprises the 3rd transistor 551 and the 4th transistor 553, and wherein the 3rd transistor 551 is N type thin film transistor (TFT) or n type field effect transistor, and the 4th transistor 553 is P type thin film transistor (TFT) or p type field effect transistor.The 3rd transistor 551 comprises first end, second end and gate terminal, and wherein first end is used for receiving clamping voltage Vclamp, and second end is electrically connected on the positive terminal of diode 325, and gate terminal is used for receiving reset signal XON.The 4th transistor 553 comprises first end, second end and gate terminal, and wherein first end is electrically connected on reference potential Vref, and second end is electrically connected on the positive terminal of diode 325, and gate terminal is used for receiving reset signal XON.When reset signal XON remained on first state, 553 conductings of the 4th transistor and the 3rd transistor 551 ended, and chose reference potential Vref according to this and were fed into the positive terminal of diode 325 and the decapacitation voltage clamp function.When reset signal XON remained on second state, 551 conductings of the 3rd transistor and the 4th transistor 553 ended, and the clamping voltage Vclamp that chooses the tool noble potential according to this is fed into the positive terminal of diode 325 and the activation voltage clamp function.Except that above-mentioned running about the 3rd transistor 551 and the 4th transistor 553, all the other runnings of liquid crystal indicator 50 are same as liquid crystal indicator 30, repeat no more.
Fig. 6 is the structural representation of the 5th embodiment of liquid crystal indicator of the present invention.As shown in Figure 6, liquid crystal indicator 60 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 620.Grid pulse modulation unit 620 is similar to grid pulse modulation unit shown in Figure 2 220, and main difference is selector switch 250 is replaced into selector switch 650.Selector switch 650 comprises first input end, second input end and output terminal, and wherein first input end is used for receiving clamping voltage Vclamp, and second input end is electrically connected on reference potential Vref, and output terminal is electrically connected on the positive terminal of diode 225.Selector switch 650 is chosen running according to the selection signal Ssel that differs from reset signal XON with execution, when selecting signal Ssel to remain on first state, selector switch 650 its second input ends of electrical connection and output terminal are to choose the positive terminal of reference potential Vref feed-in diode 225, when selecting signal Ssel to remain on second state, selector switch 650 its first input ends of electrical connection and output terminal are to choose the positive terminal of clamping voltage Vclamp feed-in diode 225.So in the running of liquid crystal indicator 60, the period that the scheduled time slot of decapacitation voltage clamp function keeps first state in the time of need not equaling reset signal XON start, the scheduled time slot that also can more flexiblely adjust the decapacitation voltage clamp function is to improve the running performance.About the running of selecting signal Ssel, all the other runnings of liquid crystal indicator 60 are same as liquid crystal indicator 20, repeat no more except that above-mentioned.
Fig. 7 is the structural representation of the 6th embodiment of liquid crystal indicator of the present invention.As shown in Figure 7, liquid crystal indicator 70 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 720.Grid pulse modulation unit 720 is similar to grid pulse modulation unit shown in Figure 3 320, and main difference is selector switch 250 is replaced into selector switch 750.Selector switch 750 comprises first input end, second input end and output terminal, and wherein first input end is used for receiving clamping voltage Vclamp, and second input end is electrically connected on reference potential Vref, and output terminal is electrically connected on the positive terminal of diode 325.Selector switch 750 is chosen running according to the selection signal Ssel that differs from reset signal XON with execution, according to this its first input end or second input end are electrically connected to the positive terminal of diode 325, thereby choose the positive terminal of clamping voltage Vclamp or reference potential Vref feed-in diode 325.So in the running of liquid crystal indicator 70, the period that the scheduled time slot of decapacitation voltage clamp function keeps first state in the time of need not equaling reset signal XON start, the scheduled time slot that also can more flexiblely adjust the decapacitation voltage clamp function is to improve the running performance.About the running of selecting signal Ssel, all the other runnings of liquid crystal indicator 70 are same as liquid crystal indicator 30, repeat no more except that above-mentioned.
Fig. 8 is the structural representation of the 7th embodiment of liquid crystal indicator of the present invention.As shown in Figure 8, liquid crystal indicator 80 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 820.Grid pulse modulation unit 820 is similar to grid pulse modulation unit shown in Figure 6 620, and main difference is selector switch 650 is replaced into selector switch 850.Selector switch 850 comprises the 3rd transistor 851 and the 4th transistor 853, and wherein the 3rd transistor 851 is N type thin film transistor (TFT) or n type field effect transistor, and the 4th transistor 853 is P type thin film transistor (TFT) or p type field effect transistor.The 3rd transistor 851 comprises first end, second end and gate terminal, and wherein first end is used for receiving clamping voltage Vclamp, and second end is electrically connected on the positive terminal of diode 225, and gate terminal is used for receiving selection signal Ssel.The 4th transistor 853 comprises first end, second end and gate terminal, and wherein first end is electrically connected on reference potential Vref, and second end is electrically connected on the positive terminal of diode 225, and gate terminal is used for receiving selection signal Ssel.When selecting signal Ssel conducting the 4th transistor 853 and ending the 3rd transistor 851, selector switch 850 is chosen reference potential Vref and is fed into the positive terminal of diode 225 with the decapacitation voltage clamp function.When selecting signal Ssel conducting the 3rd transistor 851 and ending the 4th transistor 853, the clamping voltage Vclamp that selector switch 850 is chosen the tool noble potential is fed into the positive terminal of diode 225 with the activation voltage clamp function.Except that above-mentioned running about the 3rd transistor 851 and the 4th transistor 853, all the other runnings of liquid crystal indicator 80 are same as liquid crystal indicator 60, repeat no more.
Fig. 9 is the structural representation of the 8th embodiment of liquid crystal indicator of the present invention.As shown in Figure 9, liquid crystal indicator 90 comprises pixel-array unit 200, source electrode driver 204, gate drivers 206, capacitor C g and grid pulse modulation unit 920.Grid pulse modulation unit 920 is similar to grid pulse modulation unit shown in Figure 7 720, and main difference is selector switch 750 is replaced into selector switch 950.Selector switch 950 comprises the 3rd transistor 951 and the 4th transistor 953, and wherein the 3rd transistor 951 is N type thin film transistor (TFT) or n type field effect transistor, and the 4th transistor 953 is P type thin film transistor (TFT) or p type field effect transistor.The 3rd transistor 951 comprises first end, second end and gate terminal, and wherein first end is used for receiving clamping voltage Vclamp, and second end is electrically connected on the positive terminal of diode 325, and gate terminal is used for receiving selection signal Ssel.The 4th transistor 953 comprises first end, second end and gate terminal, and wherein first end is electrically connected on reference potential Vref, and second end is electrically connected on the positive terminal of diode 325, and gate terminal is used for receiving selection signal Ssel.When selecting signal Ssel conducting the 4th transistor 953 and ending the 3rd transistor 951, selector switch 950 is chosen reference potential Vref and is fed into the positive terminal of diode 325 with the decapacitation voltage clamp function.When selecting signal Ssel conducting the 3rd transistor 951 and ending the 4th transistor 953, the clamping voltage Vclamp that selector switch 950 is chosen the tool noble potential is fed into the positive terminal of diode 325 with the activation voltage clamp function.Except that above-mentioned running about the 3rd transistor 951 and the 4th transistor 953, all the other runnings of liquid crystal indicator 90 are same as liquid crystal indicator 70, repeat no more.
In sum, in the running of liquid crystal indicator of the present invention, in the scheduled time slot after start, can or select signal to stop to import the running of clamping voltage according to reset signal, decapacitation voltage clamp function according to this, though so clamping voltage rises to the input voltage current potential soon, the clamping voltage of tool input voltage current potential is in scheduled time slot and can't be fed into gate drivers, and gate drivers just can not produce a plurality of noise like signals yet.Therefore reset signal activation gate drivers in scheduled time slot of power-off ghost shadow exports all signals to pixel-array unit simultaneously even be used for decaying, and the noise phenomenon of start-up picture can't take place.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection domain of the appended claim of the present invention.
Claims (22)
1. a liquid crystal indicator is characterized in that, comprises:
One pixel-array unit is used for carrying out an image and shows running;
The one source pole driver is electrically connected on this pixel-array unit, is used to provide this pixel-array unit and carries out a plurality of data-signals that this image shows that running is required;
One gate drivers, be electrically connected on this pixel-array unit, be used for carrying out a plurality of signals that this image shows that running is required so that this pixel-array unit to be provided, and be used for this pixel-array unit being carried out a power-off ghost shadow attenuation operation according to a reset signal according to a noble potential grid signal modulation voltage; And
One grid pulse modulation unit is electrically connected on this gate drivers, is used to provide this noble potential grid signal modulation voltage, and this grid pulse modulation unit has a voltage clamp function that is controlled by this reset signal;
Wherein in the scheduled time slot after this liquid crystal indicator start, this reset signal is that one first state is with this voltage clamp function of decapacitation, behind this scheduled time slot, this reset signal switches to one second state that differs from this first state, this voltage clamp function of activation according to this.
2. liquid crystal indicator according to claim 1 is characterized in that, this grid pulse modulation unit comprises:
One phase inverter comprises an input end and an output terminal, and wherein this input end is used for receiving a top rake control signal;
One the first transistor, comprise one first end, one second end and a gate terminal, wherein this first end is used for receiving a noble potential signal reference voltage, and this gate terminal is electrically connected on the output terminal of this phase inverter, and this second end is used for exporting this noble potential grid signal modulation voltage;
One transistor seconds comprises one first end, one second end and a gate terminal, and wherein this first end is electrically connected on second end of this first transistor, and this gate terminal is electrically connected on the output terminal of this phase inverter;
One resistance is electrically connected between second end and a reference potential of this transistor seconds;
One diode comprises a positive terminal and a negative pole end, and wherein this negative pole end is electrically connected on second end of this transistor seconds or second end of this first transistor; And
One selector switch, comprise a first input end, one second input end and an output terminal, wherein this first input end is used for receiving a clamping voltage, this second input end is electrically connected on this reference potential, this output terminal is electrically connected on the positive terminal of this diode, this selector switch according to this reset signal to choose this clamping voltage or this reference potential are fed into this diode from this output terminal positive terminal;
Wherein this phase inverter, this first transistor, this transistor seconds and this resistance are used for according to this top rake control signal and this noble potential signal reference voltage so that this noble potential grid signal modulation voltage to be provided, according to this these signals are carried out waveform chamfering running, the unidirectional transmission property of this diode can make this waveform chamfering running have this voltage clamp function, and this selector switch is used for according to this reset signal with this voltage clamp function of activation/decapacitation.
3. liquid crystal indicator according to claim 2 is characterized in that, in this scheduled time slot after this liquid crystal indicator start, this of this reset signal first state is used for making this selector switch to choose this reference potential with this voltage clamp function of decapacitation.
4. liquid crystal indicator according to claim 2 is characterized in that, behind this scheduled time slot, this of this reset signal second state is used for making this selector switch to choose this clamping voltage with this voltage clamp function of activation.
5. liquid crystal indicator according to claim 2 is characterized in that:
This first transistor is a P type thin film transistor (TFT) or a p type field effect transistor; And
This transistor seconds is a N type thin film transistor (TFT) or a n type field effect transistor.
6. liquid crystal indicator according to claim 2 is characterized in that, this selector switch comprises:
One the 3rd transistor comprises one first end, one second end and a gate terminal, and wherein this first end is used for receiving this clamping voltage, and this second end is electrically connected on the positive terminal of this diode, and this gate terminal is used for receiving this reset signal; And
One the 4th transistor comprises one first end, one second end and a gate terminal, and wherein this first end is electrically connected on this reference potential, and this second end is electrically connected on the positive terminal of this diode, and this gate terminal is used for receiving this reset signal.
7. liquid crystal indicator according to claim 6 is characterized in that:
The 3rd transistor is a N type thin film transistor (TFT) or a n type field effect transistor; And
The 4th transistor is a P type thin film transistor (TFT) or a p type field effect transistor.
8. liquid crystal indicator according to claim 6 is characterized in that, the 4th transistorized first end is electrically connected on earthing potential.
9. liquid crystal indicator according to claim 2 is characterized in that, this resistance is electrically connected between second end and earthing potential of this transistor seconds.
10. liquid crystal indicator according to claim 2 is characterized in that other comprises:
One electric capacity is electrically connected between second end and this reference potential of this first transistor.
11. liquid crystal indicator according to claim 10 is characterized in that, this electric capacity is electrically connected between second end and earthing potential of this first transistor.
12. a liquid crystal indicator is characterized in that, comprises:
The one source pole driver is used to provide a plurality of data-signals;
One gate drivers is used for according to a noble potential grid signal modulation voltage so that a plurality of signals to be provided;
One pixel-array unit is electrically connected on this source electrode driver and this gate drivers, is used for according to these data-signals and these signals with show image; And
One grid pulse modulation unit is electrically connected on this gate drivers, is used to provide this noble potential grid signal modulation voltage, and this grid pulse modulation unit has a voltage clamp function that is controlled by a selection signal;
Wherein in the scheduled time slot after this liquid crystal indicator start, this selection signal is that one first state is with this voltage clamp function of decapacitation, behind this scheduled time slot, this selection signal switches to one second state that differs from this first state, this voltage clamp function of activation according to this.
13. liquid crystal indicator according to claim 12 is characterized in that, this grid pulse modulation unit comprises:
One phase inverter comprises an input end and an output terminal, and wherein this input end is used for receiving a top rake control signal;
One the first transistor, comprise one first end, one second end and a gate terminal, wherein this first end is used for receiving a noble potential signal reference voltage, and this gate terminal is electrically connected on the output terminal of this phase inverter, and this second end is used for exporting this noble potential grid signal modulation voltage;
One transistor seconds comprises one first end, one second end and a gate terminal, and wherein this first end is electrically connected on second end of this first transistor, and this gate terminal is electrically connected on the output terminal of this phase inverter;
One resistance is electrically connected between second end and a reference potential of this transistor seconds;
One diode comprises a positive terminal and a negative pole end, and wherein this negative pole end is electrically connected on second end of this transistor seconds or second end of this first transistor; And
One selector switch, comprise a first input end, one second input end and an output terminal, wherein this first input end is used for receiving a clamping voltage, this second input end is electrically connected on this reference potential, this output terminal is electrically connected on the positive terminal of this diode, this selector switch according to this selection signal to choose this clamping voltage or this reference potential are fed into this diode from this output terminal positive terminal;
Wherein this phase inverter, this first transistor, this transistor seconds and this resistance are used for according to this top rake control signal and this noble potential signal reference voltage so that this noble potential grid signal modulation voltage to be provided, according to this these signals are carried out waveform chamfering running, the unidirectional transmission property of this diode can make this waveform chamfering running have this voltage clamp function, and this selector switch is used for according to this selection signal with this voltage clamp function of activation/decapacitation.
14. liquid crystal indicator according to claim 13 is characterized in that, in this scheduled time slot after this liquid crystal indicator start, this first state of this selection signal is used for making this selector switch to choose this reference potential with this voltage clamp function of decapacitation.
15. liquid crystal indicator according to claim 13 is characterized in that, behind this scheduled time slot, this second state of this selection signal is used for making this selector switch to choose this clamping voltage with this voltage clamp function of activation.
16. liquid crystal indicator according to claim 13 is characterized in that:
This first transistor is a P type thin film transistor (TFT) or a p type field effect transistor; And
This transistor seconds is a N type thin film transistor (TFT) or a n type field effect transistor.
17. liquid crystal indicator according to claim 13 is characterized in that, this selector switch comprises:
One the 3rd transistor comprises one first end, one second end and a gate terminal, and wherein this first end is used for receiving this clamping voltage, and this second end is electrically connected on the positive terminal of this diode, and this gate terminal is used for receiving this selection signal; And
One the 4th transistor comprises one first end, one second end and a gate terminal, and wherein this first end is electrically connected on this reference potential, and this second end is electrically connected on the positive terminal of this diode, and this gate terminal is used for receiving this selection signal.
18. liquid crystal indicator according to claim 17 is characterized in that:
The 3rd transistor is a N type thin film transistor (TFT) or a n type field effect transistor; And
The 4th transistor is a P type thin film transistor (TFT) or a p type field effect transistor.
19. liquid crystal indicator according to claim 17 is characterized in that, the 4th transistorized first end is electrically connected on earthing potential.
20. liquid crystal indicator according to claim 13 is characterized in that, this resistance is electrically connected between second end and earthing potential of this transistor seconds.
21. liquid crystal indicator according to claim 13 is characterized in that, other comprises:
One electric capacity is electrically connected between second end and this reference potential of this first transistor.
22. liquid crystal indicator according to claim 21 is characterized in that, this electric capacity is electrically connected between second end and earthing potential of this first transistor.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014180031A1 (en) * | 2013-05-06 | 2014-11-13 | 深圳市华星光电技术有限公司 | Goa drive circuit and drive method |
CN105206248A (en) * | 2015-11-09 | 2015-12-30 | 重庆京东方光电科技有限公司 | Display driving circuit, display device and display driving method |
CN107799046A (en) * | 2016-08-31 | 2018-03-13 | 乐金显示有限公司 | Display device and controller |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006011004A (en) * | 2004-06-25 | 2006-01-12 | Sharp Corp | Liquid crystal display device, and its driving circuit and driving method |
JP2006228312A (en) * | 2005-02-16 | 2006-08-31 | Alps Electric Co Ltd | Shift register and liquid crystal drive circuit |
CN101826315A (en) * | 2010-05-06 | 2010-09-08 | 友达光电股份有限公司 | Liquid crystal display device |
-
2010
- 2010-06-11 CN CN2010102033158A patent/CN101833931B/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006011004A (en) * | 2004-06-25 | 2006-01-12 | Sharp Corp | Liquid crystal display device, and its driving circuit and driving method |
JP2006228312A (en) * | 2005-02-16 | 2006-08-31 | Alps Electric Co Ltd | Shift register and liquid crystal drive circuit |
CN101826315A (en) * | 2010-05-06 | 2010-09-08 | 友达光电股份有限公司 | Liquid crystal display device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014180031A1 (en) * | 2013-05-06 | 2014-11-13 | 深圳市华星光电技术有限公司 | Goa drive circuit and drive method |
GB2527715A (en) * | 2013-05-06 | 2015-12-30 | Shenzhen China Star Optoelect | GOA drive circuit and drive method |
GB2527715B (en) * | 2013-05-06 | 2020-08-26 | Shenzhen China Star Optoelect | Gate driver-on-array driving circuit and driving method |
CN105206248A (en) * | 2015-11-09 | 2015-12-30 | 重庆京东方光电科技有限公司 | Display driving circuit, display device and display driving method |
CN105206248B (en) * | 2015-11-09 | 2019-07-05 | 重庆京东方光电科技有限公司 | Display driver circuit, display device and display driving method |
CN107799046A (en) * | 2016-08-31 | 2018-03-13 | 乐金显示有限公司 | Display device and controller |
CN107799046B (en) * | 2016-08-31 | 2021-01-08 | 乐金显示有限公司 | Display device and controller |
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CN101833931B (en) | 2012-02-22 |
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