CN101826059A - Write-protection ring of central protector and storage - Google Patents
Write-protection ring of central protector and storage Download PDFInfo
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- CN101826059A CN101826059A CN201010107398A CN201010107398A CN101826059A CN 101826059 A CN101826059 A CN 101826059A CN 201010107398 A CN201010107398 A CN 201010107398A CN 201010107398 A CN201010107398 A CN 201010107398A CN 101826059 A CN101826059 A CN 101826059A
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Abstract
The invention provides a write-protection ring of a central protector and a storage. The central processor comprises a head address register, a tail address register, an address range judging module and a write-protection register, wherein the head address register is used for storing an initial address of a protected address space in the storage; the tail address register is used for storing an end address of the protected address space; the address range judging module is used for judging whether the write address needing to write data and received by the central processor is positioned in the protected address space or not; the write-protection register is used for enabling the write function of the storage if the write address is positioned at the outside of the protected address space, or forbidding the use of the write function of the storage if the write address is positioned in the protected address space. The central processor or the method can realize the write-protection function, does not occupy extra PCB space, reduces the cost and simplifies implementation.
Description
Technical field
The present invention relates to the communications field, particularly central processing unit and memory write guard method.
Background technology
(Printed Circuit Board on circuit printing plate PCB, PCB), 2 independently flash memory FLASH devices generally all can be arranged, a slice capacity less as BootRom, (Central Processing Unit CPU) carries out write operation to it not allow central processor CPU in the system work process.The FLASH that a slice capacity is bigger is used to deposit the user data that power down is not lost in addition.This mode can prevent the problem that software causes Bootrom to be caused veneer to start by rewriting to the write operation that can not expect of Bootrom.
In the prior art, also can use a slice FLASH to replace two original FLASH,, can bring a problem but do like this to simplify circuit design.Because Bootrom and user data are deposited in the middle of the same storer, Bootrom may be rewritten by accident in system work process.So need the extra write-protect circuit of design.
So-called write-protect circuit for when initial conditions meets certain requirements, just allows central processing unit to write a certain specific region of FLASH, as is used for depositing the address space of Bootrom.By the write-protect circuit of outside, realize the locking protection function of a certain specific region of FLASH.
But increase an independently write-protect circuit, cost is higher, and realizes complicated.
Summary of the invention
In order to solve the above problems, an aspect of of the present present invention provides a kind of central processing unit, comprises:
The first address register, the start address that is used for preserving the protected address space of storer;
The tail address register, the end address that is used to preserve described protected address space;
The address realm judge module is used to judge whether the write address that needs that described central processing unit receives write data is positioned at described protected address space;
The write-protect register is positioned at outside the described protected address space if be used for described write address, enables the function of writing of described storer; Perhaps, if described write address is positioned within the described protected address space, forbid the function of writing of described storer.
Another aspect of the present invention also provides a kind of memory write guard method, comprising:
Central processing unit receives the write address that need write data;
Judge according to first address register and tail address register that described central authorities handle whether described write address is positioned at protected address space;
If described write address is positioned at outside the described protected address space, enable the function of writing of described storer by the write-protect register of described central processing unit; Perhaps, if described write address is positioned within the described protected address space, forbid the function of writing of described storer by described write-protect register.
Above-mentioned scheme by in CPU inside register being set, realizes the write-protect function of the specific region of storer has been reduced cost, has simplified realization.
Description of drawings
The CPU structural representation that Fig. 1 provides for one embodiment of the invention;
The CPU structural representation that Fig. 2 provides for another embodiment of the present invention;
The schematic flow sheet of the Write-protection method of the storer that Fig. 3 provides for another embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
See also Fig. 1, the structural representation of a kind of CPU that Fig. 1 provides for present embodiment comprises: first address register 101, tail address register 102, write-protect register 104 and address realm judge module 105.
Below in conjunction with an example, further specify the principle of work of the device that present embodiment provides.
When system need carry out write operation to storer, can send write command to CPU, and send the address that needs to carry out write operation to CPU, this address can be stored in the address register.
After CPU received write address, address realm judge module 104 judged according to the value of first address register and tail address register whether write address is positioned at protected address space.If write address is positioned at protected address space, then the write-protect register not the WE of output storage (Write Enable, WE) enable signal, CPU just can not be carried out write operation to storer; If write address is positioned at outside the protected address space, then write-protect register output write operation enables the WE signal, makes storer can receive the write operation that CPU carries out.
In the present embodiment, this protected address space can be used to preserve the Bootrom data.After powering on or resetting, operation Bootrom, headed by address register and tail address register initial value is set.
By foregoing description as can be known, the CPU that present embodiment provides is provided with register by inside, realizes the write-protect function of the specific region of storer has been reduced cost, has simplified realization.
See also Fig. 2, another embodiment shown in Figure 2 has provided the structural representation of CPU.The CPU that present embodiment provides can provide the write-protect function to storer.As an example, in the present embodiment, this storer is Flash.See also Fig. 2, Fig. 2 gives the annexation of CPU and Flash.
The CPU that present embodiment provides comprises: first address register 201, tail address register 202, write-protect register 203, address realm judge module 204, enable register 205.
Wherein, first address register 201, tail address register 202, write-protect register 203, address realm judge module 204, consistent with the function of the foregoing description, repeat no more.
And write-protect register 203, bit wide can be 8, also can be 16, when its value equals a preset value or during less than preset value, forbid to this Flash WE (Write Enable, WE) pin output enable signal, thereby CPU just cannot carry out write operation to Flash; Perhaps, if its value greater than this preset value, output enable signal then, CPU just can carry out write operation to Flash.
Enable register 205 is used for enable write protection register 203, by changing the value of enable register 205, can make write-protect register 203 open the write-protect function or close the write-protect function.
Under the situation that the write-protect function is opened, receive the write address that need write data as CPU after, address realm judge module 204 judges that this write address is whether within the scope of the address value of first address register 201 and 202 preservations of tail address register; If write address is positioned at protected address space, then write-protect register 203 is not exported the WE enable signal; If write address is positioned at outside the protected address space, then write-protect register 203 is exported the WE enable signals.
As an example, address realm judge module 204 can be the thresholding comparator circuit, is used for the value of write address and first address register and tail address register is compared, to determine whether write address is positioned within the protected address space; Perhaps, address realm judge module 204 can judge whether write address is positioned within the protected address space for one section algorithm of realizing with code.
As another example, first address register and tail address register can have a plurality of, and a plurality of protected address spaces are set, thereby can realize storage areas different in the storer is realized write-protect.
As another example, this protected address space can be the Bootrom space, and after system powered on or resets, operation Bootrom was provided with the value of first address register and tail address register.
By foregoing description as can be known, the CPU that present embodiment provides is provided with register by inside, realizes the write-protect function of the specific region of storer has been reduced cost, has simplified realization.
See also Fig. 3, the schematic flow sheet of the Write-protection method of the storer that provides for another embodiment shown in Figure 3.This method comprises:
Step S301, central processing unit receives the write address that need write data.
This central processing unit can be the central processing unit that the foregoing description provides.Write address is in the storer, need write the address value of data.
Step S302 judges according to first address register and tail address register that central authorities handle whether write address is positioned at protected address space.
The first address register is used for preserving the start address of the protected address space of storer; The tail address register, the end address that is used to preserve described protected address space.
If write address is between the address value of these two register holds, then write address is positioned within the protected address space; Otherwise, then be positioned at outside the protected address space.
This judgement can be provided with the thresholding comparator circuit in CPU, carry out above-mentioned judgement by the thresholding comparator circuit; Perhaps, can carry out the algorithm that one section code is realized, judge whether write address is positioned at protected address space by CPU.
Step S303, according to judged result enable or disabled memory write function.
If write address is positioned at outside the described protected address space, the write-protect register of central processing unit is exported the WE enable signal, enables the function of writing of storer; Perhaps, if write address is positioned at protected address space, by the function of writing of write-protect register disabled memory.
Further, the method that present embodiment provides before step S300, can also comprise:
Address register and tail address register are provided with initial value headed by the step S300, operation Bootrom.
This protected storage space; can be used to preserve Bootrom, after system powers on or resets, operation Bootrom; the start address of protected address space is made as the value of first address register, the end address of protected address space is made as the value of tail address register.
Further, after step S300, the method that present embodiment provides can also comprise:
Step S304 is by the enable register enable write protection register of CPU.
For example, if enable register enable write protection register, then the write-protect register can perhaps not exported the WE enable signal according to the judged result output WE enable signal of address realm judge module; If enable write is not protected register, then the write-protect register keeps the state of output WE enable signal.
By foregoing description as can be known, the method that present embodiment provides by the register that is provided with in CPU, realizes the write-protect function of the specific region of storer has been reduced cost, has simplified realization.
By the description of above embodiment, the those skilled in the art can be well understood to the present invention and can realize by the mode that software adds essential general hardware platform, can certainly pass through hardware.Based on such understanding, the part that technical scheme of the present invention contributes to prior art in essence in other words can embody with the form of software product, this computer software product is stored in the storage medium, comprise that some instructions are with so that a computer equipment (can be a personal computer, server, the perhaps network equipment etc.) carry out all or part of step of the described method of each embodiment of the present invention.And aforesaid storage medium comprises: various media that can be program code stored such as USB flash disk, portable hard drive, ROM (read-only memory) (ROM), random-access memory (ram), magnetic disc or CD.
Claims (10)
1. a central processing unit is characterized in that, comprising:
The first address register, the start address that is used for preserving the protected address space of storer;
The tail address register, the end address that is used to preserve described protected address space;
The address realm judge module is used to judge whether the write address that needs that described central processing unit receives write data is positioned at described protected address space; With
The write-protect register is positioned at outside the described protected address space if be used for described write address, enables the function of writing of described storer; Perhaps, if described write address is positioned within the described protected address space, forbid the function of writing of described storer.
2. central processing unit as claimed in claim 1 is characterized in that, described central processing unit also comprises:
Enable register is used to enable described write-protect register.
3. central processing unit as claimed in claim 1 is characterized in that, described address realm judge module is the thresholding comparator circuit.
4. as the described arbitrary central processing unit of claim 1-3, it is characterized in that described protected address space is start-up code Bootrom space.
5. a memory write guard method is characterized in that, described method comprises:
Central processing unit receives the write address that need write data;
Judge according to first address register and tail address register that described central authorities handle whether described write address is positioned at protected address space;
If described write address is positioned at outside the described protected address space, enable the function of writing of described storer by the write-protect register of described central processing unit; Perhaps, if described write address is positioned at described protected address space, forbid the function of writing of described storer by described write-protect register.
6. method as claimed in claim 5 is characterized in that, described method also comprises:
Enable register by described central processing unit enables described write-protect register.
7. method as claimed in claim 5 is characterized in that, described first address register and the tail address register of handling according to described central authorities judges that whether described write address is positioned at protected address space, specifically comprises:
The thresholding comparator circuit of described central processing unit according to the address value of described first address register and the preservation of described tail address register, judges whether described write address is positioned at described protected address space.
8. as the described arbitrary method of claim 5-7, it is characterized in that described protected address space is initial code Bootrom space.
9. method as claimed in claim 8 is characterized in that, described method also comprises:
After described central processing unit resetted or powers on, moving described Bootrom was that described first address register and described tail address register are provided with initial value.
10. method as claimed in claim 5 is characterized in that, described method also comprises:
Enable register by described central processing unit enables described write-protect register.
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| CN201010107398A CN101826059A (en) | 2010-02-01 | 2010-02-01 | Write-protection ring of central protector and storage |
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| CN201010107398A CN101826059A (en) | 2010-02-01 | 2010-02-01 | Write-protection ring of central protector and storage |
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104317743A (en) * | 2014-09-29 | 2015-01-28 | 上海华为技术有限公司 | Write protection method and controller for SPI FLASH |
| CN104331674A (en) * | 2014-11-20 | 2015-02-04 | 惠州Tcl移动通信有限公司 | Method and system for preventing NFC (near field communication) chip register from being tampered |
| CN105279094A (en) * | 2014-06-09 | 2016-01-27 | 中兴通讯股份有限公司 | NAND Flash operation processing method, NAND Flash operation processing device and logic device |
| CN105701054A (en) * | 2014-10-22 | 2016-06-22 | 鸿富锦精密工业(武汉)有限公司 | SIO device with SPI bus gateway controller and write protection method |
| CN109753448A (en) * | 2017-11-03 | 2019-05-14 | 展讯通信（上海）有限公司 | Memory read-write guard method and device |
| CN110351718A (en) * | 2019-06-24 | 2019-10-18 | 惠州Tcl移动通信有限公司 | WIFI data protection handles method, mobile terminal and storage medium |
| CN110457236A (en) * | 2014-03-28 | 2019-11-15 | 三星电子株式会社 | Storage system and the method that storage system is executed and verifies write-protect |
| CN111143237A (en) * | 2019-12-26 | 2020-05-12 | 普冉半导体（上海）有限公司 | Software write protection system for memory |
| US10747687B2 (en) | 2014-03-28 | 2020-08-18 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
-
2010
- 2010-02-01 CN CN201010107398A patent/CN101826059A/en active Pending
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10783090B2 (en) | 2014-03-28 | 2020-09-22 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
| US11880313B2 (en) | 2014-03-28 | 2024-01-23 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
| US11615035B2 (en) | 2014-03-28 | 2023-03-28 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
| US11366767B2 (en) | 2014-03-28 | 2022-06-21 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
| CN110457236A (en) * | 2014-03-28 | 2019-11-15 | 三星电子株式会社 | Storage system and the method that storage system is executed and verifies write-protect |
| US11354253B2 (en) | 2014-03-28 | 2022-06-07 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
| CN110457236B (en) * | 2014-03-28 | 2020-06-30 | 三星电子株式会社 | Storage system and method for executing and verifying write protection of storage system |
| US10747687B2 (en) | 2014-03-28 | 2020-08-18 | Samsung Electronics Co., Ltd. | Storage system and method for performing and authenticating write-protection thereof |
| CN105279094A (en) * | 2014-06-09 | 2016-01-27 | 中兴通讯股份有限公司 | NAND Flash operation processing method, NAND Flash operation processing device and logic device |
| CN104317743A (en) * | 2014-09-29 | 2015-01-28 | 上海华为技术有限公司 | Write protection method and controller for SPI FLASH |
| CN105701054A (en) * | 2014-10-22 | 2016-06-22 | 鸿富锦精密工业(武汉)有限公司 | SIO device with SPI bus gateway controller and write protection method |
| CN104331674B (en) * | 2014-11-20 | 2018-06-19 | 惠州Tcl移动通信有限公司 | A kind of method and system that NFC chip register is prevented to be tampered |
| CN104331674A (en) * | 2014-11-20 | 2015-02-04 | 惠州Tcl移动通信有限公司 | Method and system for preventing NFC (near field communication) chip register from being tampered |
| CN109753448A (en) * | 2017-11-03 | 2019-05-14 | 展讯通信（上海）有限公司 | Memory read-write guard method and device |
| CN110351718A (en) * | 2019-06-24 | 2019-10-18 | 惠州Tcl移动通信有限公司 | WIFI data protection handles method, mobile terminal and storage medium |
| CN110351718B (en) * | 2019-06-24 | 2023-11-14 | 惠州Tcl移动通信有限公司 | WIFI data protection processing method, mobile terminal and storage medium |
| CN111143237A (en) * | 2019-12-26 | 2020-05-12 | 普冉半导体（上海）有限公司 | Software write protection system for memory |
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Open date: 20100908 |