CN101814538B - Miniature solar battery array integrated by single chips and preparation method thereof - Google Patents

Miniature solar battery array integrated by single chips and preparation method thereof Download PDF

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Publication number
CN101814538B
CN101814538B CN2009100785595A CN200910078559A CN101814538B CN 101814538 B CN101814538 B CN 101814538B CN 2009100785595 A CN2009100785595 A CN 2009100785595A CN 200910078559 A CN200910078559 A CN 200910078559A CN 101814538 B CN101814538 B CN 101814538B
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layer
insulation filling
solar cell
solar battery
filling layer
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CN101814538A (en
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王彦硕
陈诺夫
白一鸣
黄添懋
陈晓峰
张汉
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Institute of Semiconductors of CAS
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention relates to a miniature solar battery array integrated by single chips. The array comprises a substrate, doping layers, a solar battery function layer, a cap layer, a lower insulation filling layer, a metal shading layer, an upper insulation filling layer and a metal electrode, wherein the doping layers grow at both sides of the upper surface of the substrate; the solar battery function layer grows on the doping layers; the cap layer grows on the solar battery function layer, the area of the cap layer is smaller than that of the solar battery function layer, and the cap layer aligns to one side end of the solar battery function layer; the lower insulation filling layer is filled between the doping layers and covered at one end of the solar battery function layer and one end and part of the surface of the cap layer; the metal shading layer grows above the middle of the lower insulation filling layer and has smaller area than the lower insulation filling layer; the upper insulation filling layer is covered at the lower insulation filling layer and the metal shading layer; and the metal electrode grows on the doping layer at one side and covered on the upper surfaces of the upper insulation filling layer and most of the cap layer.

Description

Single chip integrated miniature solar battery array and preparation method thereof
Technical field
The invention belongs to inorganic field of photoelectric technology, be specifically related to a kind of single chip integrated miniature solar battery array and preparation method thereof.The present invention adopts semiconductive thin film epitaxy technology growth solar cell epitaxial wafer, and utilizes the solar cell chip of meticulous back PROCESS FOR TREATMENT making properties such as photoetching, and being expected to provides portable power source for miniature precision instrument.
Background of invention
Micro-electromechanical system (MEMS) (Micro-Electro-Mechanical Systems) mainly comprises several parts such as micro mechanism, microsensor, miniature actuator and corresponding treatment circuit, it is to merge multiple Micrometer-Nanometer Processing Technology, and the high-tech front subject that grows up on the basis of the newest fruits of application modern information technologies.
A brand-new technology field and industry have been opened up in the development of MEMS technology, and the microsensor, microactrator, micro parts, Micromechanical Optics device, vacuum microelectronic device, power electronic device etc. that adopt the MEMS fabrication techniques all have very wide application prospect in Aeronautics and Astronautics, automobile, biomedicine, environmental monitoring, military affairs and all spectra that almost people touched.
Mobility, automatic control, integrated MEMS system all need independently, microminiaturized power supply and generally have.Therefore micro power research has caused showing great attention to of domestic and international MEMS researcher, miniature solar battery wherein, also have prospects such as miniature lithium battery, micro zinc-nickel battery, miniature thermoelectric cell better, and miniature solar battery have life-span length, environmental friendliness, with the equal mutually advantage of MEMS material foundation, become the focus of micro power research.
Solar cell is the device that the luminous energy of solar irradiation directly is converted to electric energy.Solar cell is used for to load, provides electric energy as electric light, TV and computer etc.Also relate to apparatus for storing electrical energy in actual applications, could not have to provide electric energy continuously to load under the sunlit situation like this.Solar cell can produce photovoltage under the situation of illumination.Photovoltage is open circuit voltage VOC under the situation of open circuit outside, and the electric current that obtains under the short circuit is short circuit current ISC outside.Under loaded situation, the power output of solar cell equals the voltage drop in the load and the product of the electric current by load, and it is less than the product of open circuit voltage and short circuit current.
Generally, semiconductor solar cell such as Si solar cell, GaAs solar cell etc., its open circuit voltage has only 0.5-2.5V.And load often needs bigger voltage, and the load that some is special as the pulse signal emitter etc., needs tens volts even go up the voltage of hectovolt, therefore needs the output voltage of raising solar cell.Usually, for large-scale battery system, mainly by battery is cut into slices, welding series-connected cell sheet is regulated output voltage.And for the miniature solar battery that is applicable to Micro Electro Mechanical System, the cutting of macroscopic view, bonding, technology such as welding can not be suitable for already, at this problem, utilize the integrated solar cell miniature array of microfabrication technology preparation, can widen the application prospect of miniature solar battery in microsystems such as MEMS greatly undoubtedly.
On the other hand, MEMS system, semiconductor device all to radioresistance, at a high speed, efficient aspect development, GaAs is the high performance material of future generation of Si as an alternative, be widely used in fields such as radio communications, therefore, GaAs base solar cell is a preparation integrated micro solar cell array first-selection.Meanwhile, have benefited from the tremendous development of photoelectron technology, the technology of GaAs solar cell such as liquid phase epitaxy (LPE) and metal organic vapor (MOCVD) have obtained significant progress in the past few decades.
In sum, GaAs solar cell miniature array fully combines the characteristics of GaAs material solar cell technology of preparing and Micrometer-Nanometer Processing Technology, can be effectively provide respective output voltages for the miniature load of different demands, has the conversion efficiency height, characteristics such as the life-span is long, and can make monolithic system with load, making people research and develop novel MEMS device becomes possibility.
Summary of the invention
The objective of the invention is to propose a kind of single chip integrated GaAs solar cell miniature array structure and preparation method thereof.Utilize structure of the present invention and preparation method, can develop open circuit voltage from tens volts to the adjustable miniature solar battery of last hectovolt.
The invention provides a kind of single chip integrated miniature solar battery array, it is characterized in that, comprising:
One substrate;
Doped layer, this doped layer are grown in the top both sides of substrate;
One solar cell functional layer, be grown in doped layer above;
The capful layer, be grown in the solar cell functional layer above, the area of this cap layer aligns with solar cell functional layer one side less than the area of solar cell functional layer;
Once the insulation filling layer is filled between the doped layer, and is covered in an end and cap layer one end and the part surface of solar cell functional layer;
One metal light shield layer grows in down on the insulation filling layer centre, and its area is less than the area of following insulation filling layer;
Insulation filling layer on one is covered in down insulation filling layer and metal light shield layer;
One metal electrode grows on the doped layer of a side, and is covered in the upper surface of insulation filling layer and most of cap layer.
Wherein said substrate is insulation GaAs substrate.
The material of wherein said doped layer is n-GaAs, and thickness is 2-3 μ m, and doping content is greater than 5 * 10 17Cm -3
The material of wherein said solar cell functional layer is multilayer n-GaAs/p-GaAs, and thickness is 1-1.5 μ m.
Passivation Treatment is carried out in the side of wherein said solar cell functional layer.
The material that wherein descends insulation filling layer and last insulation filling layer is SiO 2Or polyimides; Metal electrode is the Au/Ti double-decker.
The invention provides a kind of preparation method of single chip integrated miniature solar battery array, it is characterized in that, comprise the steps:
The Semi-insulating GaAs substrate is provided;
Utilize metal organic chemical compound vapor deposition method or Liquid, grow doping layer on the Semi-insulating GaAs substrate;
A layer, base layer, emission layer and Window layer are carried on the back in growth in regular turn on doped layer, form the solar cell functional layer;
The cap layer of on the solar cell functional layer, growing, above step forms epitaxial wafer;
Adopt photoetching and wet etching technology, etch the groove that is deep to substrate in the centre of epitaxial wafer;
Epitaxial wafer groove one side is etched to doped layer, forms table top;
Adopting the sulfuration method is that the sidewall of solar cell functional layer carries out Passivation Treatment to the groove both sides;
Cap layer above the solar cell functional layer is partly removed;
Insulation filling layer, metal light shield layer and last insulation filling layer form sandwich structure under growing successively in groove, and this time insulation filling layer is filled between the doped layer, and is covered in an end and cap layer one end and the part surface of solar cell functional layer; This metal light shield layer grows in down on the insulation filling layer centre, and its area is less than the area of following insulation filling layer; The insulation filling layer be should go up and insulation filling layer and metal light shield layer were covered in down;
The growing metal electrode is positioned on the table top that forms on the doped layer, and is covered in the upper surface of insulation filling layer and most of cap layer, forms the solar cell array of series connection;
Adopt photoetching technique and magnetron sputtering technique both sides, grow two outputs at solar cell array one end of series connection.
The material of wherein said doped layer is n-GaAs, and thickness is 2-3 μ m, and doping content is greater than 5 * 10 17Cm -3
The material of wherein said solar cell functional layer is multilayer n-GaAs/p-GaAs, and thickness is 1-1.5 μ m.
The material that wherein descends insulation filling layer and last insulation filling layer is SiO 2Or polyimides; Metal electrode is the Au/Ti double-decker.
The thickness range of ultra-thin solar cell epitaxial wafer is selected according to the absorption coefficient of GaAs material among the present invention.The doping content of emission layer and base layer is comprehensively decided according to the open circuit voltage and the conversion efficiency of GaAs solar cell.The doping content of cap layer and dorsum electrode layer and thickness require to select according to the metal-semiconductor ohmic contact craft.Antireflective coating thickness is selected according to optical principle.Effectively decide according to the required electric current of load in the extinction zone.Groove width, mesa width etc. will be selected according to retrofit specification requirements such as photoetching.
Key of the present invention is to adopt super-thin high efficient GaAs solar cell growing technology and retrofit technology, by rational array design and technical flow design, has obtained the miniature solar battery array of Adjustable Output Voltage joint.
Description of drawings
For further specifying content of the present invention, below in conjunction with embodiment and accompanying drawing the present invention is done a detailed description, wherein:
Fig. 1 is a single chip integrated miniature solar battery array partial structurtes profile of the present invention.
Fig. 2 is the ultra-thin solar cell epitaxial slice structure schematic diagram among the present invention.
Fig. 3 is a single chip integrated miniature solar battery array structure vertical view of the present invention.
Embodiment
See also shown in Figure 1, a kind of single chip integrated miniature solar battery array of the present invention, comprising (following is the structure of a unit of single chip integrated miniature solar battery array):
One substrate 10, this substrate 10 is insulation GaAs substrate;
Doped layer 20, this doped layer 20 is grown in the top both sides of substrate 10; The material of wherein said doped layer 20 is n-GaAs, and thickness is 2-3 μ m, preferred thickness 2.4 μ m, and doping content is greater than 5 * 10 17Cm -3
One solar cell functional layer 70, be grown in doped layer 20 above, Passivation Treatment has been carried out in its side, solar cell functional layer 70 is a multi-layer film structure, each that comprises layer is followed successively by a back of the body layer 30 ', base layer 40 ', emission layer 50 ' and Window layer 60 ' from bottom to up, wherein:
The material of a back of the body layer 30 ' is n-AlGaAs, and thickness is 0.03-0.06 μ m, and preferred thickness is 0.05 μ m, and doping content is 5 * 10 17Cm -3-2 * 10 18Cm -3, preferred concentration is 2 * 10 18Cm -3
The material of base layer 40 ' is n-GaAs, and thickness is 0.6-0.8 μ m, and preferred thickness is 0.7 μ m, and doping content is 1 * 10 17Cm -3-5 * 10 17Cm -3, preferred concentration is 1 * 10 17Cm -3
The material of emission layer 50 ' is p-GaAs, and thickness is 0.2-0.4 μ m, and preferred thickness is 0.3 μ m, and doping content is 5 * 10 17Cm -3-2 * 10 18Cm -3, preferred concentration is 2 * 10 18Cm -3
Window layer 60 ' material is p-AlGaAs, and thickness is 0.02-0.06 μ m, and preferred thickness is 0.04 μ m, and doping content is 1 * 10 18Cm -3-5 * 10 18Cm -3, preferred concentration is 5 * 10 18Cm -3
Capful layer 80, be grown in solar cell functional layer 70 above, the material of this cap layer 80 is p-GaAs, thickness is 0.5-1 μ m, preferred thickness is 0.5 μ m, doping content is 2 * 10 18Cm -3-2 * 10 19Cm -3, preferred concentration is 1 * 10 19Cm -3, area aligns with solar cell functional layer 70 1 sides less than the area of solar cell functional layer 70;
Once the insulation filling layer 30, are filled between the doped layer 20, and are covered in an end and cap layer 80 1 ends and the part surface of solar cell functional layer 70, and material is SiO 2Or polyimides, if adopt SiO 2Insulating barrier, then its thickness is 300-500nm, preferred thickness 400nm;
One metal light shield layer 40, grow in down on insulation filling layer 30 centre, its area is less than the area of following insulation filling layer 30, and material is Au or Ag, and thickness is 300-500nm, preferred thickness is 400nm, perhaps be the Au/Ti double-decker, Au thickness 250-350nm, preferred thickness 300nm, Ti thickness 150-250nm, preferred thickness 200nm;
Insulation filling layer 50 on one is covered in down insulation filling layer 30 and metal light shield layer 40, and material is SiO 2Or polyimides, if adopt SiO 2Insulating barrier, then its thickness is 300-500nm, preferred thickness 400nm;
One metal electrode 60, grow on the doped layer 20 of a side, and be covered in the upper surface of insulation filling layer 50 and most of cap layer 80, material is Au, with the ohmic contact of cap layer 80 be Au-Ti-pGaAs, with the ohmic contact of doped layer 20 be Au-Ge-Ni-nGaAs.
Please consult Fig. 1, Fig. 2 and Fig. 3 again, the preparation method of a kind of single chip integrated miniature solar battery array of the present invention comprises the steps (following is the making step of a cellular construction of single chip integrated miniature solar battery array):
Semi-insulating GaAs substrate 10 is provided;
Utilize metal organic chemical compound vapor deposition method or Liquid, grow doping layer 20 on Semi-insulating GaAs substrate 10;
A layer 30 ', base layer 40 ', emission layer 50 ' and Window layer 60 ' are carried on the back in growth in regular turn on doped layer 20, form solar cell functional layer 70 (among Fig. 2);
Growth cap layer 80 on solar cell functional layer 70, above step forms epitaxial wafer, wherein:
The purity in source should be greater than 5N (5 more than 9),
Temperature control precision should be less than 1K,
MOCVD generally adopts low-pressure growth,
Need high temperature preheating (700-1073K) before the substrate bracket high-frequency induction heating, epitaxial growth, growth course adopts two-step method, at first is low temperature slow growth one transition zone, and then other each layer etc. of growing.
Adopt photoetching and wet etching technology, etch the groove that is deep to substrate 10 in the centre of epitaxial wafer, groove is mutual is spaced apart 20 μ m-40 μ m, preferred interval is 25 μ m, forms separate solar battery cell, and it is rectangular, length of side 400-1000 μ m regulates according to loading demand;
Epitaxial wafer groove one side is etched to doped layer 20, forms table top, mesa width 100-200 μ m, preferable width 120 μ m, table surface height are positioned at height and mix n type doped layer 20 middle parts, highly apart from substrate 1-2 μ m, preferred heights 1.5 μ m;
Adopting the sulfuration method is that the sidewall of solar cell functional layer 70 carries out Passivation Treatment to the groove both sides, is the sulfuration passivating technique of (NH4) 2S solution to GaAs, and concrete operations are for to be soaked in epitaxial wafer in (NH4) 2S solution, and temp-controlling and time-controlling;
Cap layer 80 parts above the solar cell functional layer 70 are removed, and the zone of removing cap layer is effective extinction zone of element cell, and area size is according to the proportional design of the required electric current of target devices (as MEMS);
Insulation filling layer 30, metal light shield layer 40 and last insulation filling layer 50 under in groove, growing successively, form sandwich structure, this time insulation filling layer 30 is filled between the doped layer 20, and is covered in an end and cap layer 80 1 ends and the part surface of solar cell functional layer 70; This metal light shield layer 40 grows in down on insulation filling layer 30 centre, and its area is less than the area of following insulation filling layer 30; Insulation filling layer 50 be should go up and insulation filling layer 30 and metal light shield layer 40 were covered in down; Wherein the material of insulation filling layer is SiO2 or polyimides up and down; Metal light shield layer 40 is Au or Ag for material, perhaps is the Au/Ti double-decker;
Growing metal electrode 60, be positioned on the table top that forms on the doped layer 20, and be covered in the upper surface of insulation filling layer 50 and most of cap layer 80, form the solar cell array of series connection, material is Au, with the ohmic contact of cap layer 80 be Au-Ti-pGaAs, with the ohmic contact of doped layer 20 be Au-Ge-Ni-nGaAs, and carry out the temperature control alloy treatment;
Adopt photoetching technique and the magnetron sputtering technique both sides at solar cell array one end of series connection, grow two output terminals A, B (among Fig. 3), output is common electrode material Au, Ag or Cu, and size is advisable to be fit to spun gold spot welding;
Adopt magnetron sputtering technique, at battery unit superficial growth double layer antireflection coating, antireflective coating adopts Ta 2O 5/ SiO 2Double-layer film structure, Ta 2O 5Layer thickness is 65-75nm, preferred thickness 69.25nm, SiO 2Layer thickness is 95-105nm, preferred thickness 100.84nm;
Adopt the IC encapsulation technology that array is encapsulated, mainly adopt polymer that the edge is protected.
The present invention proposes a kind of miniature solar cell array based on the GaAs thin film solar cell, fully combine the advantage of GaAs solar cell and fine processing, can be in the potentiality of small yardstick performance GaAs solar cell. Therefore, the present invention can more effectively improve the matching of existing solar cell and MEMS, can significantly widen the scope of application of existing MEMS.

Claims (10)

1. a single chip integrated miniature solar battery array is characterized in that, comprising:
One substrate;
Doped layer, this doped layer are grown in the top both sides of single chip integrated each unit substrate of miniature solar battery array;
One solar cell functional layer, be grown in doped layer above;
The capful layer, be grown in the solar cell functional layer above, the area of this cap layer aligns with solar cell functional layer one side less than the area of solar cell functional layer;
Once the insulation filling layer is filled between the doped layer, and is covered in an end and cap layer one end and the part surface of solar cell functional layer;
One metal light shield layer grows in down on the insulation filling layer centre, and its area is less than the area of following insulation filling layer;
Insulation filling layer on one is covered in down insulation filling layer and metal light shield layer;
One metal electrode grows on the doped layer of a side, and is covered in the upper surface of insulation filling layer and most of cap layer.
2. single chip integrated miniature solar battery array according to claim 1 is characterized in that, wherein said substrate is insulation GaAs substrate.
3. single chip integrated miniature solar battery array according to claim 1 is characterized in that, the material of wherein said doped layer is n-GaAs, and thickness is 2-3 μ m, and doping content is greater than 5 * 10 17Cm -3
4. single chip integrated miniature solar battery array according to claim 1 is characterized in that, the material of wherein said solar cell functional layer is multilayer n-GaAs/p-GaAs, and thickness is 1-1.5 μ m.
5. single chip integrated miniature solar battery array according to claim 1 is characterized in that Passivation Treatment is carried out in the side of wherein said solar cell functional layer.
6. single chip integrated miniature solar battery array according to claim 1 is characterized in that, the material that wherein descends insulation filling layer and last insulation filling layer is SiO 2Or polyimides; Metal electrode is the Au/Ti double-decker.
7. the preparation method of a single chip integrated miniature solar battery array is characterized in that, comprises the steps:
The Semi-insulating GaAs substrate is provided;
Utilize metal organic chemical compound vapor deposition method or Liquid, grow doping layer on the Semi-insulating GaAs substrate;
A layer, base layer, emission layer and Window layer are carried on the back in growth in regular turn on doped layer, form the solar cell functional layer;
The cap layer of on the solar cell functional layer, growing, above step forms epitaxial wafer;
Adopt photoetching and wet etching technology, etch the groove that is deep to substrate in the centre of epitaxial wafer;
Epitaxial wafer groove one side is etched to doped layer, forms table top;
Adopting the sulfuration method is that the sidewall of solar cell functional layer carries out Passivation Treatment to the groove both sides;
Cap layer above the solar cell functional layer is partly removed;
Insulation filling layer, metal light shield layer and last insulation filling layer form sandwich structure under growing successively in groove, and this time insulation filling layer is filled between the doped layer, and is covered in an end and cap layer one end and the part surface of solar cell functional layer; This metal light shield layer grows in down on the insulation filling layer centre, and its area is less than the area of following insulation filling layer; The insulation filling layer be should go up and insulation filling layer and metal light shield layer were covered in down;
The growing metal electrode is positioned on the table top that forms on the doped layer, and is covered in the upper surface of insulation filling layer and most of cap layer, forms the solar cell array of series connection;
Adopt photoetching technique and magnetron sputtering technique both sides, grow two outputs at solar cell array one end of series connection.
8. the preparation method of single chip integrated miniature solar battery array according to claim 7 is characterized in that, the material of wherein said doped layer is n-GaAs, and thickness is 2-3 μ m, and doping content is greater than 5 * 10 17Cm -3
9. the preparation method of single chip integrated miniature solar battery array according to claim 7 is characterized in that, the material of wherein said solar cell functional layer is multilayer n-GaAs/p-GaAs, and thickness is 1-1.5 μ m.
10. the preparation method of single chip integrated miniature solar battery array according to claim 7 is characterized in that, the material that wherein descends insulation filling layer and last insulation filling layer is SiO 2Or polyimides; Metal electrode is the Au/Ti double-decker.
CN2009100785595A 2009-02-25 2009-02-25 Miniature solar battery array integrated by single chips and preparation method thereof Expired - Fee Related CN101814538B (en)

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CN102738267B (en) * 2012-06-20 2015-01-21 中国科学院苏州纳米技术与纳米仿生研究所 Solar battery with superlattices and manufacturing method thereof
CN102738266B (en) * 2012-06-20 2015-01-21 中国科学院苏州纳米技术与纳米仿生研究所 Solar cell with doping superlattice and method for manufacturing solar cell
CN103123923B (en) * 2013-01-31 2016-08-03 中国科学院苏州纳米技术与纳米仿生研究所 A kind of laser photovoltaic cell and preparation method thereof
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