CN101808479B

CN101808479B - Technique for reducing the number of layers in multilayer circuit board

Info

Publication number: CN101808479B
Application number: CN2010101423363A
Authority: CN
Inventors: 安内塔·维日科夫斯卡; 赫尔曼·邝; 盖伊·A·达克斯伯瑞; 路易吉·G·迪菲利波
Original assignee: Northern Telecom Ltd
Current assignee: Nortel Networks Ltd
Priority date: 2000-06-19
Filing date: 2003-09-25
Publication date: 2012-03-21
Anticipated expiration: 2023-09-25
Also published as: CN101808479A

Abstract

A technique for reducing the number of layers in a multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from a surface of the multilayer circuit board is disclosed. The technique is realized by a method comprising: forming a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers; arranging the surface such that a first set of two power/ground pins corresponds to a first via and a second set of two power/ground pins corresponds to a second via positioned adjacent the first via, thereby creating a channel; and routing a first plurality of electrical signals through the channel on the first of the plurality of electrically conductive signal layers.

Description

Reduce the method for the number of plies in the signal routing equipment

The application is that application number is 03159457.3, the applying date is on September 25th, 2003, denomination of invention is divided an application for the application for a patent for invention of " reducing the technology of the number of plies in the signal routing equipment ".

The reference of related application

Present patent application is to be on April 22nd, 2002 applying date; Number of patent application is 10/126700 (to be 6545876 for U.S. Patent number now; Authorize on April 8th, 2003) the continuous part application of United States Patent (USP), above-mentioned application also is to be on August 30th, 2000 applying date, number of patent application is 09/651188 (to be 6388890 for U.S. Patent number now; Authorize on May 14th, 2002) the continuous patent application of United States Patent (USP), each of above-mentioned application is all quoted as a reference at this.

Present patent application also is to be on March 20th, 2002 applying date; Number of patent application is 10/101211; Authorize the continuous part application of United States Patent (USP) of the patent No. US TBA of day (TBD) undetermined, above-mentioned application also is to be on August 30th, 2000 applying date, and number of patent application is 09/651188 (to be U.S. Patent number 6388890 now; Authorize on May 14th, 2002) the continuous part application of United States Patent (USP); It requires application number is 60/212387, and the applying date is the priority of the U.S. Provisional Patent Application on June 19th, 2000, and each of above-mentioned application is all quoted as a reference at this.

Technical field

The present invention relates to the multilayer signal wiring unit, more specifically, relate to a kind of technology that reduces the number of plies of signal routing equipment.

Background technology

All realized since the electrical connection for a long time between the electronic component through the use printed circuit board (PCB).Initial circuit board has only a signals layer on the upper surface, is used to the electronic component wiring that is mounted thereon.These mono signal layer circuit boards have very big restriction to being installed in the signal of telecommunication number that can connect up between the electronic component on the same circuit board.That is to say, be installed on the number of the signal of telecommunication that can connect up between the electronic component on the mono signal layer circuit board, receive the restriction of the area size of mono signal layer.

The area constraints relevant with the mono signal layer circuit board caused the development of multilayer board.This multilayer board can be single face or two-sided, and surface or its inlet part of multilayer board can have a plurality of signals layers.Like this, this multilayer board has obtained significantly increasing at the number of the signal of telecommunication that can connect up between the electronic components mounted on the same circuit board.

When use has the electronic component of high-density packages, use multilayer board especially favourable.That is to say, the electronic component with high-density packages need usually a plurality of layers of multilayer board accomplish with same circuit board on being electrically connected of the other electron component installed.In fact, in typical case the density of electronic package has been stipulated the number of plies that the multilayer board of installation electronic component must provide.Though the multilayer board number of plies that can provide is hard-core in theory, when the number of plies of multilayer board surpasses certain reasonably during value, when particularly attempting between electronic component to connect up, will go wrong for high-speed electrical signals.For example, when being electrically connected between the different layers at multilayer board, use the conduction perforation usually.Though these conduction perforation make that the direct vertical electrical between the different layers is connected to become possibility in the multilayer board, exist with these and conduct electricity the relevant inherent ghost effect of boring a hole, this possibly have a negative impact to the performance of the signal of propagation therein.Just, these conduction perforation have inherent spurious impedance, capacitive reactance and the induction reactance that the signal of propagating along each conduction perforation is had a negative impact.In addition, these inherent ghost effects also possibly have a negative impact to the manufacturing of printed circuit board (PCB), and then influence its cost.Because they are to the negative effect of characteristics of signals, these inherent ghost effects also possibly limit along the bandwidth of the signal of each conduction perforation propagation.These negative effects can only be along with the increases of the number of plies of multilayer board and are increased.

Consider the problems referred to above, expectation provides a kind of under the situation of the number of plies that does not increase multilayer board, increases the technology of the electrical connection number between the electronic components mounted on the multilayer board.More specifically, expectation provide a kind of with effectively with mode cheaply, reduce the technology of the number of plies in the multilayer signal wiring unit.

Summary of the invention

According to the present invention, a kind of technology that reduces the number of plies in the multilayer signal wiring unit is provided.In a specific exemplary embodiment; Present technique may be implemented as a kind of method that reduces the number of plies in the multilayer signal wiring unit, and multilayer signal wiring unit wherein has a plurality of conductive signal path layers that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit imports and exports the signal of telecommunication that are used to.In the case, this method comprises, receives the information (comprising the number characteristic of the conductive contact of at least one electronic component, the spaced features of conductive contact, the signal type characteristic of conductive contact, the sense characteristic of conductive contact) of electronic component.This method comprises also that at least part according in the spaced features of the number characteristic of the conductive contact of electronic component and conductive contact at least one, discerns the electronic component with high density conductive contact array package.This method further comprises; At least part is according in the sense characteristic of the signal type characteristic of conductive contact and conductive contact at least one; Coming in a plurality of conductive signal path layers in the multilayer signal wiring unit is electric signal wiring line, with the inside and outside high density conductive contact array package that is connected.

Others according to this certain exemplary embodiments of the present invention; This method further can also comprise following content; A plurality of conduction perforation are set in the multilayer signal wiring unit; These perforation extend to the one deck a plurality of conductive signal path layers from the surface of multilayer signal wiring unit, and wherein a plurality of conduction perforation are arranged as follows, promptly form a passage above one of a plurality of conductive signal path layers below being in these a plurality of conduction perforation.If situation is like this, can passage be set to have linear, circle, rhombus, shaped form, stepped or shape, perhaps their combination arbitrarily.And, can passage be set to vertically, level, inclination or direction, perhaps their combination arbitrarily.Also have, can a plurality of conduction perforation be extended on the different layers a plurality of conductive signal path layers from the multilayer signal wiring unit.

A plurality of conduction perforation can form at least a portion of conductive contact array; To cooperate the high density conductive contact array package of electronic component; At least a portion in wherein a plurality of conduction perforation can be set at the inside of conductive contact array, makes passage be formed on the inside of conductive contact array accordingly.In addition; This multilayer signal wiring unit can have a conductive contact array on the surface therein; High density conductive contact array package with electronic component is complementary; Wherein the perforation of at least a portion conduction can be formed on the outside of conductive contact array, and each conduction perforation can be electrically connected with the lip-deep peripheral conductive contact of this multilayer signal wiring unit.

A plurality of conduction perforation can form at least a portion of conductive contact array; To cooperate the high density conductive contact array package of electronic component; At least a portion in wherein a plurality of conduction perforation can be placed on the inside of conductive contact array, makes passage can cross the conductive contact array.In addition; A plurality of conduction perforation can form at least a portion of conductive contact array; Cooperating the high density conductive contact array package of electronic component, conductive contact array wherein can have square a, triangle, circle or perhaps above-mentioned various combination of conductive contact shape arbitrarily.And at least two signals of telecommunication can be differential electrical signals, and this differential electrical signals can be routed in the passage that forms in another the many conductive signal path layer below these a plurality of conduction perforation at least in part together.

According to certain exemplary embodiments of the present invention on the other hand, the multilayer signal wiring unit can have at least one conduction bus plane, is used for for the lip-deep electronic component that is installed in this multilayer signal wiring unit power supply being provided.In this case; Method maybe be further comprising the steps of: a plurality of conduction perforation are set in this multilayer signal wiring unit; These perforation extend to the one deck at least said at least one conduction bus plane from the surface of multilayer signal wiring unit, wherein each conduction perforation can be electrically connected to this multilayer signal wiring unit lip-deep at least one independently conduct electricity power contact.In said at least one conduction power contact each can form the part of a part of conductive contact array, with the high density conductive contact array package of coupling electronic component.In this case, can form a passage in each the conductive signal path layer below this conduction power contact.

According to certain exemplary embodiments of the present invention on the other hand, the multilayer signal wiring unit can have at least one conductive formation, and being used for provides with reference to ground for the lip-deep electronic component that is installed in this multilayer signal wiring unit.In this case; Method maybe be further comprising the steps of: in this multilayer signal wiring unit, form a plurality of conduction perforation; These perforation extend to the one deck at least said at least one conductive earthing layer from the surface of multilayer signal wiring unit, and wherein each conduction perforation can be electrically connected to lip-deep at least one conductive earthing contact independently of this multilayer signal wiring unit.In said at least one conductive earthing contact each can form a part of conductive contact array, with the high density conductive contact array package of coupling electronic component.In this case, can form a passage in each the conductive signal path layer below this conductive earthing contact.

According to certain exemplary embodiments of the present invention on the other hand, the multilayer signal wiring unit can have at least one conduction utility power/stratum, is used for for the lip-deep electronic component that is installed in this multilayer signal wiring unit power supply/ground being provided.In this case; Method maybe be further comprising the steps of: in this multilayer signal wiring unit, form a plurality of conduction perforation; These perforation extend to the one deck at least said at least one conduction power/ground layer from the surface of multilayer signal wiring unit, wherein each conduction perforation can be electrically connected to this multilayer signal wiring unit lip-deep at least one independently conduct electricity power supply/contact, ground.In said at least one conduction power supply/contact, ground each can form at least a portion conductive contact array, with the high density conductive contact array package of coupling electronic component.In this case, said at least one the conduction power supply/contact, ground each below each conductive signal path layer in can form a passage.

According to certain exemplary embodiments of the present invention on the other hand, the surface of said multilayer signal wiring unit can be an inner surface of this multilayer signal wiring unit, and at least one electronic component can be installed on the inner surface of this multilayer signal wiring unit.In this case; Said at least one electronic component can have at least one first conductive contact on its first side, this at least one first conductive contact can be electrically connected at least one the first corresponding conductive contact on the inner surface that is formed on this multilayer signal wiring unit.Preferably; Described at least one electronic component can have at least one and be formed on second conductive contact on second side, and this at least one second conductive contact can be electrically connected at least one the second corresponding conductive contact on another inner surface that is formed on this multilayer signal wiring unit.

Combine accompanying drawing that exemplary embodiment of the present invention is described in detail now.Though the following description of this invention should be appreciated that with reference to accompanying drawing the present invention is not limited in these embodiment.Those of ordinary skills are after the technology of having seen here; Can tell other execution mode, and revise, embodiment reaches in other Application for Field; All will fall into the present invention disclosed here and the statement scope within, this point have important effect for the present invention.

Description of drawings

For ease to more complete understanding of the present invention, referring now to accompanying drawing.These figure should not be counted as restriction of the present invention, and are for the purpose of illustration only.

Fig. 1 is a side sectional view according to multilayer board of the present invention;

Fig. 2 has shown the mounted on surface grid array layout of the electronic package with 1247 I/O (I/O) contact;

Fig. 3 has shown 1/4th (like, bottom right 1/4th) of layout shown in Figure 2;

Fig. 4 has shown the part of the basic layer of multilayer board shown in Figure 1;

Fig. 5 has shown the part of the first power/ground planes layer of multilayer board shown in Figure 1;

Fig. 6 has shown the part of first signals layer of multilayer board shown in Figure 1;

Fig. 7 has shown the part of the second source/ground plane layer of multilayer board shown in Figure 1;

Fig. 8 has shown the part of the secondary signal layer of multilayer board shown in Figure 1;

Fig. 9 has shown the part of the 3rd power/ground planes layer of multilayer board shown in Figure 1;

Figure 10 has shown the part of the 4th power/ground planes layer of multilayer board shown in Figure 1;

Figure 11 has shown the part of the 3rd signals layer of multilayer board shown in Figure 1;

Figure 12 has shown the part of the 5th power/ground planes layer of multilayer board shown in Figure 1;

Figure 13 has shown the part of the 4th signals layer of multilayer board shown in Figure 1;

Figure 14 has shown the part of the 6th power/ground planes layer of multilayer board shown in Figure 1;

Figure 15 has shown the part of the secondary layer of multilayer board shown in Figure 1;

Figure 16 has shown an optional embodiment of a part of basic layer of multilayer board shown in Figure 1;

Figure 17 is a side sectional view according to another multilayer board of the present invention;

Figure 18 A has shown an electronic component with conductive contact, and conductive contact is on its side, in order to the one deck that is in multilayer board shown in Figure 17 on corresponding electric contact connect;

Figure 18 B has shown an electronic component with conductive contact, and conductive contact is on its a plurality of sides, in order to the multilayer that is in multilayer board shown in Figure 17 on corresponding electric contact connect.

Embodiment

With reference to figure 1, wherein shown a side sectional view according to multilayer board 10 of the present invention.Just, this multilayer board 10 has combined thought of the present invention, to reduce the number of plies of multilayer board 10.

Multilayer board 10 comprises basic layer (top layer) 12 a, secondary layer (bottom) 14, a plurality of signals layer 16, and a plurality of power/ground planes layers 18.Should notice that basic layer 12 and secondary layer 14 are main power/ground planes layers except the path to the contact pad that forms on it and test signal.Should also be noted that electronic component can be installed on any (the monolateral plate) or both (bilateral plate) in basic layer 12 and the secondary layer 14.

Multilayer board 10 also comprises one first super large perforation 20, be used to be electrically connected a plurality of signals layers 16 (as, signals layer 16b and 16c) in the layer chosen; One second super large perforation 22; Be used to be electrically connected basic layer 12, secondary layer 14 and a plurality of power/ground planes layer 18 (as, power/

ground planes layer

18a, 18c, 18e and 18f) in the layer chosen, imbed for one and bore a hole 24; Be used to be electrically connected a plurality of signals layers 16 (as;

Signals layer

16a and 16d) in the layer chosen, a small perforation 26 is used to be electrically connected the contact pad 28 that forms on signals layer 16a and the basic layer 12.

Should be noted that imbed the perforation 24 and/or small perforation 26 can also be used for being electrically connected the layer that a plurality of power/ground planes layers 18 are chosen.Be further noted that; Small perforation 26 can also be perforation in the pad; Or some similar non-penetrating type perforation; Small perforation 26 can be formed on any or both in basic layer 12 and the secondary layer 14, and small perforation 26 can be directly or bore a hole with other small perforation, super large, imbed perforation or the like and be electrically connected through signals layer or power/ground planes layer.Should also be noted that small just perforation 26 (or essentially equivalent body wherein) makes the substantial portion of the present invention's technology be achieved, this will describe in detail with reference to figure 2-16, and wherein Fig. 4-16 is corresponding to 12 layers of multilayer board 10.

With reference to figure 2, wherein shown the mounted on surface grid array of the encapsulation of electronic component with 1247 I/O (I/O) contact.Fig. 2 has also shown a legend of having indicated the signal type relevant with the I/O contact.

From understanding this detailed purpose of description better, in order to increase resolution, Fig. 3 has shown one 1/4th (being bottom right 1/4th) 32 of the layout 30 among Fig. 2.Fig. 4-16 directly conforms to four shown in Fig. 3/1.Signal type legend among Fig. 2 also is applied to Fig. 3, and Fig. 4-16.

With reference to figure 4, wherein shown a part 34 of the basic layer 12 of multilayer board 10.As implied above, this part 34 of basic layer 12 directly conforms to four shown in Fig. 3/1.Just, this part 34 of basic layer 12 is corresponding to the appropriate section of multilayer board 10, and the electronic component that one of them has the mounted on surface grid array packages of 1247 I/O contacts is installed on the multilayer board 10.

As implied above, except the test signal path and contact pad that form above that, basic layer 12 mainly is a power/ground planes layer.Particularly; Basic layer 12 comprises that one is electrically connected with ground contact pad (being the GND in the legend), but the ground level that is not electrically connected with power contact pad (being Vdd and the Vdd2 in the legend), signalling contact pad (being the signal in the legend) or test contact pad (being the test in the legend).The ground level of basic layer 12 also not with basic layer 12 on a plurality of test signal paths 36 of forming be electrically connected.

The zone 38 that has also shown multilayer board 10 among Fig. 4 is forming passage according to the present invention in other layer at multilayer board 10 on this zone.The place that forms perforation in small perforation and the pad in the multilayer board 10 has also been indicated in these zones 38.Just, all contact pad in these zones 38 form with the form of boring a hole in small perforation or the pad, so that the formation of the passage in other layer of multilayer board of the present invention 10.

With reference to figure 5, wherein shown the part 40 of the power/ground planes layer 18a of multilayer board 10.As implied above, this part 40 of power/ground planes layer 18a directly conforms to four shown in Fig. 3/1.Just, this part 40 of power/ground planes layer 18a is corresponding to the appropriate section of

multilayer board

10, and 1/4th electronic components with mounted on surface grid array packages of 1247 I/O contacts are installed on the multilayer board 10 on it.

Except the perforation to formation on it, power/ground planes layer 18a mainly is a ground plane layer.More specifically, power/ground planes layer 18a comprises that one is electrically connected with ground perforation (being the GND in the legend), but the ground level that is not connected with power supply perforation (being the Vdd and Vdd2 in the legend) or signal perforation (being the signal in the legend).Attention does not form the test perforation on power/ground planes layer 18a, because test contact pad and test signal path only are formed on the basic layer 12.

The zone 38 that in Fig. 5, has also shown multilayer board 10 has formed passage according to the present invention on it in other layer of multilayer board 10.Equally, the place that forms perforation in small perforation and the pad in the multilayer board 10 has also been indicated in these zones 38.Just, all contact pad in these zones 38 form with the form of boring a hole in small perforation or the pad, with the formation of the passage in other layer that makes things convenient for multilayer board 10 of the present invention.

With reference to figure 6, wherein shown the part 42 of the signals layer 16a of multilayer board 10.As implied above, this part 42 of signals layer 16a directly conforms to four shown in Fig. 3/1.Just, this part 42 of power/ground planes layer 18a is corresponding to the appropriate section of

multilayer board

Signals layer 16a comprises a plurality of conductive signal path 44 that small perforation or the penetration perforation in the zone 38 with multilayer board 10 is electrically connected, and wherein according to the present invention, tunnel-shaped is formed in other layer of multilayer board 10.In typical case, the characteristic of the signal that carries according to them of these signal paths 44 selects in advance.Just, signal path 44 can carry high speed signal.Perhaps, signal path 44 can carry low speed signal.More importantly, small perforation that in the zone 38 of multilayer board 10, forms or penetration perforation extend in the multilayer board 10 dark unlike extending among the signals layer 16a.This make passage can be formed on these small perforation or penetration perforation in other layer of multilayer board 10 below.

With reference to figure 7, wherein shown the part 46 of the power/ground planes layer 18b of multilayer board 10.As implied above, this part 46 of power/ground planes layer 18b directly conforms to four shown in Fig. 3/1.Just, this part 46 of power/ground planes layer 18b is corresponding to the appropriate section of

multilayer board

Except the perforation to formation on it, power/ground planes layer 18b mainly is a power plane layer.More specifically, power/ground planes layer 18b comprises that one is electrically connected with power supply perforation (being the Vdd in the legend), but the power plane that is not connected with ground perforation (being the GND in the legend) or signal perforation (being the signal in the legend).Note, on power/ground planes layer 18b, do not form the test perforation, because test contact pad and test signal path generally only are formed on the basic layer 12.Should also be noted that on the power/ground planes layer 18b in the zone 38 of multilayer board 10 to form perforation, thus according to the present invention, multilayer board 10 this with other layer in these zones 38 in form passage.These zones 38 of multilayer board 10 not perforation on power/ground planes layer 18b is because small perforation or penetration perforation only extend to signals layer 16a from basic layer 12 in these zones 38 of multilayer board 10, as stated.

With reference to figure 8, wherein shown the part 48 of the signals layer 16b of multilayer board 10.As implied above, this part 48 of signals layer 16b directly conforms to four shown in Fig. 3/1.Just, this part 48 of signals layer 16b is corresponding to the appropriate section of multilayer board 10, one of them have 1247 I/O contacts the mounted on surface grid array packages electronic component 1/4th, be installed on the multilayer board 10.

Signals layer 16b comprises a plurality of conductive signal path 50 that the perforation that forms among the zone 38 external signals layer 16b with multilayer board 10 is electrically connected, wherein in tunnel-shaped this layer of being formed in multilayer board 10 and other layer.According to the present invention, many being routed in these passages in these signal paths 50.Just, the passage through not using perforation to form among the signals layer 16b in the zone 38 of multilayer board 10 makes a plurality of conductive signal path 50 to connect up above that.On the contrary, if in this layer of multilayer board 10 and other layer, have perforation in these zones 38, then needing extra signals layer is a plurality of conductive signal path 50 wirings.Therefore, in this layer of multilayer board 10 and these zones 38 in other layer, do not use perforation, the feasible number that can reduce signals layer required in the multilayer board 10 on the whole.

This point should be noted that the passage that forms in the zone 38 of multilayer board 10 preferably is arranged at least one edge of intersection grid array.The benefit of this arrangement is, makes a plurality of conductive signal path 50 can in grid array, be more prone to outwards wiring of ground.In fact, as shown in Figure 8, some the passage interconnection that forms in the zone 38 of multilayer board 10 more than one grid array edge.In typical case, these polygon edge cross aisles are made up of the quadrature row and column, but also can be oblique or pattern arbitrarily.

Should also be noted that formed passage can have various width in the zone 38 of multilayer board 10.Just, although the passage of the formation in the zone 38 of multilayer board shown in Figure 8 10 has the width of a contact pad or perforation, the present invention is not limited thereto.For example; The width of channel of the formation in the zone 38 of multilayer board 10 can be the width of two or more contact pad or perforation; This depends on and has used what small perforation or penetration perforation, and according to reality of the present invention as stated, has removed what perforation.

With reference to figure 9, wherein shown the part 52 of the power/ground planes layer 18c of multilayer board 10.As implied above, this part 52 of power/ground planes layer 18c directly conforms to four shown in Fig. 3/1.Just; This part 52 of power/ground planes layer 18c is corresponding to the appropriate section of multilayer board 10; One of them have 1247 I/O contacts the mounted on surface grid array packages electronic component 1/4th, be installed on the multilayer board 10.

Except the perforation to formation on it, power/ground planes layer 18c mainly is a ground plane layer.More specifically, power/ground planes layer 18c comprises that one is electrically connected with ground perforation (being the GND in the legend), but the ground level that is not connected with power supply perforation (being the Vdd and Vdd2 in the legend) or signal perforation (being the signal in the legend).Attention does not form the test perforation on power/ground planes layer 18c, because test contact pad and test signal path only are formed on the basic layer 12.Should also be noted that on the power/ground planes layer 18c in the zone 38 of multilayer board 10 to form perforation, thereby, in the zone 38 in this layer of multilayer board 10 and other layer, form passage according to the present invention.The zone 38 of multilayer board 10 is not perforation on power/ground planes layer 18c, because small perforation or penetration perforation only extend to signals layer 16a from basic layer 12 in the zone 38 of multilayer board 10, as stated.

With reference to Figure 10, wherein shown the part 54 of the power/ground planes layer 18d of multilayer board 10.As implied above, this part 54 of power/ground planes layer 18d directly conforms to four shown in Fig. 3/1.Just; This part 54 of power/ground planes layer 18d is corresponding to the appropriate section of multilayer board 10; One of them have 1247 I/O contacts the mounted on surface grid array packages electronic component 1/4th, be installed on the multilayer board 10.

18b is similar with the power/ground planes layer, and except the perforation to formation on it, power/ground planes layer 18d mainly is a power plane layer.More specifically, power/ground planes layer 18d comprises that one is electrically connected with power supply perforation (being the Vdd2 in the legend), but the power plane that is not connected with ground perforation (being the GND in the legend) or signal perforation (being the signal in the legend).Note, on power/ground planes layer 18d, do not form the test perforation, because test contact pad and test signal path generally only are formed on the basic layer 12.Should also be noted that on the power/ground planes layer 18d in the zone 38 of multilayer board 10 to form perforation, thereby, in the zone 38 in this layer of multilayer board 10 and other layer, form passage according to the present invention.The zone 38 of multilayer board 10 is not perforation on power/ground planes layer 18d, because small perforation or penetration perforation only extend to signals layer 16a from basic layer 12 in the zone 38 of multilayer board 10, as stated.

With reference to Figure 11, wherein shown the part 56 of the signals layer 16c of multilayer board 10.As implied above, this part 56 of signals layer 16c directly conforms to four shown in Fig. 3/1.Just, this part 56 of signals layer 16c is corresponding to the appropriate section of multilayer board 10, and one of them has 1/4th being installed on the multilayer board 10 of electronic component of the mounted on surface grid array packages of 1247 I/O contacts.

Signals layer 16c comprises outside the zone 38 with multilayer board 10, and a plurality of conductive signal path 58 that the perforation that in signals layer 16c, forms is electrically connected are wherein in tunnel-shaped this layer of being formed in multilayer board 10 and other layer.According to the present invention, many being routed in these passages in these signal paths 58.Just, the passage through not using perforation to form among the signals layer 16c in the zone 38 of multilayer board 10 makes a plurality of conductive signal path 58 to connect up above that.Reverse situation, if in the zone 38 in this layer of multilayer board 10 and other layer, have perforation, then needing extra signals layer is a plurality of conductive signal path 58 wirings.Therefore, in the zone 38 in this layer of multilayer board 10 and other layer, do not use perforation, make the number that can reduce signals layer required in the multilayer board 10 on the whole.

With reference to Figure 12, wherein shown the part 60 of the power/ground planes layer 18e of multilayer board 10.As implied above, this part 60 of power/ground planes layer 18e directly conforms to four shown in Fig. 3/1.Just, this part 60 of power/ground planes layer 18e is corresponding to the appropriate section of multilayer board 10, and one of them has 1/4th being installed on the multilayer board 10 of electronic component of the mounted on surface grid array packages of 1247 I/O contacts.

18c is similar with the power/ground planes layer, and except the perforation to formation on it, power/ground planes layer 18e mainly is a ground plane layer.More specifically, power/ground planes layer 18e comprises that one is electrically connected with ground perforation (being the GND in the legend), but the ground level that is not connected with power supply perforation (being the Vdd and Vdd2 in the legend) or signal perforation (being the signal in the legend).Attention does not form the test perforation on power/ground planes layer 18e, because test contact pad and test signal path only are formed on the basic layer 12.Should also be noted that on the power/ground planes layer 18e in the zone 38 of multilayer board 10 to form perforation, thereby, in the zone 38 in this layer of multilayer board 10 and other layer, form passage according to the present invention.The zone 38 of multilayer board 10 is not perforation on power/ground planes layer 18e, because small perforation or penetration perforation only extend to signals layer 16a from basic layer 12 in the zone 38 of multilayer board 10, as stated.

With reference to Figure 13, wherein shown the part 62 of the signals layer 16d of multilayer board 10.As implied above, this part 62 of signals layer 16d directly conforms to four shown in Fig. 3/1.Just, this part 62 of signals layer 16d is corresponding to the appropriate section of multilayer board 10, and one of them has 1/4th being installed on the multilayer board 10 of electronic component of the mounted on surface grid array packages of 1247 I/O contacts.

Signals layer 16d comprises outside the zone 38 with multilayer board 10, a plurality of conductive signal path 64 that the perforation that in signals layer 16d, forms is electrically connected, wherein tunnel-shaped be formed in multilayer board 10 this with other layer in.According to the present invention, many being routed in these passages in these signal paths 64.Just, the passage through not using perforation to form among the signals layer 16d in the zone 38 of multilayer board 10 makes a plurality of conductive signal path 64 to connect up above that.Reverse situation, if in this layer of multilayer board 10 and other layer, have perforation in the zone 38, then needing extra signals layer is a plurality of conductive signal path 64 wirings.Therefore, multilayer board 10 this with other layer in zone 38 in do not use perforation, make the number can reduce signals layer required in the multilayer board 10 on the whole.

With reference to Figure 14, wherein shown the part 66 of the power/ground planes layer 18f of multilayer board 10.As implied above, this part 66 of power/ground planes layer 18f directly conforms to four shown in Fig. 3/1.Just, this part 66 of power/ground planes layer 18f is corresponding to the appropriate section of multilayer board 10, and one of them has 1/4th being installed on the multilayer board 10 of electronic component of the mounted on surface grid array packages of 1247 I/O contacts.

Similar with power/ground planes layer 18c and power/ground planes layer 18e, except the perforation to formation on it, power/ground planes layer 18f mainly is a ground plane layer.More specifically, power/ground planes layer 18f comprises that one is electrically connected with ground perforation (being the GND in the legend), but the ground level that is not connected with power supply perforation (being the Vdd and Vdd2 in the legend) or signal perforation (being the signal in the legend).Attention does not form the test perforation on power/ground planes layer 18f, because test contact pad and test signal path only are formed on the basic layer 12.Should also be noted that on the power/ground planes layer 18f in the zone 38 of multilayer board 10 to form perforation, thereby in the zone 38 in this layer of multilayer board 10 and other layer, form passage according to the present invention.The zone 38 of multilayer board 10 is not perforation on power/ground planes layer 18f, because small perforation or penetration perforation only extend to signals layer 16a from basic layer 12 in the zone 38 of multilayer board 10, as stated.

With reference to Figure 15, wherein shown a part 68 of the secondary layer 14 of multilayer board 10.As implied above, this part 68 of secondary layer 14 directly conforms to four shown in Fig. 3/1.Just, this part 68 of secondary layer 14 is corresponding to the appropriate section of multilayer board 10, and one of them has 1/4th being installed on the multilayer board 10 of electronic component of the mounted on surface grid array packages of 1247 I/O contacts.

As implied above, except the contact pad to formation on it, secondary layer 14 mainly is a power/ground planes layer.Particularly, secondary layer 14 comprises that one is electrically connected with ground contact pad (being the GND in the legend), but the ground level that is not electrically connected with power contact pad (being Vdd and the Vdd2 in the legend) or signalling contact pad (being the signal in the legend).Note, in secondary layer 14, do not form test perforation, because test contact pad and test signal path only are formed on the basic layer 12 as the test contact pad.It shall yet further be noted that in the secondary layer 14 in the zone 38 of multilayer board 10 not perforation, thereby, in the zone 38 in this layer of multilayer board 10 and other layer, formed passage according to the present invention.These zones 38 of multilayer board 10 not perforation in secondary layer 14 is because small perforation or penetration perforation only extend to signals layer 16a from basic layer 12 in the zone 38 of multilayer board 10, as stated.

On this aspect, should be noted that the above-mentioned technology that is used to reduce the number of plies of multilayer board, among the patent application US 10/126700 of reference in the above (being patent No. US6545876 now) sufficient description is arranged.U.S. Patent application US 09/651188 (being patent No. US 6388890 now) and U.S. Provisional Patent Application US 60/212387, they all are cited as a reference at this.And; Be used to reduce the correlation technique of the number of plies of multilayer board; All have among the U.S. Patent application US 10/101211 of reference in the above (being patent No. USTBA now), US 09/651188 (being patent No. US 6388890 now) and the U.S. Provisional Patent Application US 60/212387 fully and describe, they all are cited as a reference at this.All these technology can realize with mode craft or automatic.For example, through from (for example) design document, receiving electronic component information, the mode that these technology can automation realizes.Just, design document can comprise the number characteristic of the conductive contact of one or more electronic components, the spaced features of conductive contact, the signal type characteristic of conductive contact and/or the sense characteristic of conductive contact.At least part is discerned the electronic component with high density conductive contact array package according in the spaced features of the number characteristic of the conductive contact of electronic component and conductive contact at least one.At least part is according in the sense characteristic of the signal type characteristic of conductive contact and conductive contact at least one; Coming in a plurality of conductive signal path layers in the multilayer signal wiring unit is electric signal wiring line, so that inwardly with outwards being connected each is installed in the high density conductive contact array package on the multilayer circuit board.

Therefore, this point should be noted that the method that reduces the number of plies of multilayer board as stated according to the present invention, comprises to a certain extent handling the input data and generating dateout.The processing of these input data and the generation of dateout can realize with the form of hardware or software.For example, can be in treatment facility or similarly or use specific electronics and/or optical element in the interlock circuit, carry out as stated function according to the number of plies of minimizing multilayer board of the present invention.Perhaps, one or more processors of operating according to instructions stored also can be carried out as stated the function according to the number of plies of minimizing multilayer board of the present invention.If like this, then within scope of the present invention, these instructions can be stored in the carrier (like disk) that one or more processors can read, or send through the one or more processors of one or more direction of signal.

Should note in this; According to the notion described in above referenced U.S. Patent application US10/126700, US 09/651188 (being patent No. US 6388890 now) and the U.S. Provisional Patent Application US 60/212387; One or more small perforation 26 can be formed in the multilayer board 10; Basic layer 12 one (like 16b) that extends to a plurality of conductive signal path layers from multilayer board 10; The arrangement of wherein small perforation 26 makes another layer (like 16c) in a plurality of electrically conductive signal layers below small perforation 26 go up and forms at least one passage 38 that above-mentioned patent all is cited as a reference at this.Just, one or more small perforation 26 can extend to from the surface 12 of multilayer board 10, other a plurality of conductive signal path layers (like 16b, 16c, 16d) except the conductive signal path layer (like 16a) of the superiors.

Should be noted that in this can passage 38 be set to have linear, circle, rhombus, curve property, step property or shape, perhaps their combination arbitrarily.And, can passage 38 be set to vertically, level, inclination or direction, perhaps their combination arbitrarily.In addition; One or more passages 38 can also form like this; They are completely contained in the conductive contact array that forms on the multilayer board 10; With the coupling electronic component conductive contact (that is, any part of passage is not formed on the periphery of the conductive contact array on the multilayer board 10) (as, with reference to the passage 38a among Figure 16).In addition; One or more passages 38 can form like this; They extend through the conductive contact array that forms on the multilayer board 10; With the conductive contact of coupling electronic component (that is, form passage and extend to another side) with the one side of the conductive contact array that forms from multilayer board 10.In addition; One or more passages 38 can form like this; Have only its part to extend to the periphery of the conductive contact array that forms on the multilayer board 10; With the conductive contact of coupling electronic component (that is, the periphery of the conductive contact array that forms on the multilayer board 10 of at least a portion of passage and form).

Should be noted that the conductive contact of electronic component in this, and be created on the multilayer board 10, be used to mate the conductive contact array of the conductive contact of electronic component, various contact array patterns can be arranged.For example, the conductive contact of electronic component, and the conductive contact array that forms on the multilayer board 10 can be square, triangle, circle and/or any conductive contact pattern, or their combination.

It should be noted that in this in the signal of telecommunication that needs wiring at least some can be differential electrical signals.If like this, differential electrical signals can at least partly be routed in together, be on the passage 38 in a plurality of conductive signal path layers 16 below the small perforation 26, thus enhance signal quality.

It should be noted that the outside that at least a portion in the small perforation 26 is formed on the conductive contact array that forms on the multilayer board 10 in this, with the conductive contact of coupling electronic component.For example; With reference to Figure 16; An optional embodiment who has wherein shown a part of 34a of basic layer 12 of multilayer board 10, the part of wherein small perforation 26a is set at the outside of the conductive contact array on the multilayer board 10, with the conductive contact of coupling electronic component.Small perforation 26a through conduction connect 70 with multilayer board 10 on the corresponding peripheral contact of the conductive array contact that forms carry out being connected, to mate the conductive contact of electronic component.As stated, small perforation 26a can be from basic layer 12 any one that extend to a plurality of signals layers 16 of multilayer board 10.But the peripheral conductive array contact that links to each other with small perforation 26a does not extend to below basic layer 12 of multilayer board 10.Therefore, passage 38a extra and/or expansion can be arranged in all layers of signal path layer 16, comprises the conductive signal path layer (being 16a) of the superiors, be in these peripheral conductive array contacts below.

Should note in this; According to above referenced U.S. Patent application US 10/101211 (being patent No. US TBA now), US 09/651188 (being patent No. US6388890 now) and U.S. Provisional Patent Application US 60/212387 (patent all through with reference to and involved) described in notion; One or more conduction perforation can be set in the multilayer board 10; Extend at least one (promptly 18 and/or 14) the conduction power/ground layer from the basic layer 12 of multilayer board 10, wherein each conduction perforation all with the basic layer 12 of multilayer board 10 at least one of setting independently conduct electricity power supply/contact, ground and be electrically connected.Each conduction power supply/contact, ground has all formed the part of the conductive contact array that forms on the basic layer 12 of multilayer board 10, with the conduction power supply/contact, ground of coupling electronic component.This make can be in a plurality of signal path layers 16 below conduction power supply/contact, ground each in form an extra path.

It should be noted that all in this and use small perforation to reduce the relevant variation and the benefit of method of the number of plies of multilayer board, can through use above-mentioned with conduct electricity power supply/contact, ground and have the conduction that is electrically connected to bore a hole to realize and obtain.

Should note in this; Although for reducing the number of plies that the multilayer board of electronic component is installed on it, scope of the present invention also comprises in the printed circuit board (PCB) that has a plurality of different embedding electronic components above that uses above-mentioned technology to foregoing description by strict restriction.For example, with reference to Figure 17, wherein shown a side sectional view according to optional multilayer board 10a of the present invention.Similar with the multilayer board 10 of Fig. 1, the multilayer board 10a of Figure 17 comprises basic layer (top layer) 12, one secondary layer (bottom) 14, a plurality of signals layers 16 and a plurality of power/ground planes layer 18.Multilayer board 10a also comprises a super large perforation 20 that is used for being electrically connected basic layer 12, secondary layer 14 and power/ground planes layer 18 selected layer.Multilayer board 10a also comprises and a plurality ofly is used for being electrically connected in a plurality of signals layers 16 selected layers and a plurality of power/ground planes layer 18 imbedding of selected layer and bores a hole 24.

The multilayer board 10 that is different from Fig. 1, the multilayer board 10a of Figure 17 comprise a blind perforation 74 that is used for being electrically connected the layer of selecting in layer that secondary layer 14, a plurality of signals layer 16 select and a plurality of power/ground planes layer 18.Multilayer board 10a also comprises an embedding electronic component 72 that is arranged between power/ground planes layer 18a and the signals layer 16a.

As stated, embedding electronic component 72 can be various a kind of in maybe electronic components.For example, with reference to figure 18A, wherein shown one its be provided with the embedding electronic component 72a of conductive contact 76.In the case, conductive contact 76 can with a plurality of signals layers 16 (be among Figure 17 layer 16a) in or the corresponding conductive contact that is provided with on (being the layer 18a among Figure 17) selected in a plurality of power/ground planes layer 18 one deck be electrically connected.Perhaps, with reference to figure 18B, shown that wherein a two sides on it is provided with the embedding electronic component 72 of conductive contact 76.In the case, conductive contact 76 can be electrically connected with the corresponding conductive contact on the selected layer (being the layer 18a among Figure 17) in a selected layer in a plurality of signals layers 16 (being the layer 16a among Figure 17) and a plurality of power/ground planes layer 18.Certainly; The electronic component of other type (like digital element) can be embedded among the multilayer board 10a of Figure 17; And according to the present invention, these embed that electronic components can also be disposed between any one deck and/or any one deck in a plurality of power/ground planes layer 18 in a plurality of signals layers 16 or on.Under any circumstance, when using these to embed electronic components, can use the above-mentioned technology that is used to reduce the number of plies of multilayer board.

Although it should be noted that on this aspect that foregoing description is to reduce the number of plies that the multilayer board of electronic component is installed on it by strict restriction, scope of the present invention also is included in and uses above-mentioned technology in the various multilayer signal wiring units.For example, above-mentioned technology can be applied to the integrated circuit dura mater sealed in unit of multilayer.Therefore, the present invention is more suitable for being used to reduce in indication the technology of the number of plies of multilayer signal wiring unit.

The scope of the specific embodiment that the present invention is not limited to this locates to describe.In fact, except described herein, according to the description and the accompanying drawing of front, various modifications of the present invention all are conspicuous to the those skilled in the art in this area.Therefore these are revised in the scope that all falls into following appended claim.In addition; Although the present invention realizes that the mode of specific purpose is described in specific environment in the context of specific embodiment; But those of ordinary skill in the art will recognize; Its use is not limited in this, and the present invention can realize the purpose of any number in the environment of any number.Therefore, should consider four corner of the present invention disclosed herein and the spiritual claim of explaining following proposition.

Claims

1. method that is used to reduce the number of plies of multilayer signal wiring unit, the multilayer signal wiring unit has: a plurality of conductive signal path layers, think to be installed on that lip-deep at least one electronic component of multilayer signal wiring unit imports and exporting telecommunication number; And as follows one of at least: at least one conducts electricity bus plane, thinks that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit provides power supply; At least one conductive formation is with thinking that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit provides with reference to ground; At least one conducts electricity utility power/stratum, and with thinking that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit provides power supply/ground, this method comprises:

Receive the electronic component information of at least one electronic component, comprise the number characteristic of conductive contact, the spaced features of conductive contact, the signal type characteristic of conductive contact, the sense characteristic of conductive contact;

According in the spaced features of the number characteristic of said conductive contact and conductive contact at least one, discern electronic component at least in part with high density conductive contact array package;

At least in part according in the sense characteristic of the signal type characteristic of said conductive contact and conductive contact at least one; In next a plurality of conductive signal path layers in the multilayer signal wiring unit is electric signal wiring line, inwardly and outwards to be connected said high density conductive contact array package; And

As follows one of at least:

A plurality of conduction perforation are set on the multilayer signal wiring unit; The conduction perforation extends to the one deck a plurality of conductive signal path layers from the surface of multilayer signal wiring unit, and said a plurality of conduction perforation are arranged in another layer under a plurality of conduction perforation and in a plurality of conductive signal path layers and form a passage;

A plurality of conduction perforation are set in the multilayer signal wiring unit; The conduction perforation extends at least one at least one conduction bus plane from the surface of multilayer signal wiring unit; In the perforation of a plurality of conductions each be electrically connected to the multilayer signal wiring unit lip-deep at least one independently conduct electricity on the power contact; In said at least one conduction power contact each all forms the part of conductive contact array; With the high density conductive contact array package of coupling electronic component, wherein passage is formed on each in a plurality of conductive signal path layers that are under the conduction power contact;

A plurality of conduction perforation are set in the multilayer signal wiring unit; The conduction perforation extends at least one at least one conductive formation from the surface of multilayer signal wiring unit; In the perforation of a plurality of conductions each be electrically connected to the multilayer signal wiring unit lip-deep at least one independently conduct electricity on the contact, ground; In said at least one contact, conduction ground each all forms the part of conductive contact array; With the high density conductive contact array package of coupling electronic component, wherein passage is formed on each in a plurality of conductive signal path layers under the contact, conduction ground;

A plurality of conduction perforation are set in the multilayer signal wiring unit; The conduction perforation extends at least one at least one conduction utility power/stratum from the surface of multilayer signal wiring unit; In the perforation of a plurality of conductions each be electrically connected to the multilayer signal wiring unit lip-deep at least one independently conduct electricity on power supply/contact, ground; In at least one conduction power supply/contact, ground each all forms the part of conductive contact array; With the high density conductive contact array package of coupling electronic component, wherein passage is formed on each in a plurality of conductive signal path layers, and is under at least one conduction power supply/contact, ground.

2. the method for claim 1, wherein passage is configured to have one or more linears, circle, rhombus, shaped form, stepped or other shape, perhaps their combination arbitrarily.

3. the method for claim 1, wherein passage is set to have one or more vertical, levels, inclination or other direction, perhaps their combination arbitrarily.

4. the method for claim 1; Wherein a plurality of conduction perforation form at least a portion of a conductive contact array; High density conductive contact array package with the coupling electronic component; And at least a portion of wherein a plurality of conduction perforation is set at the inside of conductive contact array, and passage just correspondingly is formed on the inside of conductive contact array like this.

5. the method for claim 1; Wherein the multilayer signal wiring unit has one and is formed on its lip-deep conductive contact array; High density conductive contact array package with the coupling electronic component; At least a portion of wherein a plurality of conductions perforation is set at the outside of conductive contact array, wherein this part a plurality of conductions perforation each all with the lip-deep conductive contact of multilayer signal wiring unit in peripheral contact be electrically connected.

6. the method for claim 1, wherein a plurality of conductions perforation also extend to the different layers a plurality of conductive signal path layers from the surface of multilayer signal wiring unit.

7. the method for claim 1; Wherein a plurality of conduction perforation form at least a portion of conductive contact array; High density conductive contact array package with the coupling electronic component; And at least a portion of wherein a plurality of conduction perforation is set within the conductive contact array, and passage can pass the conductive contact array and extend like this.

8. the method for claim 1; Wherein a plurality of conduction perforation form at least a portion of conductive contact array; High density conductive contact array package with the coupling electronic component; Wherein the conductive contact array has one or more square, triangles, circle and other conductive contact pattern arbitrarily, or their combination.

9. the method for claim 1, wherein at least two signals of telecommunication are differential electrical signals, wherein said differential electrical signals is routed in together at least in part, is on the passage of another layer in a plurality of conductive signal path layers below a plurality of conductions perforation.

10. the method for claim 1, wherein at least a portion of these a plurality of conduction power contacts is set at the inside of conductive contact array, and passage just is formed on the inside of conductive contact array accordingly like this.

11. the method for claim 1; Wherein at least a portion of these a plurality of conductions perforation is set at the outside of conductive contact array, wherein this part conduction perforation each all be positioned at the conductive contact array periphery at least one independently conduct electricity power contact and be electrically connected.

12. the method for claim 1, wherein at least a portion of these a plurality of conduction power contacts is set within the conductive contact array, and passage just can pass the conductive contact array and extend like this.

13. the method for claim 1, wherein at least two signals of telecommunication are differential electrical signals, and wherein said differential electrical signals part at least is routed in together, be under the said conduction power contact and one of a plurality of conductive signal path layers in passage on.

14. the method for claim 1, wherein at least a portion of these contacts, a plurality of conductions ground is set at the inside of conductive contact array, and passage just is formed on the inside of conductive contact array accordingly like this.

15. the method for claim 1; Wherein at least a portion of these a plurality of conductions perforation is set at the outside of conductive contact array, wherein this part conduction perforation each all be positioned at the conductive contact array periphery at least one independently conduct electricity the contact, ground and be electrically connected.

16. the method for claim 1, wherein at least a portion of these contacts, a plurality of conductions ground is set within the conductive contact array, and passage just can pass the conductive contact array and extend like this.

17. the method for claim 1, wherein at least two signals of telecommunication are differential electrical signals, and wherein said differential electrical signals is routed in together at least in part, on the passage of one of following and a plurality of conductive signal path layers of contact with being in said conduction.

18. the method for claim 1, wherein the surface of multilayer signal wiring unit is an inner surface of multilayer signal wiring unit, and at least one electronic component is installed on the inner surface of multilayer signal wiring unit.

19. method as claimed in claim 18; Wherein at least one electronic component has first conductive contact at least one first side that is formed on it, and wherein this at least one first conductive contact is electrically connected at least one the first corresponding conductive contact that is formed on the said inner surface of multilayer signal wiring unit.

20. method as claimed in claim 19; Wherein at least one electronic component has second conductive contact at least one second side that is formed on it, and wherein this at least one second conductive contact is electrically connected at least one the second corresponding conductive contact on another inner surface that is formed on the multilayer signal wiring unit.

21. a method that is used to reduce the number of plies of multilayer signal wiring unit, the multilayer signal wiring unit has: a plurality of conductive signal path layers, think to be installed on that lip-deep at least one electronic component of multilayer signal wiring unit imports and exporting telecommunication number; And as follows one of at least: at least one conducts electricity bus plane, thinks that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit provides power supply; At least one conductive formation is with thinking that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit provides with reference to ground; At least one conducts electricity utility power/stratum, and with thinking that lip-deep at least one electronic component that is installed in the multilayer signal wiring unit provides power supply/ground, this method comprises:

At least in part according in the sense characteristic of the signal type characteristic of said conductive contact and conductive contact at least one; In next a plurality of conductive signal path layers in the multilayer signal wiring unit is electric signal wiring line, inwardly and outwards to be connected said high density conductive contact array package.

22. method as claimed in claim 21 also comprises:

A plurality of conduction perforation are set on the multilayer signal wiring unit; The conduction perforation extends to the one deck a plurality of conductive signal path layers from the surface of multilayer signal wiring unit, and said a plurality of conduction perforation are arranged in another layer under a plurality of conduction perforation and in a plurality of conductive signal path layers and form a passage.

23. method as claimed in claim 22, wherein passage is configured to have one or more linears, circle, rhombus, shaped form, stepped or other shape, perhaps their combination arbitrarily.

24. method as claimed in claim 22, wherein passage is set to have one or more vertical, levels, inclination or other direction, perhaps their combination arbitrarily.

25. method as claimed in claim 22; Wherein a plurality of conduction perforation form at least a portion of a conductive contact array; High density conductive contact array package with the coupling electronic component; And at least a portion of wherein a plurality of conduction perforation is set at the inside of conductive contact array, and passage just correspondingly is formed on the inside of conductive contact array like this.

26. method as claimed in claim 22; Wherein the multilayer signal wiring unit has one and is formed on its lip-deep conductive contact array; High density conductive contact array package with the coupling electronic component; At least a portion of wherein a plurality of conductions perforation is set at the outside of conductive contact array, wherein this part a plurality of conductions perforation each all with the lip-deep conductive contact of multilayer signal wiring unit in peripheral contact be electrically connected.

27. method as claimed in claim 22, wherein a plurality of conduction perforation also extend to the different layers a plurality of conductive signal path layers from the surface of multilayer signal wiring unit.

28. method as claimed in claim 22; Wherein a plurality of conduction perforation form at least a portion of conductive contact array; High density conductive contact array package with the coupling electronic component; And at least a portion of wherein a plurality of conduction perforation is set within the conductive contact array, and passage can pass the conductive contact array and extend like this.

29. method as claimed in claim 22; Wherein a plurality of conduction perforation form at least a portion of conductive contact array; High density conductive contact array package with the coupling electronic component; Wherein the conductive contact array has one or more square, triangles, circle and other conductive contact pattern arbitrarily, or their combination.

30. method as claimed in claim 22, wherein at least two signals of telecommunication are differential electrical signals, and wherein said differential electrical signals is routed in together at least in part, are on the passage of another layer in the following a plurality of conductive signal path layers of a plurality of conduction perforation.

31. method as claimed in claim 21, wherein the multilayer signal wiring unit has at least one conduction bus plane, thinks that the lip-deep electronic component that is installed in the multilayer signal wiring unit provides power supply, and the method comprises:

A plurality of conduction perforation are set in the multilayer signal wiring unit; The conduction perforation extends at least one at least one conduction bus plane from the surface of multilayer signal wiring unit; In the perforation of a plurality of conductions each be electrically connected to the multilayer signal wiring unit lip-deep at least one independently conduct electricity on the power contact; In said at least one conduction power contact each all forms the part of conductive contact array, with the high density conductive contact array package of coupling electronic component;

Wherein, passage is formed on each in a plurality of conductive signal path layers that are under the conduction power contact.

32. method as claimed in claim 31, wherein passage is configured to have one or more linears, circle, rhombus, shaped form, stepped or other shape, perhaps their combination arbitrarily.

33. method as claimed in claim 31, wherein passage is set to have one or more vertical, levels, inclination or other direction, perhaps their combination arbitrarily.

34. method as claimed in claim 31, wherein at least a portion of these a plurality of conduction power contacts is set at the inside of conductive contact array, and passage just is formed on the inside of conductive contact array accordingly like this.

35. method as claimed in claim 31; Wherein at least a portion of these a plurality of conductions perforation is set at the outside of conductive contact array, wherein this part conduction perforation each all be positioned at the conductive contact array periphery at least one independently conduct electricity power contact and be electrically connected.

36. method as claimed in claim 31, wherein at least a portion of these a plurality of conduction power contacts is set within the conductive contact array, and passage just can pass the conductive contact array and extend like this.

37. method as claimed in claim 31, wherein the conductive contact array has one or more square, triangles, circle and other conductive contact pattern arbitrarily, or their combination.

38. method as claimed in claim 31, wherein at least two signals of telecommunication are differential electrical signals, and wherein said differential electrical signals part at least is routed in together, be under the said conduction power contact and one of a plurality of conductive signal path layers in passage on.

39. method as claimed in claim 21, wherein the multilayer signal wiring unit has at least one conductive formation, and with thinking that the lip-deep electronic component that is installed in the multilayer signal wiring unit provides with reference to ground, this method also comprises:

A plurality of conduction perforation are set in the multilayer signal wiring unit; The conduction perforation extends at least one at least one conductive formation from the surface of multilayer signal wiring unit; In the perforation of a plurality of conductions each be electrically connected to the multilayer signal wiring unit lip-deep at least one independently conduct electricity on the contact, ground; In said at least one contact, conduction ground each all forms the part of conductive contact array, with the high density conductive contact array package of coupling electronic component;

Wherein, passage is formed on each in a plurality of conductive signal path layers under the contact, conduction ground.

40. method as claimed in claim 39, wherein passage is configured to have one or more linears, circle, rhombus, shaped form, stepped or other shape, perhaps their combination arbitrarily.

41. method as claimed in claim 39, wherein passage is set to have one or more vertical, levels, inclination or other direction, perhaps their combination arbitrarily.

42. method as claimed in claim 39, wherein at least a portion of these contacts, a plurality of conductions ground is set at the inside of conductive contact array, and passage just is formed on the inside of conductive contact array accordingly like this.

43. method as claimed in claim 39; Wherein at least a portion of these a plurality of conductions perforation is set at the outside of conductive contact array, wherein this part conduction perforation each all be positioned at the conductive contact array periphery at least one independently conduct electricity the contact, ground and be electrically connected.

44. method as claimed in claim 39, wherein at least a portion of these contacts, a plurality of conductions ground is set within the conductive contact array, and passage just can pass the conductive contact array and extend like this.

45. method as claimed in claim 39, wherein the conductive contact array has one or more square, triangles, circle and other conductive contact pattern arbitrarily, or their combination.

46. method as claimed in claim 39, wherein at least two signals of telecommunication are differential electrical signals, and wherein said differential electrical signals is routed in together at least in part, on the passage of one of following and a plurality of conductive signal path layers of contact with being in said conduction.

47. method as claimed in claim 21, wherein the multilayer signal wiring unit has at least one conduction utility power/stratum, and with thinking that the lip-deep electronic component that is installed in the multilayer signal wiring unit provides power supply/ground, this method also comprises:

A plurality of conduction perforation are set in the multilayer signal wiring unit; The conduction perforation extends at least one at least one conduction utility power/stratum from the surface of multilayer signal wiring unit; In the perforation of a plurality of conductions each be electrically connected to the multilayer signal wiring unit lip-deep at least one independently conduct electricity on power supply/contact, ground; In at least one conduction power supply/contact, ground each all forms the part of conductive contact array, with the high density conductive contact array package of coupling electronic component;

Wherein, passage is formed on each in a plurality of conductive signal path layers, and is under at least one conduction power supply/contact, ground.

48. method as claimed in claim 21, wherein the surface of multilayer signal wiring unit is an inner surface of multilayer signal wiring unit, and at least one electronic component is installed on the inner surface of multilayer signal wiring unit.

49. method as claimed in claim 48; Wherein at least one electronic component has first conductive contact at least one first side that is formed on it, and wherein this at least one first conductive contact is electrically connected at least one the first corresponding conductive contact that is formed on the said inner surface of multilayer signal wiring unit.

50. method as claimed in claim 49; Wherein at least one electronic component has second conductive contact at least one second side that is formed on it, and wherein this at least one second conductive contact is electrically connected at least one the second corresponding conductive contact on another inner surface that is formed on the multilayer signal wiring unit.