CN101778204A - 3G-SDI high-definition digital audio/video delay system - Google Patents

3G-SDI high-definition digital audio/video delay system Download PDF

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Publication number
CN101778204A
CN101778204A CN201010107265A CN201010107265A CN101778204A CN 101778204 A CN101778204 A CN 101778204A CN 201010107265 A CN201010107265 A CN 201010107265A CN 201010107265 A CN201010107265 A CN 201010107265A CN 101778204 A CN101778204 A CN 101778204A
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signal
delay
video signal
module
video
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CN101778204B (en
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周春雷
刘兴华
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DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
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DALIAN KEDI VIDEO TECHNOLOGY Co Ltd
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Abstract

The invention relates to a 3G-SDI high-definition digital audio/video delay system belonging to the technical field of audio/video broadcasting. The system comprises an analysis module, a data processing module, a storage module and a coding module; the high-speed storage module is used, the writing logic and reading logic of the storage module are enabled according to the buffering depth of an FIFO (Fragment Stream FIFO) buffer in the data processing module, and further, a video signal is subjected to stack storage and address offset read, thereby achieving the aim of signal delay. The invention has the advantages that the delay processing of 3G-SDI high-definition digital audio signals, HD (High Definition) digital audio signals and SD (Standard Deviation) digital audio signals is supported; and the whole system is finished on one 1U high level machine, thereby lowering the fault ratio, avoiding a lot of investment of hardware, saving space for working environments and also lowering the cost.

Description

The 3G-SDI high-definition digital is looked audio delay system
Technical field
The invention belongs to and look audio frequency Broadcast Control field, be specifically related to a kind of 3G-SDI (serial digital signal of 3Gbps transmission rate) high-definition digital video/audio signal delayed time system.
Background technology
At present, in China's field of broadcast televisions, it is not only a technical problem that safety is broadcasted, and should take precautions against because signal interruption and the fault that technical reason causes taken precautions against the attack of illegal signals to us again.And along with the development of video transmission technologies, the application of digital video-audio signal is more general, and the delayer product will ensure simultaneously that also the safety of digital video-audio signal broadcasts.For live program, can look the audio delay device by numeral, simulation the time-delay that live program carries out a period of time is broadcasted, in case accident occurs, can switch to other pictures rapidly, guarantee that the safety of TV programme is broadcasted.
Summary of the invention
The invention provides a kind of 3G-SDI high-definition digital and look audio delay system, this system can carry out delay process to 3Gbps high-definition digital video/audio signal, and support the delay process of HD (high definition) digital video signal and SD (single-definition) digital video signal, and whole system is finished above the machine at one, reduced the probability that fault takes place, also avoided a large amount of hardware inputs, saved the space, reduced cost simultaneously again for operational environment.
In order to realize the foregoing invention purpose, technical scheme of the present invention is as follows:
The 3G-SDI high-definition digital is looked audio delay system, is made of parsing module, data processing module, memory module and coding module, comprises the steps:
1) after the serial video signal of coaxial cable input enters system, by parsing module it is carried out equilibrium treatment, then with the serial video signal string after the equilibrium and be converted to parallel video signal, and this signal is carried out de-embedding handle, de-embedding goes out the digital audio and video signals in the vision signal, together transfers to data processing module with parallel video signal;
2) data processing module is gathered parallel video signal and digital audio and video signals, and the data according to gathering calculate parameters such as signaling mode, signal format, signal refresh rate;
3) storage of signal, the data processing module is edited, at four FIFO of data processing module inner setting (First Input First Output, first-in first-out) buffer: video goes into to hold buffer, audio frequency to go into to hold buffer, video to go out to hold buffer and audio frequency to go out to hold buffer, depositing wherein parallel video signal and digital audio and video signals in two respectively goes into to hold in the FIFO buffer, handle by bit width conversion then, be converted to the multi-bit parallel data, and deposit in the memory module;
4) signal reads, judge by above-mentioned collection signal parameter, binding operation person sets the delay time that system makes, in primary control program, calculate the side-play amount of parallel video signal and digital audio and video signals respectively, from memory module, read parallel data respectively to the FIFO buffer according to address offset separately, and then through bit width conversion, with parallel video signal and digital audio and video signals output;
5) digital audio and video signals that will export from data processing module by coding module is embedded into parallel video signal, then parallel video signal is carried out and go here and there conversion process being converted into serial video signal, at last this serial video signal is driven and exports.
3G-SDI high-definition digital of the present invention is looked audio delay system, the memory mechanism of its core is: use high speed memory modules, the buffer memory degree of depth according to FIFO buffer in the data processing module, enable writing logic and reading logic and then vision signal is carried out storehouse storage and address offset reads of memory module, reach the purpose of signal lag.Native system is provided with 4 inner FIFO buffers in data processing module: video goes into to hold buffer, audio frequency to go into to hold buffer, video to go out to hold buffer and audio frequency to go out to hold buffer.In the process of video playback, the parallel video signal data flow transfers to video continuously and goes into to hold buffer, going into to hold to carry out in the buffer storehouse at video handles, when storehouse reaches the default degree of depth, send to memory module and enable to write logical order by primary control program, then the data of this predetermined depth size in the storehouse are carried out bit width conversion, deposit in the memory module.In reading the process of signal, data processing module is according to the standard and the form that detect parallel video signal in advance, the internal logic sequential of memory module, and the user is to the delay time setting of system, calculate the offset data amount of the memory module that needs, obtain in the memory module and the corresponding address of reading of data, when video goes out to hold stack depth in the buffer less than preset standard, in internal memory, send the order of enable read fetch logic by primary control program, the video data of same quantity of data when memory module data designated address is read and deposited in then, read video and go out to hold in the buffer storehouse, continue to deliver to primary control program through bit width conversion with continuous parallel video signal again.For the delay process of audio frequency, its mode is identical with video time-delay mode.System is divided into coarse adjustment time-delay and two kinds of regulative modes of fine setting time-delay to the adjusting of time-delay, and wherein the coarse adjustment time-delay is to realize by the address offset of memory module, and the fine setting time-delay is to realize by the degree of depth of regulating the FIFO buffer.
Beneficial effect of the present invention is: uses outside high speed memory modules, can handle Broadcast Control time-delay up to the full HD digital video signal of 3Gbps transmission rate, and the processing of backward compatible HD and SD signal format; Can support the cascade arranged side by side of multistage memory module to use, thereby increase memory space, increase delay time by the cascade memory module; Native system carries out subregion and handles side by side looking audio-frequency unit, size according to the data in different formats amount, accurately divide the audio frequency storehouse amount of looking, it is independent separately to look audio frequency, handle side by side, eliminate the phase mutual interference of looking between the audio frequency greatly, the accuracy that improves storage and read, the reliability of increase whole system; The fine setting delay technique, logical sequence and data processing module according to memory module read the control of holding FIFO, can accurately calculate the time-delay size, minimum can accurately be adjusted to a pixel, can accurately eliminate small frequency error in the internal memory logic controller like this; By the accurate adjustment to time-delay, native system can accurately align picture with external clock, realizes the video frame synchronization function; Can be supported in the data processing module to audio frequency insert, wipe, quiet, mix and adjust function such as processing.
Description of drawings
Fig. 1 is that 3G-SDI high-definition digital of the present invention is looked the structure chart of audio delay system.
Fig. 2 is the processing policy schematic diagram that 3G-SDI high-definition digital of the present invention is looked signal lag mechanism in the audio delay system.
Embodiment
Below in conjunction with the drawings and specific embodiments the present invention is elaborated, but be not limited to this embodiment.
As shown in Figure 1,3G-SDI high-definition digital video delayed time system of the present invention comprises parsing module 11, data processing module 12, memory module 13 and 14 4 parts of coding module, wherein, parsing module 11, memory module 13 and coding module 14 all are connected with data processing module 12, and the function of four modules is as follows:
Parsing module 11 is used for the SDI vision signal of receiving terminal is carried out equilibrium treatment; Serial digital signal after the equilibrium is gone here and there and be converted to parallel video signal, and de-embedding goes out digital audio and video signals;
Data processing module 12 is used for that whole delayed time system is carried out data manipulation to be handled, comprising collection to signal, the processing that signal is deposited in, and the computing of signal resolved and reads processing etc., native system uses the CycloneIII Series FPGA, perhaps uses the more FPGA of high performance series;
Memory module 13 is used for data such as are stored and read at operational processes by data processing module 12, and what use in native system is 4G or 8G capacity DDR II internal memory, also can use DDR I, DDRIII or solid state hard disc as memory module simultaneously;
Coding module 14 will carry out that audio frequency embed to be handled to the parallel video signal of from data processing module, exporting and and go here and there conversion processing; Serial digital signal is driven, its signal amplitude is amplified, so that can grow the Distance Transmission signal.
The storage principle that 3G-SDI high-definition digital of the present invention is looked the audio delay system embodiment is as follows:
Setting 4 inner FIFO buffer-videos in data processing module goes into to hold buffer, audio frequency to go into to hold buffer, video to go out to hold buffer and audio frequency to go out to hold buffer, wherein video has 2 FIFO buffers, audio frequency has 2 FIFO buffers, respectively parallel video signal and audio digital signals is carried out the storehouse storage and address offset reads processing.
As shown in Figure 2, with the parallel video signal is example, in video display process, parallel video signal constantly transfers to video and goes into to hold buffer 21, deposit in the stack area through bit width conversion, when the primary control program in the data processing module 24 monitors its stack area when arriving certain default degree of depth, send the order of enable signal stored logic to memory module 22, according to the adjustment that deposits logical order in, the signal data that to preset rapidly in the stack depth is deposited in the memory module 22, wait for then next time enable the stored logic order.
In the process that reads memory module 22, carry out computing by the primary control program 24 of data processing module by the time that the signaling mode prejudged and form and user of service set, calculate the offset data amount, send enable signal to memory module then and read logical order and offset data amount and related data.Video goes out to hold buffer 23 will receive the signal data that is sent rapidly by memory module 22 offset address places then, be deposited in the stack area, it reads total size of signal data and stored signal data equal and opposite in direction, and equals signal data size in the default stack depth.At last go out to hold the data of 23 pairs of stack areas of buffer to carry out bit width conversion and export continuously with parallel signal by video, when data in the stack area constantly are reduced to another default stack depth, primary control program 24 will send enable signal once more and read logical order, repeat above process.
For the delay process of audio frequency, its principle is identical with video.
According to above-mentioned principle, 3G-SDI high-definition digital of the present invention is looked audio delay system by using outside high speed memory modules, can handle Broadcast Control time-delay up to the full HD digital video signal of 3Gbps transmission rate, and the delay process of backward compatible HD and SD signal format.In processing procedure, owing to look audio frequency separately independently, eliminate the phase mutual interference of looking between the audio frequency greatly, the accuracy that improves storage and read, the reliability of increase whole system; Not only can also additionally carry out audio frequency and insert, wipe by adjusting audio delay separately to ensure the synchronous playing of video and audio frequency to audio signal, quiet, processing such as audio mix, adjustment.
3G-SDI high-definition digital video delayed time system of the present invention is divided into coarse adjustment time-delay and two kinds of regulative modes of fine setting time-delay to the adjusting of time-delay.Wherein the coarse adjustment time-delay is to realize by the address offset of memory module, determine according to the memory module amount of capacity, the big more delay time of capacity is long more, and this system has realized the cascade function of DDR series memory in the memory module, can expand the memory module space by increasing amount of memory, increase delay time.In embodiment of the present invention, by above-described execution mode: under 3G high-definition digital video signal, can carry out 0-60 and delay time second; Can carry out 0-120 under the HD digital video signal delays time second; Can carry out 0-360 under the SD digital video signal delays time second; Memory bar by the cascade same memory space delay time that can double.
Native system has the fine setting delay technique, logical sequence and data processing module according to memory module read the control of holding FIFO, can accurately calculate the time-delay size, minimum can accurately be adjusted to a pixel, can accurately eliminate small frequency error in the internal memory logic controller like this; By the accurate adjustment to time-delay, native system can accurately align picture with external clock, realizes the video frame synchronization function.

Claims (5)

1.3G-SDI high-definition digital is looked audio delay system, it is characterized in that, this system is made of parsing module, data processing module, memory module and coding module, comprises the steps:
1) after the serial video signal of coaxial cable input enters system, by parsing module it is carried out equilibrium treatment, then with the serial video signal string after the equilibrium and be converted to parallel video signal, and this signal is carried out de-embedding handle, de-embedding goes out the digital audio and video signals in the vision signal, together transfers to data processing module with parallel video signal;
2) data processing module is gathered parallel video signal and digital audio and video signals, and the data according to gathering calculate parameters such as signaling mode, signal format, signal refresh rate;
3) storage of signal, the data processing module is edited, at four FIFO buffers of data processing module inner setting: video goes into to hold buffer, audio frequency to go into to hold buffer, video to go out to hold buffer and audio frequency to go out to hold buffer, depositing wherein parallel video signal and digital audio and video signals in two respectively goes into to hold in the FIFO buffer, handle by bit width conversion then, be converted to the multi-bit parallel data, and deposit in the memory module;
4) signal reads, judge by above-mentioned collection signal parameter, binding operation person sets the delay time that system makes, in primary control program, calculate the side-play amount of parallel video signal and digital audio and video signals respectively, from memory module, read parallel data respectively to the FIFO buffer according to address offset separately, and then through bit width conversion, with parallel video signal and digital audio and video signals output;
5) digital audio and video signals that will export from data processing module by coding module is embedded into parallel video signal, then parallel video signal is carried out and go here and there conversion process being converted into serial video signal, at last this serial video signal is driven and exports.
2. 3G-SDI high-definition digital as claimed in claim 1 is looked audio delay system, it is characterized in that, this system uses outside high speed memory modules, and the vision signal of 3Gbps clock rate is carried out delay process, and the delay process of backward compatible HD digital video signal and SD digital video signal.
3. 3G-SDI high-definition digital as claimed in claim 1 is looked audio delay system, it is characterized in that, this system uses high speed memory modules, according to the buffer memory degree of depth of FIFO buffer in the data processing module, enable writing logic and reading that logic is carried out the storehouse storage to vision signal and address offset reads of memory module, realize that signal lag handles.
4. 3G-SDI high-definition digital as claimed in claim 1 is looked audio delay system, it is characterized in that, this system is divided into coarse adjustment time-delay and two kinds of regulative modes of fine setting time-delay to the adjusting of time-delay, wherein, the coarse adjustment time-delay is to realize by the address offset of memory module, and the fine setting time-delay is to realize by the degree of depth of regulating the FIFO buffer.
5. 3G-SDI high-definition digital as claimed in claim 1 is looked audio delay system, it is characterized in that, this system can accurately align picture with external reference synchronizing signal clock by the accurate adjustment to time-delay, realizes the video frame synchronization function; Simultaneously, be supported in the data processing module to audio frequency insert, wipe, quiet, mix and adjust function such as processing.
CN2010101072653A 2010-02-06 2010-02-06 3G-SDI high-definition digital audio/video delay system Expired - Fee Related CN101778204B (en)

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Cited By (10)

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CN102984506A (en) * 2012-12-18 2013-03-20 大连科迪视频技术有限公司 3G-SDI/DVI portable video signal collecting method
CN103220010A (en) * 2013-04-24 2013-07-24 北京中税天网科技有限公司 Low-frequent wireless bidirectional ground penetrating communication device and method thereof
CN105451057A (en) * 2016-01-18 2016-03-30 北京优祥智恒科技有限公司 An apparatus and method for adjusting audio delay in a video and audio code stream
CN105611317A (en) * 2016-01-18 2016-05-25 北京流金岁月文化传播股份有限公司 Video-audio transcoding device and method capable of supporting audio unvarnished transmission
CN105704506A (en) * 2016-01-19 2016-06-22 北京流金岁月文化传播股份有限公司 Device and method for synchronizing audio and video coding labial sound
CN106875952A (en) * 2016-12-23 2017-06-20 伟乐视讯科技股份有限公司 The soft encoding mechanism of MCVF multichannel voice frequency based on FPGA embedded systems
CN108847856A (en) * 2018-06-27 2018-11-20 成都信息工程大学 The adjustable method of digital large scale time delay in the counteracting of full-duplex communication radio frequency interference
CN112468841A (en) * 2020-11-26 2021-03-09 Oppo广东移动通信有限公司 Audio transmission method and device, intelligent equipment and computer readable storage medium
CN114205638A (en) * 2020-09-02 2022-03-18 中国电信股份有限公司 Video delay playing method and device
CN114339345A (en) * 2020-09-29 2022-04-12 京东方科技集团股份有限公司 Source end synchronization device and synchronization method applied to audio and video signals

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CN101296323A (en) * 2007-04-29 2008-10-29 北京同步科技有限公司 Lossless time-delay broadcasting system
CN101594465A (en) * 2008-05-28 2009-12-02 北京同步科技有限公司 Be used to control the control circuit of live broadcast delayed time system of studio

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CN102984506B (en) * 2012-12-18 2016-08-10 大连科迪视频技术有限公司 A kind of 3G-SDI/DVI portable video signal acquisition method
CN102984506A (en) * 2012-12-18 2013-03-20 大连科迪视频技术有限公司 3G-SDI/DVI portable video signal collecting method
CN103220010A (en) * 2013-04-24 2013-07-24 北京中税天网科技有限公司 Low-frequent wireless bidirectional ground penetrating communication device and method thereof
CN103220010B (en) * 2013-04-24 2015-05-06 北京中税天网科技有限公司 Low-frequent wireless bidirectional ground penetrating communication device and method thereof
CN105451057A (en) * 2016-01-18 2016-03-30 北京优祥智恒科技有限公司 An apparatus and method for adjusting audio delay in a video and audio code stream
CN105611317A (en) * 2016-01-18 2016-05-25 北京流金岁月文化传播股份有限公司 Video-audio transcoding device and method capable of supporting audio unvarnished transmission
CN105704506A (en) * 2016-01-19 2016-06-22 北京流金岁月文化传播股份有限公司 Device and method for synchronizing audio and video coding labial sound
CN106875952A (en) * 2016-12-23 2017-06-20 伟乐视讯科技股份有限公司 The soft encoding mechanism of MCVF multichannel voice frequency based on FPGA embedded systems
CN108847856A (en) * 2018-06-27 2018-11-20 成都信息工程大学 The adjustable method of digital large scale time delay in the counteracting of full-duplex communication radio frequency interference
CN114205638A (en) * 2020-09-02 2022-03-18 中国电信股份有限公司 Video delay playing method and device
CN114339345A (en) * 2020-09-29 2022-04-12 京东方科技集团股份有限公司 Source end synchronization device and synchronization method applied to audio and video signals
CN114339345B (en) * 2020-09-29 2024-05-31 京东方科技集团股份有限公司 Source end synchronization device and synchronization method applied to audio and video signals
CN112468841A (en) * 2020-11-26 2021-03-09 Oppo广东移动通信有限公司 Audio transmission method and device, intelligent equipment and computer readable storage medium

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