CN101777038A - Method for sharing storage among processors and multiprocessor equipment - Google Patents

Method for sharing storage among processors and multiprocessor equipment Download PDF

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Publication number
CN101777038A
CN101777038A CN201010106728A CN201010106728A CN101777038A CN 101777038 A CN101777038 A CN 101777038A CN 201010106728 A CN201010106728 A CN 201010106728A CN 201010106728 A CN201010106728 A CN 201010106728A CN 101777038 A CN101777038 A CN 101777038A
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Prior art keywords
processor
primary processor
storer
data
startup command
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CN201010106728A
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Chinese (zh)
Inventor
刘勇虎
陈华志
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Huawei Device Co Ltd
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Huawei Device Co Ltd
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Priority to CN201010106728A priority Critical patent/CN101777038A/en
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Abstract

The embodiment of the invention discloses a method for sharing storage among processors and multiprocessor equipment. The method comprises the following steps that: a master processor receives the starting command of a slave processor; the master processor reads data from the storage according to the starting command; and the master processor sends the data to the slave processor. The invention is suitable for sharing the storage among the processors in the multiprocessor equipment.

Description

The method of shared storage, multiprocessor machine between processor
Technical field
The present invention relates to communication technical field, particularly a kind of between processor method, the multiprocessor machine of shared storage.
Background technology
At present,,, need in terminal device, be equipped with two or more processors and carry out collaborative work, occur multiprocessor machine thus in order to satisfy multi-functional needs along with the function of terminal device is increasingly sophisticated.For multiprocessor machine, each processor all needs peripheral components such as Flash or RAM.In multiprocessor machine, usually, each processor has storer separately respectively, and each processor independently uses the storer of oneself.
In realizing process of the present invention, the inventor finds that there are the following problems at least in the prior art:
In multiprocessor machine, need all be equipped with storer for each processor, because each storer all takies certain space, thereby increased the volume of multiprocessor machine, improved the cost of multiprocessor machine.
Summary of the invention
Embodiments of the invention provide a kind of between processor method, the multiprocessor machine of shared storage, can reduce equipment volume, reduce equipment cost.
The technical scheme that the embodiment of the invention adopts is:
A kind of between processor the method for shared storage, comprising:
Primary processor receives the startup command from processor;
Primary processor according to described startup command by reading of data in the storer;
Primary processor sends to described data described from processor.
A kind of multiprocessor machine comprises that primary processor, storer reach from processor, and wherein, described primary processor comprises:
Receiver module is used to receive described startup command from processor;
Read module is used for according to described startup command by described storer reading of data;
Sending module is used for described data are sent to described from processor.
Method, the multiprocessor machine of embodiment of the invention shared storage between processor, primary processor is connected with storer respectively with from processor, primary processor is according to the startup command from processor, by reading of data in the described storer, and send the data to from processor, do not need for from the independent configuring external storer of processor, can realize data by external memory storage to resettlement from processor inside.Compared with prior art, share same storer between a plurality of processors, obtain data the storer from processor by primary processor, owing to reduced the usage quantity of storer, thereby can reduce the volume of multiprocessor machine, reduce the cost of multiprocessor machine.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
The method flow diagram that Fig. 1 provides for the embodiment of the invention one;
The method flow diagram that Fig. 2 provides for the embodiment of the invention two;
The multiprocessor machine structural representation that Fig. 3 provides for the embodiment of the invention three;
The multiprocessor machine structural representation that Fig. 4 provides for the embodiment of the invention four.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making all other embodiment that obtained under the creative work prerequisite.
For the advantage that makes technical solution of the present invention is clearer, the present invention is elaborated below in conjunction with drawings and Examples.
Embodiment one
Present embodiment provide a kind of between processor the method for shared storage, as shown in Figure 1, described method comprises:
101, primary processor receives the startup command from processor;
102, primary processor according to described startup command by reading of data in the storer;
103, primary processor sends to described data described from processor.
The method of embodiment of the invention shared storage between processor, primary processor is connected with storer respectively with from processor, primary processor is according to the startup command from processor, by reading of data in the described storer, and send the data to from processor, do not need for from the independent configuring external storer of processor, can realize data by external memory storage to resettlement from processor inside.Compared with prior art, share same storer between a plurality of processors, obtain data the storer from processor by primary processor, owing to reduced the usage quantity of storer, thereby can reduce the volume of multiprocessor machine, reduce the cost of multiprocessor machine.
Embodiment two
Present embodiment provide a kind of between processor the method for shared storage, in the present embodiment, multiprocessor machine has two processors: primary processor A and from processor B, and storer Flash A, wherein, primary processor A by serial mode be connected from processor B, primary processor A is connected with storer Flash A by parallel mode.
As shown in Figure 2, described between processor the method for shared storage comprise:
201, primary processor A sets up and being connected from processor B by serial mode.
Wherein, on primary processor A, use GPIO (General Purpose Input/Output, general I/O) the Flash SPI of a virtual serial (Serial Peripheral Interface, Serial Peripheral Interface), with this interface and the corresponding connection of serial Flash interface from processor B.
202, primary processor A sets up and being connected of storer Flash A by parallel mode.
Wherein, primary processor A and from the burning sheet program of processor B all programming among storer Flash A, take the different memory areas of storer Flash A respectively, primary processor A carries out associative operation with adopt the mode of time-sharing multiplex from processor B to storer Flash A.
203, for multiprocessor machine powers on, primary processor A at first finishes start-up course.
Wherein, before primary processor A finishes start-up course, be in not power-up state from processor B.
204, primary processor A control powers on from processor B.
Wherein, primary processor A controls from the enable pin of the power supply of processor B by GPIO, and under default situations, this GPIO is a low level, at this moment, does not start from the power supply of processor B; After primary processor A finished startup, this GPIO was changed to high level, started the power supply from processor B, for powering from processor B.Thereby can avoid primary processor A not finish when starting, send the Flash addressed command from processor B, the situation that causes primary processor A to handle occurs.
205, primary processor A is with the startup command of serial mode reception from processor B.
Wherein, described startup command is arranged in the curing address from processor B, carry enabling address in the described startup command from processor B, in described storer Flash A, store and the corresponding log-on data of described startup command, can be according to described startup command by reading corresponding log-on data among the described storer Flash A.
206, primary processor A is extremely parallel by serial conversion with described startup command.
Because by receiving from processor B, and the connected mode between primary processor A and the storer Flash A is a parallel mode to described startup command with serial mode, therefore, need be with described startup command by serial conversion to walking abreast.
207, primary processor A according to described startup command by reading of data among the storer Flash A.
Primary processor A reads log-on data by corresponding among the storer Flash A from the enabling address of processor B according to described startup command.
208, primary processor A is converted to serial with described log-on data by walking abreast.
209, primary processor A sends to described log-on data from processor B.
So far, finished log-on data by the resettlement of storer Flash to internal RAM from processor B, start-up course is finished.After this, the program from processor B is moved in internal RAM, generally storer Flash A is not operated.
Alternatively, revise among the storer Flash A with the time, then need to carry out following process from the data in processor B corresponding stored district when needs:
L1: primary processor A receives described modification order from processor B;
L2: primary processor A makes amendment to the data among the described storer Flash A according to described modification order.
In the present embodiment, primary processor A and from processor B when starting, when perhaps the data among the storer Flash A being made amendment, all adopt the mode of time-sharing multiplex, thereby can reduce taking of system, improve the operational efficiency of multiprocessor machine.
The method of embodiment of the invention shared storage between processor, primary processor A is connected with storer Flash A respectively with from processor B, primary processor A is according to the startup command from processor B, by reading of data among the described storer Flash A, and send the data to from processor B, do not need for from the independent configuring external storer of processor B, can realize data by external memory storage to resettlement from processor B inside.Compared with prior art, share same storer between a plurality of processors, obtain data the storer Flash A from processor B by primary processor A, owing to reduced the usage quantity of storer, thereby can reduce the volume of multiprocessor machine, reduce the cost of multiprocessor machine; In addition, primary processor A and from processor B when storer Flash A is operated, adopt the mode of time-sharing multiplex, thereby can reduce taking of system, improve the operational efficiency of multiprocessor machine.
Embodiment three
Present embodiment provides a kind of multiprocessor machine, and as shown in Figure 3, described multiprocessor machine comprises: primary processor 31, storer 32 reach from processor 33, and wherein, described primary processor 31 comprises:
Receiver module 311 is used to receive described startup command from processor 33;
Read module 312 is used for according to described startup command by described storer 32 reading of data;
Sending module 313 is used for described data are sent to described from processor 32.
In the present embodiment, described storer can be external memory storage Flash, but is not limited only to this.
Embodiment of the invention multiprocessor machine, primary processor is connected with storer respectively with from processor, primary processor is according to the startup command from processor, by reading of data in the described storer, and send the data to from processor, do not need for from the independent configuring external storer of processor, can realize data by external memory storage to resettlement from processor inside.Compared with prior art, share same storer between a plurality of processors, obtain data the storer from processor by primary processor, owing to reduced the usage quantity of storer, thereby can reduce the volume of multiprocessor machine, reduce the cost of multiprocessor machine.
Embodiment four
As shown in Figure 4, described multiprocessor machine comprises: primary processor 41, storer 42 reach from processor 43, and wherein, described primary processor 41 comprises:
Receiver module 411 is used to receive described startup command from processor 43;
Wherein, described startup command is arranged in the curing address from processor 43, carry in the described startup command from the enabling address of processor 43, in described storer 42, store and the corresponding log-on data of described startup command, can be according to described startup command by reading corresponding log-on data in the described storer 42.
Read module 412 is used for according to described startup command by described storer 42 reading of data;
Sending module 413 is used for described data are sent to described from processor 43.
Further, described primary processor 41 can also comprise:
First link block 414 is used for setting up and described being connected from processor 43 by serial mode;
Wherein, on primary processor 41, can use the Flash SPI interface of the virtual serial of GPIO, with this Flash SPI interface and the corresponding connection of serial Flash interface from processor 43.
Second link block 415 is used for setting up and being connected of described storer 42 by parallel mode.
Wherein, primary processor 41 and from the burning sheet program of processor 43 all programming storer 42, take the different memory areas of storer 42 respectively, primary processor 41 with adopt the mode of time-sharing multiplexs that storer 42 is carried out associative operation from processor 43.
Then described receiver module 411 specifically is used to receive the startup command of described serial mode from processor 43;
Described read module 412 specifically is used for being read by described storer 42 according to described startup command the data of parallel mode;
Described sending module 413 specifically is used for sending to described data described from processor 43 with serial mode.
Further, described primary processor 41 can also comprise:
Modular converter 416 is used for the startup command that described receiver module 411 receives is extremely walked abreast by serial conversion, and the data that described read module 412 is read are converted to serial by walking abreast.
Then described read module 412 specifically is used for being read by described storer 42 according to the startup command after 416 conversions of described modular converter the data of parallel mode;
Described sending module 413 specifically is used for sending to the data after described modular converter 416 conversions described from processor 43 with serial mode.
Further, described primary processor 41 can also comprise:
Control module 417 is used for powering on after described primary processor 41 startups are finished from processor 43 by 414 controls of described first link block are described.
Further, described receiver module 411 also is used for receiving described modification order from processor 43 by described first link block 414;
Then described primary processor 41 can also comprise:
Modified module 418 also is used for the modification order according to described receiver module 411 receptions, makes amendment by the data in 415 pairs of described storeies 42 of described second link block.
In the present embodiment, primary processor and from processor when starting, when perhaps the data in the storer being made amendment, all adopt the mode of time-sharing multiplex, thereby can reduce taking of system, improve the operational efficiency of multiprocessor machine.
In the present embodiment, described storer can be external memory storage Flash, but is not limited only to this.
Embodiment of the invention multiprocessor machine, primary processor is connected with storer respectively with from processor, primary processor is according to the startup command from processor, by reading of data in the described storer, and send the data to from processor B, do not need for from the independent configuring external storer of processor B, can realize data by external memory storage to resettlement from processor B inside.Compared with prior art, share same storer between a plurality of processors, obtain data the storer from processor by primary processor, owing to reduced the usage quantity of storer, thereby can reduce the volume of multiprocessor machine, reduce the cost of multiprocessor machine; In addition, primary processor and from processor when storer is operated, adopt the mode of time-sharing multiplex, thereby can reduce taking of system, improve the operational efficiency of multiprocessor machine.
The above-mentioned method embodiment that provides can be provided the multiprocessor machine that the embodiment of the invention provides.Method, the multiprocessor machine of shared storage between processor that the embodiment of the invention provides goes for having the terminal device of multiprocessor, but is not limited only to this.
One of ordinary skill in the art will appreciate that all or part of flow process that realizes in the foregoing description method, be to instruct relevant hardware to finish by computer program, described program can be stored in the computer read/write memory medium, this program can comprise the flow process as the embodiment of above-mentioned each side method when carrying out.Wherein, described storage medium can be magnetic disc, CD, read-only storage memory body (Read-Only Memory, ROM) or at random store memory body (Random Access Memory, RAM) etc.
The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; the variation that can expect easily or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection domain of claim.

Claims (10)

1. the method for a shared storage between processor is characterized in that, described method comprises:
Primary processor receives the startup command from processor;
Primary processor according to described startup command by reading of data in the storer;
Primary processor sends to described data described from processor.
2. method according to claim 1 is characterized in that, receives before the startup command of processor at described primary processor, and described method also comprises:
Primary processor is set up and described being connected from processor by serial mode;
Primary processor is set up and being connected of described storer by parallel mode.
3. method according to claim 2 is characterized in that, described primary processor according to described startup command by storer in before the reading of data, described method also comprises:
Primary processor is extremely parallel by serial conversion with described startup command;
At described primary processor described data are sent to describedly before processor, described method also comprises:
Primary processor is converted to serial with described data by walking abreast.
4. method according to claim 1 is characterized in that, receives before the startup command of processor at described primary processor, and described method also comprises:
Controlling described the startup at described primary processor from processor powers on after finishing.
5. method according to claim 1 is characterized in that, described method also comprises:
Primary processor receives described modification order from processor;
Primary processor is made amendment to the data in the described storer according to described modification order.
6. a multiprocessor machine is characterized in that, comprising: primary processor, storer reach from processor, and wherein, described primary processor comprises:
Receiver module is used to receive described startup command from processor;
Read module is used for according to described startup command by described storer reading of data;
Sending module is used for described data are sent to described from processor.
7. multiprocessor machine according to claim 6 is characterized in that, described primary processor also comprises:
First link block is used for setting up and described being connected from processor by serial mode;
Second link block is used for setting up and being connected of described storer by parallel mode.
8. multiprocessor machine according to claim 7 is characterized in that, described primary processor also comprises:
Modular converter, the startup command that is used for described receiver module is received is extremely walked abreast by serial conversion, and the data that described read module is read are converted to serial by walking abreast.
9. multiprocessor machine according to claim 6 is characterized in that, described primary processor also comprises:
Control module is used to control described the startup at described primary processor from processor and powers on after finishing.
10. multiprocessor machine according to claim 6 is characterized in that, described receiver module also is used to receive described modification order from processor;
Described primary processor also comprises:
Modified module is used for according to described modification order the data in the described storer being made amendment.
CN201010106728A 2010-02-08 2010-02-08 Method for sharing storage among processors and multiprocessor equipment Pending CN101777038A (en)

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Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9880538B2 (en) 2013-12-13 2018-01-30 Asmedia Technology Inc. Electronic device and method for loading program code thereof
WO2018120243A1 (en) * 2016-12-31 2018-07-05 深圳配天智能技术研究院有限公司 Digital control system based on field-programmable gate array, and data transmission method thereof
CN110119286A (en) * 2019-04-11 2019-08-13 厦门亿联网络技术股份有限公司 A kind of firmware guidance implementation method based on simulation Flash chip
CN111163001A (en) * 2019-12-20 2020-05-15 青岛海信宽带多媒体技术有限公司 Method for sharing Flash memory and convergence gateway
CN111506529A (en) * 2020-06-30 2020-08-07 深圳市芯天下技术有限公司 High-speed SPI instruction response circuit applied to F L ASH
CN112905522A (en) * 2021-02-22 2021-06-04 深圳市显控科技股份有限公司 Multi-core shared starting system, control method thereof and storage medium
CN113778538A (en) * 2021-09-13 2021-12-10 讯牧信息科技(上海)有限公司 Multiprocessor system and starting method thereof
CN114817120A (en) * 2022-06-29 2022-07-29 湖北芯擎科技有限公司 Cross-domain data sharing method, system-on-chip, electronic device and medium

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9880538B2 (en) 2013-12-13 2018-01-30 Asmedia Technology Inc. Electronic device and method for loading program code thereof
WO2018120243A1 (en) * 2016-12-31 2018-07-05 深圳配天智能技术研究院有限公司 Digital control system based on field-programmable gate array, and data transmission method thereof
CN110119286A (en) * 2019-04-11 2019-08-13 厦门亿联网络技术股份有限公司 A kind of firmware guidance implementation method based on simulation Flash chip
CN111163001A (en) * 2019-12-20 2020-05-15 青岛海信宽带多媒体技术有限公司 Method for sharing Flash memory and convergence gateway
CN111506529A (en) * 2020-06-30 2020-08-07 深圳市芯天下技术有限公司 High-speed SPI instruction response circuit applied to F L ASH
CN112905522A (en) * 2021-02-22 2021-06-04 深圳市显控科技股份有限公司 Multi-core shared starting system, control method thereof and storage medium
CN113778538A (en) * 2021-09-13 2021-12-10 讯牧信息科技(上海)有限公司 Multiprocessor system and starting method thereof
CN114817120A (en) * 2022-06-29 2022-07-29 湖北芯擎科技有限公司 Cross-domain data sharing method, system-on-chip, electronic device and medium

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Application publication date: 20100714