CN101771409A - 具有最佳状态反馈控制器的锁相环 - Google Patents
具有最佳状态反馈控制器的锁相环 Download PDFInfo
- Publication number
- CN101771409A CN101771409A CN200910224183A CN200910224183A CN101771409A CN 101771409 A CN101771409 A CN 101771409A CN 200910224183 A CN200910224183 A CN 200910224183A CN 200910224183 A CN200910224183 A CN 200910224183A CN 101771409 A CN101771409 A CN 101771409A
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- 238000000034 method Methods 0.000 claims abstract description 27
- 238000011084 recovery Methods 0.000 claims description 23
- 239000011159 matrix material Substances 0.000 claims description 22
- 230000003044 adaptive effect Effects 0.000 claims description 10
- 238000005259 measurement Methods 0.000 claims description 10
- 230000007704 transition Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000001914 filtration Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000036962 time dependent Effects 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0664—Clock or time synchronisation among packet nodes using timestamps unidirectional timestamps
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0632—Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Multimedia (AREA)
- Computer Hardware Design (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
Description
Claims (19)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0823690.3 | 2008-12-31 | ||
GB0823690.3A GB2466650B (en) | 2008-12-31 | 2008-12-31 | Recovery of timing information |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101771409A true CN101771409A (zh) | 2010-07-07 |
CN101771409B CN101771409B (zh) | 2013-11-20 |
Family
ID=40352569
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009102241834A Active CN101771409B (zh) | 2008-12-31 | 2009-11-26 | 具有最佳状态反馈控制器的锁相环 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8599986B2 (zh) |
CN (1) | CN101771409B (zh) |
DE (1) | DE102009053580A1 (zh) |
FR (1) | FR2940725A1 (zh) |
GB (1) | GB2466650B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102739387A (zh) * | 2011-04-04 | 2012-10-17 | 特拉博斯股份有限公司 | 用于控制频率同步的方法和装置 |
CN107171670A (zh) * | 2016-03-07 | 2017-09-15 | 恩智浦有限公司 | 数据转换 |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7912885B2 (en) * | 2007-04-30 | 2011-03-22 | Agilent Technologies, Inc. | Method and system for filtering of networked, synchronized measurements |
US9444566B1 (en) * | 2014-03-07 | 2016-09-13 | Integrated Device Technology, Inc. | Methods of performing time-of-day synchronization in packet processing networks |
GB2525929B (en) | 2014-05-09 | 2016-08-10 | Imagination Tech Ltd | Time stamp replication within a wireless network |
US10608647B1 (en) * | 2018-12-14 | 2020-03-31 | Silicon Laboratories Inc. | Delay adjustment using frequency estimation |
US11128742B2 (en) | 2019-03-08 | 2021-09-21 | Microsemi Storage Solutions, Inc. | Method for adapting a constant bit rate client signal into the path layer of a telecom signal |
US10727845B1 (en) * | 2019-06-25 | 2020-07-28 | Silicon Laboratories Inc. | Use of a virtual clock in a PLL to maintain a closed loop system |
US10972084B1 (en) | 2019-12-12 | 2021-04-06 | Microchip Technology Inc. | Circuit and methods for transferring a phase value between circuits clocked by non-synchronous clock signals |
US10917097B1 (en) | 2019-12-24 | 2021-02-09 | Microsemi Semiconductor Ulc | Circuits and methods for transferring two differentially encoded client clock domains over a third carrier clock domain between integrated circuits |
US10908635B1 (en) | 2019-12-24 | 2021-02-02 | Silicon Laboratories Inc. | Detection and management of frequency errors in a reference input clock signal |
US10992301B1 (en) | 2020-01-09 | 2021-04-27 | Microsemi Semiconductor Ulc | Circuit and method for generating temperature-stable clocks using ordinary oscillators |
US11239933B2 (en) | 2020-01-28 | 2022-02-01 | Microsemi Semiconductor Ulc | Systems and methods for transporting constant bit rate client signals over a packet transport network |
US11424902B2 (en) | 2020-07-22 | 2022-08-23 | Microchip Technology Inc. | System and method for synchronizing nodes in a network device |
CN112083664A (zh) * | 2020-09-12 | 2020-12-15 | 哈尔滨理工大学 | 一种网络环境下的异步切换控制系统 |
US11838111B2 (en) | 2021-06-30 | 2023-12-05 | Microchip Technology Inc. | System and method for performing rate adaptation of constant bit rate (CBR) client data with a variable number of idle blocks for transmission over a metro transport network (MTN) |
US11916662B2 (en) | 2021-06-30 | 2024-02-27 | Microchip Technology Inc. | System and method for performing rate adaptation of constant bit rate (CBR) client data with a fixed number of idle blocks for transmission over a metro transport network (MTN) |
US11736065B2 (en) | 2021-10-07 | 2023-08-22 | Microchip Technology Inc. | Method and apparatus for conveying clock-related information from a timing device |
US11799626B2 (en) | 2021-11-23 | 2023-10-24 | Microchip Technology Inc. | Method and apparatus for carrying constant bit rate (CBR) client signals |
CN114337980B (zh) * | 2021-12-23 | 2024-04-16 | 中国电建集团河南省电力勘测设计院有限公司 | 一种面向5g智能电网的高精度时钟同步方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7130368B1 (en) * | 2002-09-19 | 2006-10-31 | Nortel Network Limited | Clock recovery using a direct smoothing process |
CN101313521A (zh) * | 2005-11-23 | 2008-11-26 | 艾利森电话股份有限公司 | 使用滤波和主动探测来评估数据传输路径 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5062123A (en) * | 1989-08-16 | 1991-10-29 | Cincinnati Electronics Corporation | Kalman predictor for providing a relatively noise free indication of the phase of a carrier laden with noise |
GB9414729D0 (en) | 1994-07-21 | 1994-09-07 | Mitel Corp | Digital phase locked loop |
GB2353437A (en) * | 1999-08-17 | 2001-02-21 | Fujitsu Ltd | Diversity transmission means with phase adjustment depending upon a feedback signal supplied to the transmitter by the receiver |
GB2369940B (en) | 2000-12-09 | 2004-10-20 | Mitel Corp | Multiple input phase lock loop with hitless reference switching |
CN1361433A (zh) * | 2000-12-23 | 2002-07-31 | 林清芳 | 运载体的全融合定位方法 |
CN1262909C (zh) * | 2003-07-08 | 2006-07-05 | 胜华科技股份有限公司 | 触控面板的坐标预估与估测滤波方法 |
CA2903343C (en) * | 2005-03-02 | 2017-11-28 | 3 Phoenix, Inc. | An inverted passive optical network/inverted passive electrical network (ipon/ipen) based data fusion and synchronization system |
US7333468B1 (en) * | 2005-05-16 | 2008-02-19 | Sun Microsystems, Inc. | Digital phase locked loops for packet stream rate matching and restamping |
US20100020829A1 (en) * | 2006-10-27 | 2010-01-28 | Telefonaktiebolaget Lm Ericsson (Publ) | Method for clock recovery using updated timestamps |
CN100538275C (zh) * | 2007-06-28 | 2009-09-09 | 北京航空航天大学 | 一种基于陀螺全站仪-激光标靶的盾构机自动导向系统的在线标定方法 |
-
2008
- 2008-12-31 GB GB0823690.3A patent/GB2466650B/en not_active Expired - Fee Related
-
2009
- 2009-10-26 US US12/605,974 patent/US8599986B2/en active Active
- 2009-11-17 DE DE102009053580A patent/DE102009053580A1/de not_active Ceased
- 2009-11-26 CN CN2009102241834A patent/CN101771409B/zh active Active
- 2009-12-21 FR FR0959336A patent/FR2940725A1/fr not_active Withdrawn
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7130368B1 (en) * | 2002-09-19 | 2006-10-31 | Nortel Network Limited | Clock recovery using a direct smoothing process |
CN101313521A (zh) * | 2005-11-23 | 2008-11-26 | 艾利森电话股份有限公司 | 使用滤波和主动探测来评估数据传输路径 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102739387A (zh) * | 2011-04-04 | 2012-10-17 | 特拉博斯股份有限公司 | 用于控制频率同步的方法和装置 |
CN102739387B (zh) * | 2011-04-04 | 2016-12-14 | 特拉博斯股份有限公司 | 用于控制频率同步的方法和装置 |
CN107171670A (zh) * | 2016-03-07 | 2017-09-15 | 恩智浦有限公司 | 数据转换 |
Also Published As
Publication number | Publication date |
---|---|
FR2940725A1 (fr) | 2010-07-02 |
DE102009053580A1 (de) | 2010-07-01 |
GB0823690D0 (en) | 2009-02-04 |
CN101771409B (zh) | 2013-11-20 |
US8599986B2 (en) | 2013-12-03 |
US20100166130A1 (en) | 2010-07-01 |
GB2466650B (en) | 2012-07-18 |
GB2466650A (en) | 2010-07-07 |
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C56 | Change in the name or address of the patentee |
Owner name: MICROSEMI SEMICONDUCTOR CO., LTD. Free format text: FORMER NAME: ZARLINK SEMICONDUCTOR AB Owner name: MICROSEMI SEMICONDUCTOR ULC Free format text: FORMER NAME: MICROSEMI SEMICONDUCTOR CO., LTD. |
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CP01 | Change in the name or title of a patent holder |
Address after: K2K3H4, Ontario, Canada Patentee after: MICROSEMI SEMICONDUCTOR ULC Address before: K2K3H4, Ontario, Canada Patentee before: Microsemi Semiconductor ULC Address after: K2K3H4, Ontario, Canada Patentee after: Microsemi Semiconductor ULC Address before: K2K3H4, Ontario, Canada Patentee before: Zarlink Semiconductor AB |