CN101771356A - UPS voltage compensation value-acquiring method and application thereof - Google Patents

UPS voltage compensation value-acquiring method and application thereof Download PDF

Info

Publication number
CN101771356A
CN101771356A CN201019164042A CN201019164042A CN101771356A CN 101771356 A CN101771356 A CN 101771356A CN 201019164042 A CN201019164042 A CN 201019164042A CN 201019164042 A CN201019164042 A CN 201019164042A CN 101771356 A CN101771356 A CN 101771356A
Authority
CN
China
Prior art keywords
signal
voltage
compensation value
center line
ups
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201019164042A
Other languages
Chinese (zh)
Other versions
CN101771356B (en
Inventor
孔雪娟
全亚斌
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Santak Electronic Shenzhen Co Ltd
Original Assignee
Santak Electronic Shenzhen Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Santak Electronic Shenzhen Co Ltd filed Critical Santak Electronic Shenzhen Co Ltd
Priority to CN2010191640428A priority Critical patent/CN101771356B/en
Publication of CN101771356A publication Critical patent/CN101771356A/en
Application granted granted Critical
Publication of CN101771356B publication Critical patent/CN101771356B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention discloses a UPS voltage compensation value-acquiring method and application thereof. The acquired voltage compensation value is used to modulate output signal of a commutation controller and an inverter controller or output signal of a midline bridge leg, wherein the modulation is to subtract a voltage compensation value from various phase control quantities outputted by a rectifier and an inverter or the output signal of the midline bridge leg and then to input the obtained values to a control end of a triode of the rectifier, inverter or midline bridge leg to control the on-off of the triode. By modulating the voltage compensation value, the method can lower the coupling degree between an input and an output when the UPS with the midline bridge leg is used in a three-phase four-wire system and connected with a nonlinear load of RCD and simultaneously lowers two index values of THDi and THDv and optimizes the circuit.

Description

The voltage compensation value-acquiring method of a kind of UPS and application thereof
Technical field
The present invention relates to voltage compensation value-acquiring method and the application thereof of a kind of UPS.
Background technology
Two conversion uninterrupted power supplys (Uninterruptible Power System, UPS) two important index are arranged: the total harmonic distortion of input current (Total Harmonic Distortion of Current, be called for short THDi) and the total harmonic distortion (Total Harmonic Distortion of Voltage, abbreviation THDv) of output voltage.The THDi of input current reduces the harmonic pollution of UPS to civil power, and the THDi index is more little, and UPS is just more little to the pollution of civil power, helps improving power grid environment.Output THDv index is in order to satisfy the demand of user side, and the THDv index is more little, and the power quality that offers ustomer premises access equipment is just good more.
The UPS topological structure of existing application under the three-phase and four-line occasion as depicted in figs. 1 and 2.Do not have the center line brachium pontis in the UPS circuit shown in Figure 1, its advantage is: not coupling between the input and output, also not coupling between each phase of output is than being easier to obtain THDv and THDi preferably.But its shortcoming is: the DC bus-bar voltage in this circuit is higher, therefore needs the device of selection, and higher as the requirement of withstand voltage of triode, electric capacity, the device cost height makes that the cost of entire circuit is higher.
UPS circuit shown in Figure 2 has the center line brachium pontis, and its advantage is: the technology of floating by busbar voltage has reduced busbar voltage, can select withstand voltage lower bus capacitor, reduces the cost of circuit.But its shortcoming is: because the existence of center line brachium pontis, the center line brachium pontis just provides the coupling circuit of input and output side, coupling circuit between each phase of output also is provided, and the meeting existence is coupled between the output so interchange is imported and exchanged, and also can have coupling between each phase of output.When UPS output termination linear R CD load, have the zero-sequence current of can not ignore and flow to the inversion end, thereby be reflected in inversion inductive current i La, i Lb, i LcIn.The inversion inductive current can flow to the center line brachium pontis after adding zero-sequence current, and produces pressure drop on the inductance of center line brachium pontis, thereby causes the THDv index variation of output voltage; This part electric current is reflected on each phase input electric current by the coupling of center line brachium pontis simultaneously, causes the THDi index of input current significantly to increase.THDv and the non-constant of THDi when therefore, UPS shown in Figure 2 connects the RCD nonlinear load.In the prior art, each triode is carried out switch control, be coupled to the influence of THDv and THDi in the hope of reducing the center line brachium pontis, but effect is still not obvious by commutation controller and inverter controller output signal.Therefore, need improve or inductive drop by the center line brachium pontis compensates the output signal of commutation controller and inverter controller, reduce each degree of coupling between mutually of input and output and output,, optimize circuit with two index THDv reducing circuit and the value of THDi.
Summary of the invention
Technical problem to be solved by this invention is: remedy above-mentioned the deficiencies in the prior art, voltage compensation value-acquiring method and the application thereof of a kind of UPS are proposed, come the output signal of modulation rectification controller, inverter controller by the voltage compensation value that obtains, or the inductive drop signal on the modulation center line brachium pontis, to reduce the degree of coupling between input and output and the output, reduce by two indexs of THDi and THDv simultaneously.
Technical problem of the present invention is solved by following technical scheme:
The voltage compensation value-acquiring method of a kind of UPS, described UPS comprises rectifier, commutation controller, inverter and inverter controller, described UPS has the center line brachium pontis, be applied under the three-phase and four-line occasion, described commutation controller output rectification control voltage signal is controlled each phase triode in the described rectifier, also produces each phase reference current of described rectifier simultaneously; Described inverter controller output inversion control voltage signal is controlled each phase triode in the described inverter, also produces each phase reference current of described inverter simultaneously, and following steps are arranged successively:
1) actual current that flows through in each the inversion filter inductance mutually of actual input current and described inverter according to described each phase of rectifier is handled the actual current (i that obtains flowing through the center line brachium pontis n);
2) each phase reference current of the described rectifier that produces according to described commutation controller and described inverter that described inverter controller produces each obtain flowing through the current reference value (i of center line brachium pontis with reference to current processing Ref_7th);
3) with the current reference value (i of described center line brachium pontis Ref_7th) deduct the actual current (i of described center line brachium pontis n) obtain both difference signal (i Ref_7th-i n);
4) according to the current reference value (i of described center line brachium pontis Ref_7th) and described both difference signal (i Ref_7th-i n) handle and to obtain voltage compensation value.
In the optimized technical scheme,
Handling the method that obtains voltage compensation value in the step 4) is: with the current reference value (i of described center line brachium pontis Ref_7th) multiply by first proportionality coefficient and obtain first signal, with described both difference signal (i Ref_7th-i n) multiply by second proportionality coefficient and obtain secondary signal, described first signal and described secondary signal addition are obtained described voltage compensation value.
Described first proportionality coefficient and described second proportionality coefficient measure by the Newton optimization method.
Technical problem of the present invention is solved by following further technical scheme:
A kind of UPS that uses the voltage compensation value that said method obtains, described UPS also comprises first adder, described first adder deducts described voltage compensation value with described rectification control voltage signal and obtains the commutating voltage modulation signal.
A kind of UPS that uses the voltage compensation value that said method obtains, described UPS also comprises second adder, described second adder deducts described voltage compensation value with described inversion control voltage signal and obtains the inverter voltage modulation signal.
A kind of UPS that uses the voltage compensation value that said method obtains, described UPS also comprises first adder and second adder, described first adder deducts described voltage compensation value with described rectification control voltage signal and obtains the commutating voltage modulation signal; Described second adder deducts described voltage compensation value with described inversion control voltage signal and obtains the inverter voltage modulation signal.
In the optimized technical scheme,
Described UPS also comprises modulation controller and center line brachium pontis controller; Zero-sequence component voltage signal of described modulation controller output; Described first adder adds the above zero-sequence component voltage signal with described rectification control voltage signal and deducts described voltage compensation value and obtain the commutating voltage modulation signal; Described second adder adds the above zero-sequence component voltage signal with described inversion control voltage signal and deducts described voltage compensation value and obtain the inverter voltage modulation signal; Described center line brachium pontis controller directly receives described zero-sequence component voltage signal and controls each triode in the described center line brachium pontis.
Technical problem of the present invention is solved by following further technical scheme:
A kind of UPS that uses the voltage compensation value that said method obtains, described UPS also comprises center line brachium pontis controller and the 3rd adder, described center line brachium pontis controller output center line brachium pontis control voltage signal, described the 3rd adder deducts described voltage compensation value with described center line brachium pontis control voltage signal and obtains center line bridge arm voltage modulation signal.
The beneficial effect that the present invention is compared with the prior art is:
Among the UPS of the present invention, use adder, with the voltage compensation value that obtains the output signal of commutation controller, inverter controller or center line brachium pontis controller is modulated, after described modulation was meant that the control signal of respectively controlling the output of voltage signal or center line brachium pontis controller mutually of rectifier, inverter output deducts described voltage compensation value, the control end that is input to each triode of rectifier, inverter or center line brachium pontis was again controlled cut-offfing of triode.By the modulation of voltage compensation value, the UPS that can reduce band center line brachium pontis is applied under the three-phase and four-line occasion, and when connecing the RCD nonlinear load, the degree of coupling between input and output and the output reduces by two of THDi and THDv simultaneously and refers to target value, has optimized circuit.Further, in commutation controller, inverter controller, behind the introducing voltage compensation value, continue to introduce the zero-sequence component voltage signal and modulate, can optimize circuit control signal further, further reduce by two of THDi and THDv and refer to target value.
Description of drawings
Fig. 1 is a kind of UPS circuit structure diagram in the background technology;
Fig. 2 is the another kind of UPS circuit structure diagram in the background technology;
Fig. 3 is the UPS circuit structure diagram of the specific embodiment of the invention one;
Fig. 4 is the control block diagram of the rectification control of the specific embodiment of the invention one;
Fig. 5 is the control block diagram of the inversion control of the specific embodiment of the invention two;
Fig. 6 is the control block diagram of the rectification control of the specific embodiment of the invention four;
Fig. 7 is the control block diagram of the inversion control of the specific embodiment of the invention four;
Fig. 8 is the control block diagram of the center line brachium pontis control of the specific embodiment of the invention four.
Main description of reference numerals
V Ga, v Gb, V GcBe respectively the analog signal amount of the three-phase input voltage of rectifier;
i Ga, i Gb, i GcBe respectively the analog signal amount of the actual input current of rectifier three-phase;
i La, i Lb, i LcBe respectively the electric current that flows through on the inversion filter inductance;
i Oa, i Ob, i OcBe respectively the electric current of inverter three-phase output end;
V AN, V BN, V CNBe respectively the voltage of inverter three-phase output;
V PFCref(z) target voltage of controlling for rectifier;
V DcAnalog signal amount for DC bus-bar voltage;
V Dc(z) be the digital sample values among the CPU that converts to behind the busbar voltage process A/D converter;
G PFCv(z) be the voltage correction link of commutation controller;
V Ga(z) for a phase input voltage signal of the three-phase input voltage of rectifier through the digital sample values among the CPU that converts to behind the A/D converter;
V Ga_peakPeak value for a phase in the three-phase input voltage of rectifier;
Sin (wt) is the line voltage fundamental waveform after the normalization;
i Ref_PFC_aA phase reference current in the reference current of the three-phase input current that produces for commutation controller;
i Ga(z) be the digital sample values among the CPU that converts to behind the process of a phase signals in the three-phase input current of the rectifier A/D converter;
G PFCi(z) be the current correction link of commutation controller;
V PFCcnout_aBe a phase control signal in the commutation controller output three-phase control signal;
V ZeroZero-sequence component for the output of the modulation controller of UPS;
V CompensationBe voltage compensation value;
V PFC_aBe a phase modulation signal in the commutation controller output three-phase modulations signal;
S TsBe the sampling switch in digital control;
V INVref_a(z) be a phase target voltage in the three-phase target voltage of inverter control;
G INVv(z) be the voltage correction link of inverter controller;
i Oa(z) be that a phase output current signal in the electric current of inverter three-phase output end is through the digital sample values among the escape to CP U behind the A/D converter;
i Ref_INV_aThe a phase reference current of the reference current that flows through in the three-phase inversion inductance for the inverter controller generation;
i La(z) be the digital sample values among the escape to CP U behind the current signal process A/D converter of a phase in the electric current that flows through on the inverter filter inductance;
G INVi(z) be the current correction link of inverter controller;
V AN(z) for the output voltage signal amount of a phase in the voltage of inverter three-phase output through among the escape to CP U behind the A/D converter digital sample values;
V INVcnout_a(z) be a phase control signal in the inverter controller output three-phase control signal;
V Inv_aBe a phase modulation signal in the inverter controller output three-phase modulations signal;
V Neutral_legBe center line brachium pontis modulation signal;
Embodiment
Below in conjunction with embodiment and contrast accompanying drawing the present invention is described in further details.
Embodiment one
As shown in Figure 3, be the UPS circuit structure diagram of present embodiment.UPS is applied under the three-phase and four-line occasion, comprises rectifier 1, commutation controller 10, inverter 2, inverter controller 20, center line brachium pontis 3 and center line brachium pontis controller 30.Center line brachium pontis 3 comprises the complementary switch pipe that triode Q7 and Q8 form, center line brachium pontis filter inductance Ln.Center line brachium pontis controller 30 output center line brachium pontis modulation signal V Neutral_leg, control triode Q7 and Q8 cut-off.
The cut-offfing of each phase triode Q1, Q2, Q3, Q4, Q5 and Q6 in the commutation controller 10 output rectifications control voltage signals control rectifiers, also produce simultaneously rectifier each with reference to current i Ref_PFC_a, i Ref_PFC_b, i Ref_PFC_cThe cut-offfing of each phase triode Q9, Q10, Q11, Q12, Q13 and Q14 in the inverter controller 20 output inversion control voltage signal control inverters, also produce simultaneously inverter each with reference to current i Ref_INV_a, i Ref_INV_b, i Ref_INV_cWherein each triode can be by IGBT, and MOSFET constant power semiconductor device replaces.There are following steps to obtain voltage compensation value V successively Compensation:
1) measures the actual input current i that obtains each phase of rectifier Ga, i Gb, i Gc, and with actual input current i Ga, i Gb, i GcAddition;
2) the actual current i that flows through in the inversion filter inductance of each phase of inverter is obtained in measurement La, i Lb, i Lc, and with the actual current i that flows through in the inversion filter inductance La, i Lb, i LcAddition;
3) calculate the actual current i that the center line brachium pontis flows through n, i n = Σ k = a , b , c i gk - Σ k = a , b , c i Lk ;
4) rectifier that commutation controller 10 is produced is respectively with reference to current i Ref_PFC_a, i Ref_PFC_b, i Ref_PFC_cAddition;
5) inverter that inverter controller 20 is produced is respectively with reference to current i Ref_INV_a, i REF_INV_b, i Ref_INV_cAddition;
6) calculate the current reference value i that the center line brachium pontis flows through Ref_7th, i ref _ 7 th = Σ k = a , b , c i ref _ PFC _ k - Σ k = a , b , c i ref _ INV _ k ;
7) with the current reference value i of the center line brachium pontis that obtains in the step 6) Ref_7thDeduct the actual current value i of the center line brachium pontis that obtains in the step 3) nObtain both difference signal (i Ref_7th-i n);
8) calculating voltage offset V Compensation, wherein the first proportionality coefficient K1 and the second proportionality coefficient K2 measure v by Newton method optimization Compensation=v Forward_7th+ v Feedback_7th=k 1* i Ref_7th+ k 2* (i Ref_7th-i n).The first proportionality coefficient k1 and the second proportionality coefficient k2 are controlling units, and the first proportionality coefficient k1 and the second proportionality coefficient k2 realize that by two proportional controllers parameter is k1=0.2, k2=0.15 to the adjusting of bucking voltage in the present embodiment.Wherein also can passing ratio-integral controller and proportional-integral derivative controller realization.
UPS also comprises first adder in the present embodiment, utilizes voltage compensation value V CompensationThe rectification control voltage signal of modulation rectification controller 10 output, commutation controller 10 are handled and are produced each controlled quentity controlled variable V mutually of rectifier each phase reference currents and output rectifier PFCcnout_a, V PFCcnout_b, V PFCcnout_c, control cut-offfing of above-mentioned triode Q1, Q2, Q3, Q4, Q5 and Q6.The control block diagram of commutation controller 10 and first adder processing signals as shown in Figure 4.The control block diagram has provided the signal processing of a phase, and b is identical with a phase signals processing procedure with the signal processing of c phase mutually.The target voltage V of rectifier control PFCref(z) and dc-link capacitance analog quantity V DcDigital sample values V Dc(z) input summer together, adder output signal is output signal behind voltage correction, imports multiplier together with line voltage fundamental waveform Sin (wt) after the normalization and handles and produce rectifier a with reference to current i Ref_PFC_aA is with reference to current i Ref_PFC_aWith a input current i mutually GaDigital sample values i Ga(z) input summer together, adder output signal is output signal behind current correction, with a input voltage signal V mutually GaDigital sample values V Ga(z) input summer together, adder output signal are a phase control signal V of commutation controller 10 outputs PFCcnout_aThe a phase control signal of commutation controller 10 outputs is not directly inputted to the control end of rectifier triode, but is input to first adder, utilizes voltage compensation value V CompensationBe input to the triode control end after the modulation again.Stage of modulating is Fig. 4 and controls final step in the block diagram, a phase control signal V PFCcnout_a, voltage compensation value V CompensationImport first adder together, first adder is according to formula (1) output a phase modulation signal V PFC_a, this a phase modulation signal V PFC_aBe the control end control triode Q1 of input rectifier a phase triode and cut-offfing of Q4.
V PFC_K=V PFCcnout_k-V compensation,k=a,b,c (1)
Each output mutually of applied voltage compensating signal modulation rectification controller in the present embodiment, reduce on the center line brachium pontis inductive drop to commutation controller to a, b, the c point is with respect to the influence of the voltage signal control of ground wire, thereby reduce the influence of this pressure drop, thereby improve the performance index THDi of UPS input current THDi.
Embodiment two
The difference of present embodiment and execution mode one is: UPS also comprises second adder in the present embodiment, utilizes voltage compensation value V CompensationThe inversion control voltage signal of modulation inverter controller 20 outputs.
Inverter controller 20 is handled and is produced each controlled quentity controlled variable V mutually of inverter each phase reference currents and output inverter INVcnout_a, V INVcnout_b, V INVcnout_c, control triode Q9, Q10, Q11, Q12, Q13 and Q14 cut-off.The control block diagram of inverter controller 20 as shown in Figure 5.The control block diagram has provided the signal processing of a phase, and b is identical with a phase signals processing procedure with the signal processing of c phase mutually.The a phase target voltage V of inverter control INVref_a(z) the voltage V that exports mutually with inverter a ANDigital sample values V AN(z) input summer together, adder output signal is output signal behind voltage correction, with the current i of inverter a phase output terminal OaDigital sample values i Oa(z) input summer is handled and is produced the reference current i that flows through in the inverter a phase inductance together Ref_INV_aThe reference current i that flows through in a phase inductance Ref_INV_aWith the actual input current i of a phase inductance LaDigital sample values i La(z) input summer together, adder output signal is output signal behind current correction, the voltage V that exports mutually with a ANDigital sample values V AN(z) input summer together, adder output signal are a phase control signal V of inverter controller 20 outputs INVcnout_a(z).The a phase control signal of inverter controller 20 outputs is not directly inputted to the control end of inverter triode, but the input second adder, applied voltage offset V CompensationBe input to the triode control end after the modulation again.Stage of modulating is Fig. 5 and controls final step in the block diagram, a phase control signal V INVcnout_a(z), voltage compensation value V CompensationImport second adder together, second adder is according to formula (2) output a phase modulation signal V Inv_a, this a phase modulation signal V Inv_aPromptly import the control end of inverter a phase triode and control cut-offfing of triode.
V INV_K=V INVcnout_k-V compensation,k=a,b,c (2)
Each output mutually of applied voltage compensating signal modulation inverter controller in the present embodiment reduces pressure drop on the center line brachium pontis inductance to the influence of output voltage THDv, thereby improves the performance index THDv of UPS.
Embodiment three
The difference of present embodiment and execution mode one, two is: UPS also comprises first adder and second adder in the present embodiment, working voltage offset V CompensationThe control voltage signal of while modulation rectification controller 10 and inverter controller 20 outputs.
Stage of modulating is the final step in Fig. 4 and the control block diagram shown in Figure 5.
As shown in Figure 4, a phase control signal V PFCcnout_a, voltage compensation value V CompensationImport first adder together, first adder is according to formula (1) output a phase modulation signal V PFC_a, this a phase modulation signal V PFC_aBe the control end control triode Q1 of input rectifier a phase triode and cut-offfing of Q4.
As shown in Figure 5, a phase control signal V INVcnout_a(z), voltage compensation value V CompensationImport second adder together, second adder is according to formula (2) output a phase modulation signal V Inv_a, this a phase modulation signal V Inv_aPromptly import the control end of inverter a phase triode and control cut-offfing of triode.
Applied voltage compensating signal respectively each output mutually of output and inverter controller mutually of modulation rectification controller simultaneously in the present embodiment, reduce pressure drop on the center line brachium pontis inductance to commutation controller to a, b, the c point is with respect to the influence of the voltage signal control of ground wire, reduce the influence of this pressure drop simultaneously, thereby improve performance index THDi and the THDv of UPS input current THDi and output voltage THDv.
Embodiment four
The difference of present embodiment and execution mode three is: UPS also comprises modulation controller in the present embodiment, modulation controller produces the zero-sequence component voltage signal, be used for the control voltage signal of modulation rectification controller, inverter controller output simultaneously, and, further improve the control modulated process as the control signal of center line brachium pontis controller.
UPS in the present embodiment also comprises modulation controller, and modulation controller produces zero-sequence component voltage signal V of output Zero, zero-sequence component voltage signal V ZeroConcrete production process can produce the process of zero sequence compensation amount with reference to zero sequence compensation amount generator in the U.S. patent documents.U.S. patent documents is: application number is 10/763,962; The patent No. is US7088601; Invention and created name is: Power conversion apparatus and methods using DC busshifting, wherein specification the 2nd hurdle the 64th walks to the 3rd hurdle 13 row concrete description.This zero-sequence component voltage signal is introduced in the modulated process can further improve whole modulated process.Stage of modulating is the final step in Fig. 6, the control block diagram shown in Figure 7, and center line brachium pontis control block diagram as shown in Figure 8.
As shown in Figure 6, a phase control signal V PFCcnout_a, voltage compensation value V CompensationWith zero-sequence component voltage signal V ZeroImport first adder together, first adder is according to formula (3) output a phase modulation signal V PFC_a, this a phase modulation signal V PFC_aThe control end that is input rectifier a phase triode is controlled cut-offfing of triode.
v PFC_k=v PFCcnout_k+v zero-v compensation,k=a,b,c (3)
As shown in Figure 7, a phase control signal V INVcnout_a(z), voltage compensation value V CompensationWith zero-sequence component voltage signal V ZeroImport second adder together, second adder is according to formula (4) output a phase modulation signal V Inv_a, this a phase modulation signal V Inv_aPromptly import the control end of inverter a phase triode and control cut-offfing of triode.
V INV_k=v INVcnout_k+v zero-v compensation,k=a,b,c (4)
The control block diagram of center line brachium pontis controller 30 as shown in Figure 8, zero-sequence component V ZeroDirectly input center line brachium pontis controller 30, and center line brachium pontis controller 30 is according to formula (5) output center line brachium pontis control signal V Neutral_leg, control triode Q7 and Q8 cut-off.
v NeutralLeg=v zero (5)
Applied voltage compensating signal while modulation rectification controller and inverter controller in the present embodiment are also used zero-sequence component voltage signal modulation rectification controller and inverter controller simultaneously; Simultaneously, in the modulated process of commutation controller and inverter controller, introduce the zero-sequence component voltage signal, also in center line brachium pontis controller, introduce the zero-sequence component voltage signal, make whole modulated process reach perfect as far as possible degree, pressure drop on the center line brachium pontis inductance be can reduce to greatest extent to the influence of input current THDi and output voltage THDv, thereby performance index THDi and the THDv of UPS improved.
Form 1 has provided the comparison of experimental data: equal conditions, promptly same hardware and each module controls of same system have bucking voltage v CompensationModulation and uncompensated voltage v CompensationTHDi during modulation and THDv data.
Form 1: have or not the THDi of bucking voltage and THDv data to compare
Figure GSA00000029974900101
From data result as can be seen the modulated energy of bucking voltage reduce by the value of two index THDi and THDv: THDi and reduced approximately 5%, THDv has reduced about 3%.
Embodiment five
The difference of present embodiment and aforementioned four execution modes is: the UPS in the present embodiment also comprises center line brachium pontis controller and the 3rd adder, utilize voltage compensation value directly to introduce in the center line brachium pontis controller, the center line brachium pontis control voltage signal of center line brachium pontis controller output compensates.
Center line brachium pontis controller output center line brachium pontis control voltage signal, the 3rd adder deducts voltage compensation value with center line brachium pontis control voltage signal and obtains center line bridge arm voltage modulation signal, and the center line bridge arm voltage modulation signal that obtains is exported each triode in the control center line brachium pontis again.
Utilize voltage compensation value directly to modulate the output signal of center line brachium pontis controller in the present embodiment, its operation principle is the same when utilizing the output signal of voltage compensation value modulation rectification controller and inverter controller, the pressure drop that can reduce equally on the center line brachium pontis inductance influence be can reduce through ovennodulation center line brachium pontis control voltage signal, thereby performance index THDi and the THDv of UPS improved input current THDi and output voltage THDv.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, make some substituting or obvious modification without departing from the inventive concept of the premise, and performance or purposes are identical, all should be considered as belonging to protection scope of the present invention.

Claims (8)

1. the voltage compensation value-acquiring method of a UPS, described UPS comprises rectifier, commutation controller, inverter and inverter controller, described UPS has the center line brachium pontis, be applied under the three-phase and four-line occasion, described commutation controller output rectification control voltage signal is controlled each phase triode in the described rectifier, also produces each phase reference current of described rectifier simultaneously; Described inverter controller output inversion control voltage signal is controlled each phase triode in the described inverter, also produces each phase reference current of described inverter simultaneously, it is characterized in that: following steps are arranged successively:
1) actual current that flows through in each the inversion filter inductance mutually of actual input current and described inverter according to described each phase of rectifier is handled the actual current (i that obtains flowing through the center line brachium pontis n);
2) each phase reference current of the described rectifier that produces according to described commutation controller and described inverter that described inverter controller produces each obtain flowing through the current reference value (i of center line brachium pontis with reference to current processing Ref_7th);
3) with the current reference value (i of described center line brachium pontis Ref_7th) deduct the actual current (i of described center line brachium pontis n) obtain both difference signal (i Ref_7th-f n);
4) according to the current reference value (i of described center line brachium pontis Ref_7th) and described both difference signal (i Ref_7th-i n) handle and to obtain voltage compensation value.
2. the voltage compensation value-acquiring method of UPS according to claim 1 is characterized in that: handling the method that obtains voltage compensation value in the step 4) is: with the current reference value (i of described center line brachium pontis Ref_7th) multiply by first proportionality coefficient and obtain first signal, with described both difference signal (i Ref_7th-i n) multiply by second proportionality coefficient and obtain secondary signal, described first signal and described secondary signal addition are obtained described voltage compensation value.
3. the voltage compensation value-acquiring method of UPS according to claim 2, it is characterized in that: described first proportionality coefficient and described second proportionality coefficient measure by the Newton optimization method.
4. the UPS of the voltage compensation value that obtains according to the described method of claim 1 of an application, it is characterized in that: described UPS also comprises first adder, and described first adder deducts described voltage compensation value with described rectification control voltage signal and obtains the commutating voltage modulation signal.
5. the UPS of the voltage compensation value that obtains according to the described method of claim 1 of an application, it is characterized in that: described UPS also comprises second adder, and described second adder deducts described voltage compensation value with described inversion control voltage signal and obtains the inverter voltage modulation signal.
6. the UPS of the voltage compensation value that obtains according to the described method of claim 1 of an application, it is characterized in that: described UPS also comprises first adder and second adder, and described first adder deducts described voltage compensation value with described rectification control voltage signal and obtains the commutating voltage modulation signal; Described second adder deducts described voltage compensation value with described inversion control voltage signal and obtains the inverter voltage modulation signal.
7. UPS according to claim 6 is characterized in that: described UPS also comprises modulation controller and center line brachium pontis controller; Zero-sequence component voltage signal of described modulation controller output; Described first adder adds the above zero-sequence component voltage signal with described rectification control voltage signal and deducts described voltage compensation value and obtain the commutating voltage modulation signal; Described second adder adds the above zero-sequence component voltage signal with described inversion control voltage signal and deducts described voltage compensation value and obtain the inverter voltage modulation signal; Described center line brachium pontis controller directly receives described zero-sequence component voltage signal and controls each triode in the described center line brachium pontis.
8. the UPS of the voltage compensation value that obtains according to the described method of claim 1 of an application, it is characterized in that: described UPS also comprises center line brachium pontis controller and the 3rd adder, described center line brachium pontis controller output center line brachium pontis control voltage signal, described the 3rd adder deducts described voltage compensation value with described center line brachium pontis control voltage signal and obtains center line bridge arm voltage modulation signal.
CN2010191640428A 2010-02-02 2010-02-02 UPS voltage compensation value-acquiring method and application thereof Active CN101771356B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010191640428A CN101771356B (en) 2010-02-02 2010-02-02 UPS voltage compensation value-acquiring method and application thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010191640428A CN101771356B (en) 2010-02-02 2010-02-02 UPS voltage compensation value-acquiring method and application thereof

Publications (2)

Publication Number Publication Date
CN101771356A true CN101771356A (en) 2010-07-07
CN101771356B CN101771356B (en) 2012-03-07

Family

ID=42504022

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010191640428A Active CN101771356B (en) 2010-02-02 2010-02-02 UPS voltage compensation value-acquiring method and application thereof

Country Status (1)

Country Link
CN (1) CN101771356B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105981252A (en) * 2013-12-23 2016-09-28 施耐德电气It公司 Systems and methods for load harmonic suppression
CN108092303A (en) * 2017-12-05 2018-05-29 东南大学 A kind of fault tolerant control method and system of wind generator system back-to-back converter

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100668118B1 (en) * 2005-12-30 2007-01-16 한국전기연구원 A electrical power converter and power converting method for doubly-fed induction generator
JP5040287B2 (en) * 2006-02-24 2012-10-03 富士電機株式会社 Three-phase AC-AC converter
CN100375363C (en) * 2006-04-07 2008-03-12 北京四方清能电气电子有限公司 Apparatus for providing current loop for serial compensation equipment
CN101394089B (en) * 2008-07-23 2011-06-01 国网电力科学研究院武汉南瑞有限责任公司 Control method for three phase active electric power filter to output current wave

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105981252A (en) * 2013-12-23 2016-09-28 施耐德电气It公司 Systems and methods for load harmonic suppression
US9973034B2 (en) 2013-12-23 2018-05-15 Schneider Electric It Corporation Systems and methods for load harmonic suppression
CN105981252B (en) * 2013-12-23 2019-08-20 施耐德电气It公司 The system and method inhibited for load harmonic
CN108092303A (en) * 2017-12-05 2018-05-29 东南大学 A kind of fault tolerant control method and system of wind generator system back-to-back converter
CN108092303B (en) * 2017-12-05 2019-10-11 东南大学 A kind of fault tolerant control method and system of wind generator system back-to-back converter

Also Published As

Publication number Publication date
CN101771356B (en) 2012-03-07

Similar Documents

Publication Publication Date Title
CN103683288B (en) Based on parallel active filter and the control method thereof of Modular multilevel converter
CN102638043B (en) APF (Active Power Filter)parallel system and control method thereof
WO2018058603A1 (en) Three-phase converter and control method therefor
CN102983588B (en) A kind of photovoltaic grid-connected inverting system based on cutting-in control algorithm
CN105048788B (en) The multiport electric power electric transformer and its control method of a kind of Mixed cascading structure
CN107093954B (en) Two-stage three-phase four-leg inverter system with BOOST boosting function and control strategy
CN102801346B (en) Three-phase inverter with no-signal interconnecting lines connected in parallel and control method of three-phase inverter
CN109586590B (en) Multifunctional space vector modulation method for current source type current transformer
CN103368432B (en) The modulator approach of flexible DC power transmission modularization multi-level converter and control device
CN108988375B (en) Harmonic instability analysis method considering bilateral influence
CN107196491A (en) A kind of pair of buck combining inverter half periods current distortion suppression system and its method
CN107425710B (en) Pfc circuit control method and device based on load-current feedforward
CN102545681A (en) Step wave synthesis three-phase inverter capable of eliminating low frequency harmonic waves and control method
CN104753359A (en) Novel power frequency power electronic transformer and implementation method thereof
CN101771356B (en) UPS voltage compensation value-acquiring method and application thereof
Waware et al. A review of multilevel inverter based active power filter
CN111049201B (en) Coordination control method for AC/DC power grid hybrid high-power interface converter
CN102780387A (en) Control method of inverter
Lin et al. A novel NPC inverter for harmonics elimination and reactive power compensation
CN204858577U (en) Reactive power compensator based on two many level of H bridge modularization transverters
CN103532415B (en) Based on the four bridge legs current transformer space vector modulating method of gh γ coordinate system
Soomro et al. Optimal design of a single-phase APF based on PQ theory
CN113541515B (en) Control method and terminal for AC/DC bus interface converter
CN113224793B (en) Micro-grid multi-inverter parallel connection self-adaptive harmonic impedance remodeling control method and system
CN107786113A (en) A kind of Three-Phase Inverter control method based on improvement droop control strategy

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant