Description of drawings
According to various characteristics of the present invention, function and embodiment, all can be from above-mentioned detailed description, and reach preferable understanding with reference to the accompanying drawings simultaneously, these accompanying drawings comprise:
Fig. 1 is the embodiment that the example of the PCR shake in the transport stream reduces the signal graph of situation;
Fig. 2 is an embodiment of one of one receiver/demodulator device block schematic diagram;
Fig. 3 is an embodiment of a demonstration look-up table;
Fig. 4 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device;
Fig. 5 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device;
Fig. 6 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device;
Fig. 7 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device;
Fig. 8 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device;
Fig. 9 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device; And
Figure 10 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device.
[main element symbol description]
200~receiver 200a~RF (radio frequency)/digital units
200b~demodulator 202~antenna
204~tuner, 206~digital to analog converter device
208~synchronizer, 210~automatic gain controller
212~ejector, 214~fast Fourier transform unit
216~equalizer, 218~carrier phase and time tracker
220~symbolic solution interleaver, 2202~symbolic solution interlace memory
222~de-mapping device, 224~bit deinterlacer
226~Viterbi decoder 228~grouping deinterlacer
230~gift moral Solomon decoder, 232~descrambler
234~TPS decoder, 400~receiver
400b~demodulator 422~de-mapping device
4222~de-mapping device memory, 424~bit deinterlacer
500~receiver 500b~demodulator
522~de-mapping device, 524~bit deinterlacer
5242~bit release of an interleave memory, 526~Viterbi decoder
500~receiver 500b~demodulator
624~bit deinterlacer, 622~de-mapping device
700~receiver 700b~demodulator
720~symbolic solution interleaver, 722~de-mapping device
724~bit deinterlacer, 7242~bit release of an interleave memory
800~receiver 800b~demodulator
822~de-mapping device, 8242~de-mapping device memory
824~bit deinterlacer, 826~Viterbi decoder
900~receiver 900b~demodulator
920~symbolic solution interleaver, 9202~symbolic solution interlace memory
924~bit deinterlacer, 1000~receiver
1000b~demodulator 1020~symbolic solution interleaver
1024~bit deinterlacer, 10242~bit release of an interleave memory
1026~Viterbi decoder P
11-P
38: grouping
P
11'-P
38': grouping S
1-S
3: symbol
S
1'-S
3': transport stream S
TPS~TPS signal
T
11-T
37: time interval T
11'-T
37': time interval
T
S1-T
S3: symbol lengths T
S1'-T
S3': symbol lengths
T
P1-T
P3: symbol period T
P1'-T
P3': symbol period
Ts: transport stream Ts ': transport stream
Embodiment
Fig. 1 is the embodiment that the demonstration of the PCR shake in the transport stream reduces the signal graph of situation.In Fig. 1, a transport stream TS, promptly a mpeg transport stream can not have the rectification program that the PCR shake reduces operation through one.For example, this transport stream TS can be formed by the symbol S1-Sn of a sequence, and wherein n is an integer, and S1-Sn then does more detailed demonstration in the drawings.Each symbol Si () in the middle of these symbols S1-Sn can be further formed by the grouping Pil-Pim of a sequence, wherein for example, and m=8.As shown in scheming to understand, the pulse train (Burts) in the symbol S1-Sn, it is represented by time interval Tij respectively, can cause bigger PCR shake.If time interval Tij is big more, and then the shake of the PCR in the transport stream TS is big more.
Reduced in Fig. 1, the transport stream TS ' have the rectification program that the PCR shake reduces operation through, wherein time interval Tb1 to Tb3 is in transport stream TS ', so symbol S1 '-Sn ' presents more uniform distribution.Thus, transport stream TS ' PCR shake compare transport stream TS and promptly reduced.In addition, transport stream TS ' symbol lengths TS1 '-TS3 ' greater than the symbol lengths TS1-TS3 of transport stream TS, yet the symbol period of two transport stream TS and TS ' all equals TP1 to TP3.Be used for reducing the demonstration rectification program that PCR shakes according to one, can reduce time interval Tb1 to Tb3 by the symbol of once accepting bit deinterleave processing (bit-deinterleaving) of storing a sequence and the mode of utilizing a transfer rate (Throughput Rate) that reduces to read this symbol sebolic addressing then simply, more details will be in following description.
Fig. 2 is an embodiment of a block schematic diagram of one receiver/demodulator device.In Fig. 2, one receiver 200 can comprise one radio frequency/digital units 200a, it is in order to amplify and to change an analog radio-frequency signal to Base Band, wherein this analog radio-frequency signal can receive via an antenna 202, and the analog signal conversion of this amplification is become a digital signal, and a demodulator 200b, it is in order to carry out the rectification program.For example, receiver 200 can comprise a DVB-T receiver, and demodulator 200b can comprise an OFDM demodulator to carry out OFDM rectification program.
In Fig. 2, this radio frequency/digital units 200a can be configured to comprise a tuner (Tuner) 204, a digital to analog converter (ADC) 206, a synchronizer 208, and an automatic gain controller (Automatic Gain Controller; AGC) 210.Tuner 204 can be used to amplify this analog radio frequency (RF) signal that is received by this antenna 202, should be converted to a fundamental frequency signal through amplified analog signal, and filters this fundamental frequency signal.This ADC 206 can be used to change this fundamental frequency signal to this digital signal.This synchronizer 208 can be used to the combine digital signal processing, is picture synchronizationization, sign synchronizationization for example ... or the like similar program.This automatic gain controller (AGC) 210 can be used for controlling a gain of a receiving terminal to be fit to above-mentioned Digital Signal Processing.
In Fig. 2, OFDM demodulator 200b can be configured to and comprises an ejector (Eliminator) 212, a fast Fourier transform (Fast Fourier Transform; FFT) unit 214, one equalizer, 216, one carrier phases and time tracker 218, a symbolic solution interleaver (SymbolDeinterleaver) 220, a de-mapping device (Demapper), a bit deinterlacer (SymbolDeinterleaver) 224, a Viterbi decoder (Viterbi decoder) 226, one grouping deinterlacer (Packet Deinterleaver) (or being called external solution interleaver (external deinterleaver)) 228, one gift moral Saloman (Reed-Solomon; RS) decoder 230, and a descrambler (Descrambler) 232.This ejector 212 can be used for eliminating a protection (Guard Interval at interval; GI) with Cyclic Prefix (Cyclic Prefix; CP) signal, and this FFT unit 214 can be a frequency-region signal with a time domain conversion of signals.In addition, these equalizers 216 can remedy and amplify or distortion that transmission course caused, and this carrier phase and time tracker 218 phase place and time of can be used to follow the trail of a carrier wave.This symbolic solution interleaver 220 can provide a kind of at block fundamentally and based on the operation of the release of an interleave of symbol, and this de-mapping device 222 can be used for above-mentioned staggered and be converted to a simple bit stream by the symbol that a plurality of vectors (such as OPSK, 16QAM or 64QAM) are constituted through symbolic solution.And, this bit deinterlacer 224 can be used to provide the release of an interleave operation based on bit, that is, a kind of bit is (Bit-Wise) release of an interleave program one by one, and this Verterbi decoder 226 can be used to reverse once by the coded program of the performed mistake of one inside/convolution coder (Internal/Convolutional Coder) of a conveyer.This grouping deinterlacer 228 can comprise a convolution deinterlacer (ConvolutionalDeinterleaver), and this convolution deinterlacer is to carry out with the release of an interleave that is grouped into the basis to operate, that is the release of an interleave operation one by one of the bit within each grouping.This RS decoder 230 coded program of the performed mistake of a RS encoder in this conveyer once that can reverse.More specifically, this RS decoder 230 grouping that can produce 188 bits from the grouping of 204 bits that received.This descrambler 232 can be used for above-mentioned data through decoding are carried out descrambling, disperses to remove once energy performed in this conveyer, thereby recovers original successive bits stream.Therefore, this descrambler 232 successive bits stream that can be used for being recovered is provided as the final output stream of this demodulator 200b.
Symbolic solution interleaver 220 can comprise a symbolic solution interlace memory 2202 is gone through bit release of an interleave program with storage symbol.At this, de-mapping device 222 can receive the symbol of going through the symbolic solution cross-program and then these gone through the staggered symbol of symbolic solution and separate map operation from symbolic solution interlace memory 2202.When symbolic solution interleaver 220 finishes symbolic solution cross-program to a symbol, it can be with this example among the symbol of symbolic solution cross-program be stored in symbolic solution interlace memory 2202, and notice de-mapping device 222 go to begin to read and separate mapping this through the staggered symbol of symbolic solution.In the 8K pattern, de-mapping device 222 can take out 48 blocks finishing an OFDM symbol from symbolic solution interlace memory 2202, and in the 2K pattern, 222 of de-mapping devices take out 12 blocks to finish an OFDM symbol.Because each OFDM symbol can comprise 6048 data characters and then can comprise 1512 data characters in the 2K pattern in the 8K pattern, therefore de-mapping device 222 can utilize one to equal the transfer rate of 1/ (N*6048) and can utilize a transfer rate that equals 1/ (N*1512) to read symbolic solution interlace memory 2202 in the 2K pattern in the 8K pattern, wherein this parameter N can be a fixed integer, and this fixed integer is to decide according to system configuration and clock design, for example, can be fixed as 9.Yet, can increase this parameter N, that is N 9, to reduce transfer rate.As the relevant discussion of Fig. 1, reduce the interests that transfer rate causes the PCR shake to reduce.Under preferable situation, can be in symbolic solution interlace memory 2202 arbitraryly can by the next one under the condition that the staggered symbol of symbolic solution is covered is set up, transfer rate be minimized before symbolic solution interlace memory 2202 outputs from then on through the staggered symbol of symbolic solution.
Under the preferable situation, de-mapping device 222 makes its reading rate (being transfer rate) optimization adaptively, so that above-mentioned output stream through demodulation is more even, promptly has lower PCR shake, and the side is can adapt to all different transmission conditions.In order to reach this point, de-mapping device 222 can come its reading rate of optimization adaptively according to the transmission parameter of transport stream at least, so that demodulating process can provide best PCR shake to reduce effect.For example; in a DVB-T system, described transmission parameter can comprise number of pictures, troop (Constellation) (for example for QPSK, 16-QAM or 64-OAM), hierarchical information (Hierarchy Information) (these data are to encode with an additional parameter α under a normal or Hierarchy Mode), encoding rate (being 1/2,2/3,3/4,5/6,7/8 for example), protection (being 1/32,1/16,1/8,1/4 for example), transmission mode (being 2K or 8K for example) and unit marks (Cell Identification) at interval.Therefore, de-mapping device 222 can come its reading rate of optimization adaptively according at least one parameter in the middle of these parameters.For example, de-mapping device 222 can come its reading rate of optimization adaptively at interval according to transmission mode and protection.
In Fig. 2, OFDM demodulator 200b can also comprise a TPS (TransmissionParameter Signal (parameter signals)) decoder 234.This TPS decoder 234 can be used for receiving a frequency content from FFT214, the entrained information of specific carriers of this signal that recovery is received, and provide one to represent the TPS signal STPS of institute's recovering information to this de-mapping device 222.This information can comprise the transmission parameter of this transport stream STS.This descrambler 222 can come its reading rate of optimization adaptively according to the transmission parameter that this TPS signal STPS is carried then.
In order to reach the optimization of reading rate according to transmission parameter, this de-mapping device 222 can be with reference to a look-up table, this look-up table record corresponds to the transfer rate of different transmission parameter combination or the optimum value of parameter N, and wherein this optimum value provides best PCR to reduce effect.For example, this optimum value can obtain by reality test and measurement.In addition, this look-up table has all different practice modes.For example, this look-up table can be put into practice becomes a multiplexer.This multiplexer is configurable to be received this TPS signal and provides a rate controlled signal to become this optimum value with the reading rate of controlling this descrambler 232.
Fig. 3 is an embodiment of a demonstration look-up table.In Fig. 3, this look-up table can be used as de-mapping device 222 comes its reading rate of optimization adaptively at interval according to transmission mode and protection place, place.As shown in the figure, represent that corresponding to all available integer A of numerical value, B, the C of the parameter N of the combination of all transmission parameters wherein A, B and C represent 10,11 and 12 respectively, and all parameter N values all surpass a set value, are 9 for example.
At this, the reduction of transfer rate or minimize not necessarily requires to implement between symbolic solution interleaver 220 and mapper 222.Can only require is for going through reading the reduction of implementing output rating or minimizing of the staggered data of symbolic solution.
Fig. 4 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device.In Fig. 4, one receiver 400 can be similar to receiver 200 (in Fig. 2), just can comprise a demodulator 400b, wherein can between a de-mapping device 400b and a bit deinterlacer 424, implement the reduction of transfer rate or minimize, but not, implement the reduction of transfer rate or minimize at symbolic solution interleaver 220 and de-mapping device 222 as Fig. 2.For example, de-mapping device 422 can comprise a de-mapping device memory 4222 and separate the bit stream of mapping with the storage process, and wherein this once went through the symbolic solution cross-program through the bit stream of separating mapping in symbolic solution interleaver 220.Bit deinterlacer 424 can utilize once reducing or minimized transfer rate, comes to separate mapping memory 4222 from this and reads these through separating the bit stream of mapping.For example, bit deinterlacer 424 is its reading rate of optimization (being transfer rate) adaptively, or by reference one look-up table.For brevity, be the description of omitting all the other similar in Fig. 4 elements at this to the counter element of Fig. 2.
Fig. 5 is another embodiment of the block schematic diagram of example receiver/demodulator device.In Fig. 5, one receiver 500 can be similar to receiver 200 (in Fig. 2), just can comprise a demodulator 500b, wherein can between a bit deinterlacer 524 and a Viterbi decoder 526, implement the reduction of transfer rate or minimize, but not, implement the reduction of transfer rate or minimize at symbolic solution interleaver 220 and de-mapping device 222 as Fig. 2.For example, bit deinterlacer 524 can comprise a bit release of an interleave memory 5242 with the bit stream of storage through the bit release of an interleave, and wherein this bit stream through the bit release of an interleave was once gone through the symbolic solution cross-program in symbolic solution interleaver 220.Viterbi decoder 526 can utilize once reducing or minimized transfer rate, and coming from then on, bit release of an interleave memory 5242 reads these bit streams through the bit release of an interleave.For example, Viterbi decoder 526 is its reading rate of optimization adaptively, or by reference one look-up table.For brevity, be the description of omitting all the other similar in Fig. 5 elements at this to the counter element of Fig. 2.
Fig. 6 is another embodiment of the block schematic diagram of a demonstration receiver/demodulator device.In Fig. 6, one receiver 600 can be similar to receiver 200 (in Fig. 2), just can comprise a demodulator 600b, wherein the bit deinterlacer can be cooperated with each other with symbolic solution interleaver 220 toward reach and be become a so-called interior deinterlacer (Inner-deinterleaver).Symbolic solution interleaver 220 can comprise the symbol that a symbolic solution interlace memory 2202 interlocks through symbolic solution with storage, and bit deinterlacer 624 can utilize once reducing or minimized transfer rate, and coming from then on, symbolic solution interlace memory 6202 reads these through the staggered symbol of symbolic solutions.For brevity, be the description of omitting all the other similar in Fig. 6 elements at this to the counter element of Fig. 2.
Fig. 7 and 8 is other embodiment of the block schematic diagram of all the other demonstration receiver/demodulator devices.In Fig. 7 and 8, receiver 700 can be similar to receiver 200 (in Fig. 2) to 800, just can be respectively between bit deinterlacer 724 and de-mapping device 722, and implement the reduction of transfer rate between de-mapping device 822 and the Viterbi decoder 826 or minimize.For brevity, be the description of omitting Fig. 9 all the other elements similar at this to 10 to the counter element of Fig. 2.
Fig. 9 and 10 is other embodiment of the block schematic diagram of all the other demonstration receiver/demodulator devices.In Fig. 9 and 10, receiver 900 can be similar to receiver 200 (in Fig. 2) to 1000, and just de-mapping device 222 can be moved to respectively before symbolic solution interleaver 920 and 1020.For brevity, be the description of omitting Fig. 9 all the other elements similar at this to 10 to the counter element of Fig. 2.
In Fig. 2 to 10, transfer rate can be adjusted to ideal value adaptively, and the adaptivity that provides for the improvement of different transmission parameter is provided, thereby the PCR shake of improvement is provided.
Though the present invention with preferred embodiment openly as above; right its is not in order to qualification the present invention, those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the appended claims person of defining.