CN101741505A - Method and device for interweaving internal codes in communication system - Google Patents
Method and device for interweaving internal codes in communication system Download PDFInfo
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Abstract
The invention discloses a method and a device for interweaving internal codes in a communication system. The method comprises the following steps: internally interweaving a bit pair for a first sequence to acquire an interwoven second sequence; and interweaving a bit pair of the second sequence by adopting an QPP interweaving method to acquire am interwoven third sequence. The method and the device provided by the embodiment of the invention for interweaving the internal codes in the communication system obviously reduce the error floor of CTC decoding performance; and the QPP (Quadratic Permutation Polynomial) based interweaving method provides more flexible parallel processing capability for a receiving end decoder.
Description
Technical field
The present invention relates to communication technical field, the method and the device of interweaving internal codes in particularly a kind of communication system.
Background technology
In the existing communication system, in order to satisfy the demand of user for High Data Rate, need serviceability preferably error correction coding guarantee reliable communication.Existing channel coding technology near shannon limit comprises turbo sign indicating number and low-density check (LDPC, Low Density Parity Check) sign indicating number.The turbo sign indicating number is proposed in 1993 first by people such as Berrou, has coding simply, and decoding performance approaches the Shannon capacity limit, can support characteristics such as various code checks simultaneously flexibly, therefore, is fit to very much high-speed radiocommunication system and uses.Adopted as an essential channel coding schemes at present by third generation partner program (3GPP), micro-wave access global inter communication normal structures such as (Wimax, Worldwide Interoperability for Microwave Access).
Along with improving constantly of band efficiency, more and more higher for the throughput requirement of receiving terminal decoder.In order to address this problem, require the decoder of receiving terminal on the basis that as far as possible guarantees decoding performance, can realize the parallel decoding of component code decoder.Can realize parallel decoding in order to guarantee the component decoder, require between component code decoder 1 and 2 when mutual external information, the size of two component code decoders is can realize not having the read-write operation of conflict between the external information memory cell of M parallel processing decoder of W.Be that interweaving internal codes device and deinterleaver need satisfy
[π(j+tW)/W]≠[π(j+vW)/W] (1)
0≤j＜W wherein, 0≤t＜v＜N/W, N=MW need to represent the mutual information symbol numbers that exchanges between the component code decoder, and π (j) both can represent that interleaver also can represent deinterleaver here.
Decoding performance has QPP interleaver and ARP interleaver with the interweaving internal codes device that satisfies above-mentioned relation preferably at present.
The ARP interleaver is a kind of interleaver based on the linear congruential method design.Concrete intertexture form is as shown in the formula expression
π(x)＝(P
0*x+d(x))mod?N，x＝0，1，2，…，N-1 (2)
Wherein N represents information symbol number to be encoded.P
0Coprime with N, x is the sequence label, and d (x) is that one-period is the offset vector of C, and wherein C is called ring length.For an ARP interleaver, information symbol number to be encoded must be the integral multiple of C.For the ARP interleaver, each component decoder is when realizing parallel decoding, and requiring W is the multiple of C, and therefore, the ARP interleaver is not very flexible on parallel processing realizes.
Convolution turbo sign indicating number (CTC in the existing standard, Convolutional Turbo Codes) adopts structure shown in following Fig. 1 a, component code encoder by two dual inputs forms by interweaving internal codes device parallel cascade, two component code encoders wherein are the dual input recursive systematic convolutional code of 8 states, the concrete structure of the component coder among Fig. 1 a is shown in Fig. 1 b, and the interweaving internal codes method that the CTC that adopts in existing standard uses was divided into for two steps and interweaves.
The first step is that bit internally interweaves, and is specially:
The first sequence u
0=[(A
0, B
0), (A
1, B
1), (A
2, B
2), (A
3, B
3) ..., (A
N-1, B
N-1)] be the list entries of component coder 1 among Fig. 1 a, wherein the N information bit representing to import is to number.
If the information bit of importing in first sequence is to (A
i, B
i) (i=0,1,2 ..., subscript i N-1) satisfies imod2==1, then exchanges A
iAnd B
iOrder, otherwise do not exchange A
iAnd B
iOrder, and then the second sequence u after obtaining bit and internally interweaving
1=[(A
0, B
0), (B
1, A
1), (A
2, B
2), (B
3, A
3) ..., (B
N-1, A
N-1)]=[u
1(0), u
1(1), u
1(2), u
1(3) ..., u
1(N-1)], then, this second sequence was delivered to for second step proceed interleaving treatment.
Second step for (ARP, the Almost Regular Permutation) deinterleaving method that interweaves based on quasi-regular to information bit to interweaving, wherein π (j) the expression information bit by the back output that interweaves is to the position of information bit centering before interweaving, i.e. u
2(j)=u
1(π (j)).Concrete deinterleaving method is:
For j=0,1,2 ..., N-1
When j mod 4==0, π (j)=(P
0J+1) mod N
When j mod 4==1, π (j)=(P
0J+1+N/2+P
1) mod N
When j mod 4==2, π (j)=(P
0J+1+P
2) mod N
When j mod 4==3, π (j)=(P
0J+1+N/2+P
3) mod N
Wherein, P
0, P
1, P
2, P
3Be four parameters, be stored in transmitting-receiving two-end.The long C of ring of Shang Mian ARP deinterleaving method correspondence is at most 4 as can be seen.
This step obtains the 3rd sequence u
2=[u
1(π (0)), u
1(π (1)), u
1(π (2)) ..., u
1(π (N-1))], so far, finished interleaving treatment.Afterwards, with the 3rd sequence u
2Be input to the component coder 2 among Fig. 1 a.
Summary of the invention
The embodiment of the invention is to provide the method and the device of interweaving internal codes in a kind of communication system, to improve the wrong flat bed of CTC decoding performance, can provide parallel processing capability more flexibly for receiving terminal simultaneously.
The embodiment of the invention provides the method for interweaving internal codes in a kind of communication system, comprising:
First sequence is carried out bit internally interweave, second sequence after obtaining to interweave;
Adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave.
The embodiment of the invention also provides a kind of interweaving internal codes device, comprising:
The internal interleave unit of bit is used for that first sequence is carried out bit and internally interweaves, second sequence after obtaining to interweave;
The QPP interleave unit, be used to adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave.
The embodiment of the invention also provides a kind of CTC encoder, comprises
First component coder is used to receive first sequence as input information, the code word bits after the bit of described input information is encoded behind the output encoder;
The interweaving internal codes device is used for internally interweaving to carrying out bit as first sequence of input information, second sequence after obtaining to interweave; Adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave is delivered to the second component encoder with described the 3rd sequence;
The second component encoder, after being used for the bit of the 3rd sequence that receives encoded, the code word bits behind the output encoder.
The method and the device of interweaving internal codes in the communication system that the application embodiment of the invention provides, not only improved the wrong flat bed of CTC decoding performance, and owing to the multinomial (QPP that interweaves based on binomial, QuadraticPermutation Polynomial) deinterleaving method provides parallel processing capability more flexibly to receiving terminal.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 a is a CTC structural representation in the prior art;
Fig. 1 b is component convolutional codes coder structure figure in the prior art;
Fig. 2 is based on the flow chart of interweaving internal codes method in a kind of communication system of the embodiment of the invention;
Fig. 3 is based on the flow chart of interweaving internal codes method in the communication system of the embodiment of the invention one;
Fig. 4 is based on a kind of interweaving internal codes device structural representation of the embodiment of the invention;
Fig. 5 is based on the another kind of interweaving internal codes device structural representation of the embodiment of the invention.
Embodiment
The inventor finds prior art research back: since adopt the ARP interleaver to information bit to interweaving, thereby make weaving length reduce half, thereby will inevitably influence the performance of CTC.In order to improve the performance of CTC, to have introduced bit inside has been interweaved, the first step promptly of the prior art interweaves.Though added bit inside is interweaved, the emulation by under additive white Gaussian noise (AWGN, Additive WhiteGausssian Noise) channel finds, along with the increase of information bit purpose, the performance of CTC sign indicating number at Block Error Rate (BLER) from 10
-4To 10
-3Between decoding performance begin to occur wrong flat bed.
In existing standard, need to store four parameters under each information bit length, the P that relates to during promptly existing second step interweaves
0, P
1, P
2, and P
3As can be seen, with respect to QPP deinterleaving method transmitting-receiving two-end stored parameter f only
1And f
2Situation, higher based on the memory space of the interweaving internal codes device of ARP method, if on the basis of four parameters of storage,, increase by needs along with increasing information bit length number purpose, the storage overhead of transmitting-receiving two-end is bound to constantly increase; If further improve the CTC performance, the increase of the information bit length that increases along with needs also can constantly increase for the needed ring of ARP interleaver is long.The storage overhead of transmitting-receiving two-end is bound to increase more.
Simultaneously for parallel decoding processing aspect, must to satisfy be the long integral multiple of ring to the size of each parallel processing decoder in the component decoder.Therefore, the flexibility ratio of parallel decoding is not very high.
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
Referring to Fig. 2, the method that it is based on interweaving internal codes in a kind of communication system of the embodiment of the invention comprises:
Step 201 is carried out bit to first sequence and is internally interweaved, second sequence after obtaining to interweave; Describedly first sequence carried out the mode that bit internally interweaves comprise: to all information bits of first sequence to carrying out the exchange sequence operation, perhaps, to the partial information bit of first sequence to carrying out the exchange sequence operation.
Step 202, adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave.
Use the present invention, not only improved the wrong flat bed of CTC decoding performance, and owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.
Elaborate below in conjunction with specific embodiment.
Embodiment one:
Referring to Fig. 3, it is according to the flow chart of interweaving internal codes method in the communication system of the embodiment of the invention one, specifically comprises:
First sequence is: u
0=[(A
0, B
0), (A
1, B
1), (A
2, B
2), (A
3, B
3) ..., (A
N-1, B
N-1)]; This first sequence u
0Be the list entries of component coder 1 among Fig. 1 a, wherein, the information bit that N represents to import is to number.So-called all information bits to first sequence are meant the operation of carrying out exchange sequence: exchange all information bit centering A
iAnd B
iOrder, and then the second sequence u after obtaining to interweave
1
Described all information bits to first sequence to the operation of carrying out exchange sequence after, the second sequence u after the interweaving of acquisition
1For:
u
1=[(B
0, A
0), (B
1, A
1), (B
2, A
2), (B
3, A
3) ..., (B
N-1, A
N-1)]=[u
1(0), u
1(1), u
1(2), u
1(3) ..., u
1(N-1)] wherein, the information bit of input is to being (A
i, B
i), i=0,1,2 ..., the information bit that N-1, N represent to import is to number.
The QPP deinterleaving method is shown below:
π (x)=(f
1X+f
2X
2) mod N, x=0,1,2 ..., N-1, x are the sequence label,
Wherein, the information bit that N represents to import is to number, and the information bit that π (x) expression is afterwards exported by interweaving is to the position of information bit centering before interweaving, parameter f
1And f
2Should satisfy certain condition; Described certain condition comprises, when N is 4 multiple, and f
1Can not be divided exactly f by all prime factors of N
2Can be divided exactly by all prime factors of N; f
1And f
2Be integer;
The 3rd sequence u that obtains after to second series processing through following formula
2For:
u
2＝[u
1(π(0))，u
1(π(1))，u
1(π(2))，...，u
1(π(N-1))]。
So far, finished the interweaving internal codes processing.Afterwards, with the 3rd sequence u
2Be input to the component coder 2 among Fig. 1 a.
Use the embodiment of the invention one, reduced the wrong flat bed of CTC decoding performance, owing to adopt the QPP deinterleaving method only to need transmitting-receiving two-end storage two parameters, i.e. f
1And f
2, can save the storage overhead of transmitting-receiving two-end.Simultaneously, can divide exactly the numerical value of QPP interleaver weaving length arbitrarily, can be as the parallel processing degree, so receiver can support parallel decoding to handle neatly.As seen, owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.
Embodiment two:
Present embodiment is on the basis of embodiment one, is step 301 adjustment to the first step of ISN deinterleaving method, promptly is revised as partial information bit to first sequence to carrying out the exchange sequence operation.
So-called partial information bit to first sequence can comprise in the following dual mode any one to the operation of carrying out exchange sequence:
Mode one: to the input information bit to (A
i, B
i) subscript i satisfy the bit of i mod 2==1 to exchanging A
iAnd B
iThe operation of order;
Concrete, the information bit of described first sequence is to (A
i, B
i) subscript i satisfy the bit of i mod 2==1 to exchanging A
iAnd B
iThe operation of order after, the second sequence u after the interweaving of acquisition
1For:
u
1＝[(A
0，B
0)，(B
1，A
1)，(A
2，B
2)，(B
3，A
3)，...，(B
N-1?,A
N-1)]＝[u
1(0)，u
1(1)，u
1(2)，u
1(3)，...，u
1(N-1)]
Wherein, above-mentioned i=0,1,2 ..., the information bit that N-1, N represent to import is to number.
Mode two: to the input information bit to (A
i, B
i) subscript i satisfy the bit of i mod 2==0 to exchanging A
iAnd B
iThe operation of order;
Concrete, the information bit of first sequence is to (A
i, B
i) subscript i satisfy the bit of i mod 2==0 to exchanging A
iAnd B
iThe operation of order after, the second sequence u after the interweaving of acquisition
1For:
u
1＝[(B
0，A
0)，(A
1，B
1)，(B
2，A
2)，(A
3，B
3)，...，(A
N-1，B
N-1)]＝[u
1(0)，u
1(1)，u
1(2)，u
1(3)，...，u
1(N-1)]。
Wherein, above-mentioned i=0,1,2 ..., the information bit that N-1, N represent to import is to number.
All the other steps are identical with embodiment one, repeat no more.
Use the embodiment of the invention two, reduced the wrong flat bed of CTC decoding performance, owing to adopt the QPP deinterleaving method only to need transmitting-receiving two-end storage two parameters, i.e. f
1And f
2, can save the storage overhead of transmitting-receiving two-end.Simultaneously, can divide exactly the numerical value of QPP interleaver weaving length arbitrarily, can be as the parallel processing degree, so receiver can support parallel decoding to handle neatly.As seen, owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.In addition, present embodiment is changed littler to prior art, realizes simpler, convenient.
Embodiment three:
Present embodiment is on embodiment one and two basis, and it is that step 302 is improved that second of ISN deinterleaving method is gone on foot.
In the present embodiment, N is 4 multiple.When using the QPP interleaver, the information bit of even number position is by being mapped to the even number position after interweaving, and the information bit of odd positions is by being mapped to odd positions after interweaving.In order to utilize these characteristics, present embodiment has proposed interleaving scheme in another, only second step of embodiment one is improved.Concrete, adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the step of the 3rd sequence after obtaining to interweave comprises:
The QPP deinterleaving method is shown in following two formulas:
π
1(x)＝(f
11·x+f
21·x
2)mod?N，x＝0，2，4，…，N-2
π
2(x)＝(f
12·x+f
22·x
2)mod?N，x＝1，3，5，…，N-1
Wherein, x is the sequence label, coefficient f
11And f
12Can not be divided exactly f by all prime factors of N
21And f
22Can be divided exactly f by all prime factors of N
11, f
12, f
21And f
22Be integer;
The 3rd sequence u that obtains after to second series processing through above-mentioned two formulas
2For:
u
2＝[u
1(π(0))，u
1(π(1))，u
1(π(2))，...，u
1(π(N-1))]。
All the other steps are identical with embodiment one, two, repeat no more.
Use the embodiment of the invention three, reduced the wrong flat bed of CTC decoding performance.Simultaneously, can divide exactly the numerical value of QPP interleaver weaving length arbitrarily, can be as the parallel processing degree, so receiver can support parallel decoding to handle neatly.As seen, owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.In addition, present embodiment can be changed littler to prior art, realizes simpler, convenient.
Embodiment four:
Present embodiment is on the basis of embodiment one, only keeps a step interleaving treatment, the employing QPP deinterleaving method that promptly keeps step 302 to the bit of first sequence to interweaving, the 3rd sequence after obtaining to interweave.Concrete interleaving process is as follows:
First sequence is: u
0=[(A
0, B
0), (A
1, B
1), (A
2, B
2), (A
3, B
3) ..., (A
N-1, B
N-1)]; This first sequence u
0Be the list entries of component coder 1 among Fig. 1 a, wherein, the information bit that N represents to import is to number.
Adopt the QPP deinterleaving method to the bit of described first sequence to interweaving, the 3rd sequence after obtaining to interweave.Wherein,
The QPP deinterleaving method is shown below:
π (x)=(f
1X+f
2X
2) mod N, x=0,1,2 ..., N-1, x are the sequence label,
Wherein, the information bit that N represents to import is to number, and the information bit that π (x) expression is afterwards exported by interweaving is to the position of information bit centering before interweaving, parameter f
1And f
2Should satisfy certain condition; Described certain condition comprises, when N is 4 multiple, and f
1Can not be divided exactly f by all prime factors of N
2Can be divided exactly f by all prime factors of N
1And f
2Be integer;
The 3rd sequence u that obtains after to first series processing through following formula
2For:
u
2＝[u
0(π(0))，u
0(π(1))，u
0(π(2))，...，u
0(π(N-1))]。
So far, finished the interweaving internal codes processing.Afterwards, with the 3rd sequence u
2Be input to the component coder 2 among Fig. 1 a.
Use the embodiment of the invention four, reduced the wrong flat bed of CTC decoding performance.Owing to adopt the QPP deinterleaving method only to need transmitting-receiving two-end storage two parameters, i.e. f
1And f
2, can save the storage overhead of transmitting-receiving two-end.Simultaneously, can divide exactly the numerical value of QPP interleaver weaving length arbitrarily, can be as the parallel processing degree, so receiver can support parallel decoding to handle neatly.As seen, owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.
Embodiment five:
Embodiments of the invention five are on the basis of embodiment four, wherein N is 4 multiple, considered the characteristics of QPP interleaver, promptly the information bit of even number position is by being mapped to the even number position after interweaving, and the information bit of odd positions is by being mapped to odd positions after interweaving.Only adopt a step interleaving process, it is that step 302 is improved that second of ISN deinterleaving method is gone on foot.
First sequence is: u
0=[(A
0, B
0), (A
1, B
1), (A
2, B
2), (A
3, B
3) ..., (A
N-1, B
N-1)]; This first sequence u
0Be the list entries of component coder 1 among Fig. 1 a, wherein, the information bit that N represents to import is to number.
Adopt the QPP deinterleaving method to the bit of described first sequence to interweaving, the 3rd sequence after obtaining to interweave.Wherein,
The QPP deinterleaving method is shown in following two formulas:
π
1(x)＝(f
11·x+f
21·x
2)mod?N，x＝0，2，4，…，N-2
π
2(x)＝(f
12·x+f
22·x
2)mod?N，x＝1，3，5，…，N-1
Wherein, x is the sequence label, coefficient f
11And f
12Can not be divided exactly f by all prime factors of N
21And f
22Can be divided exactly f by all prime factors of N
11, f
12, f
21And f
22Be integer;
The 3rd sequence that obtains after to first series processing through above-mentioned two formulas is u
2:
u
2＝[u
0(π(0))，u
0(π(1))，u
0(π(2))，...，u
0(π(N-1))]。
So far, finished the interweaving internal codes processing.Afterwards, with the 3rd sequence u
2Be input to the component coder 2 among Fig. 1 a.
Use the embodiment of the invention five, reduced the wrong flat bed of CTC decoding performance.Simultaneously, can divide exactly the numerical value of QPP interleaver weaving length arbitrarily, can be as the parallel processing degree, so receiver can support parallel decoding to handle neatly.As seen, owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.
Embodiment six:
Referring to Fig. 4, it is based on a kind of interweaving internal codes device structural representation of the embodiment of the invention, and this interweaving internal codes device is applied to the embodiment of the invention one to three, and described interweaving internal codes device comprises: internal interleave unit 401 of bit and QPP interleave unit 402, wherein,
The internal interleave unit 401 of bit is used for that first sequence is carried out bit and internally interweaves, second sequence after obtaining to interweave;
QPP interleave unit 402, be used to adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave.
The internal interleave unit 401 of above-mentioned bit can comprise: internal interleave unit of first bit or the internal interleave unit of second bit (figure does not show), wherein,
The internal interleave unit of first bit is used for all information bits of first sequence are operated carrying out exchange sequence; Perhaps,
The internal interleave unit of second bit is used for the partial information bit of first sequence is operated carrying out exchange sequence.
Above-mentioned QPP interleave unit 402 can comprise: a QPP interleave unit or the 2nd QPP interleave unit (figure does not show), wherein,
The one QPP interleave unit is used to adopt π (x)=(f
1X+f
2X
2) mod N, x=0,1,2 ..., N-1, to the 3rd sequence that obtains after second series processing, wherein, the information bit that N represents to import is to number, and the information bit that π (x) expression is afterwards exported by interweaving is to the position of information bit centering before interweaving, parameter f
1And f
2Should satisfy certain condition; Described certain condition comprises, when N is 4 multiple, and f
1Can not be divided exactly f by all prime factors of N
2Can be divided exactly f by all prime factors of N
1And f
2Be integer; Perhaps,
The 2nd QPP interleave unit, N is 4 multiple, is used for adopting
π
1(x)＝(f
11·x+f
21·x
2)mod?N，x＝0，2，4，…，N-2
π
2(x)＝(f
12·x+f
22·x
2)mod?N，x＝1，3，5，…，N-1
To the 3rd sequence that obtains after second series processing,
Coefficient f wherein
11And f
12Can not be divided exactly f by all prime factors of N
21And f
22Can be divided exactly f by all prime factors of N
11, f
12, f
21And f
22Be integer.
Embodiment seven:
The embodiment of the invention also provides a kind of CTC encoder, and its structure can comprise referring to Fig. 1 a: first component coder, interweaving internal codes device and second component encoder, wherein,
First component coder is used to receive first sequence as input information, the code word bits after the bit of described input information is encoded behind the output encoder;
The interweaving internal codes device is used for internally interweaving to carrying out bit as first sequence of input information, second sequence after obtaining to interweave; Adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave is delivered to the second component encoder with described the 3rd sequence;
The second component encoder, after being used for the bit of the 3rd sequence that receives encoded, the code word bits behind the output encoder.
The difference of CTC encoder that embodiment seven is provided and existing C TC encoder is, what embodiment seven provided that the interweaving internal codes device in the CTC encoder adopts is the interweaving internal codes device that embodiment six is provided.
Embodiment eight:
Referring to Fig. 5, it is based on the another kind of interweaving internal codes device structural representation of the embodiment of the invention, and this interweaving internal codes device is applied to the embodiment of the invention four and five, and described interweaving internal codes device comprises:
QPP interleave unit 501, be used to adopt the QPP deinterleaving method to the bit of first sequence to interweaving, the 3rd sequence after obtaining to interweave.
Described QPP interleave unit 501 can comprise: a QPP interleave unit 5011 or the 2nd QPP interleave unit 5012, wherein,
The one QPP interleave unit 5011 is used to adopt π (x)=(f
1X+f
2X
2) mod N, x=0,1,2 ..., N-1, to the 3rd sequence that obtains after first series processing, wherein, the information bit that N represents to import is to number, and the information bit that π (x) expression is afterwards exported by interweaving is to the position of information bit centering before interweaving, parameter f
1And f
2Should satisfy certain condition; Described certain condition comprises, when N is 4 multiple, and f
1Can not be divided exactly f by all prime factors of N
2Can be divided exactly f by all prime factors of N
1And f
2Be integer;
The 2nd QPP interleave unit 5012, N is 4 multiple, is used for adopting
π
1(x)＝(f
11·x+f
21·x
2)mod?N，x＝0，2，4，…，N-2
π
2(x)＝(f
12·x+f
22·x
2)mod?N，x＝1，3，5，…，N-1
To the 3rd sequence that obtains after first series processing,
Coefficient f wherein
11And f
12Can not be divided exactly f by all prime factors of N
21And f
22Can be divided exactly f by all prime factors of N
11, f
12, f
21And f
22Be integer.
Embodiment nine:
The embodiment of the invention also provides a kind of CTC encoder, and its structure can comprise referring to Fig. 1 a: first component coder, interweaving internal codes device and second component encoder, wherein,
First component coder is used to receive first sequence as input information, the code word bits after the bit of described input information is encoded behind the output encoder;
The interweaving internal codes device is used for adopting the QPP deinterleaving method to interweave to first sequence as input information, and the 3rd sequence after obtaining to interweave is delivered to the second component encoder with described the 3rd sequence;
The second component encoder, after being used for the bit of the 3rd sequence that receives encoded, the code word bits behind the output encoder.
The difference of CTC encoder that embodiment nine is provided and existing C TC encoder is, what embodiment nine provided that the interweaving internal codes device in the CTC encoder adopts is the interweaving internal codes device that embodiment eight is provided.
To sum up, use the method and the device of interweaving internal codes in the communication system that the embodiment of the invention provides, reduced the wrong flat bed of CTC decoding performance.Owing to adopt the QPP deinterleaving method only to need transmitting-receiving two-end storage two parameters, i.e. f
1And f
2, can save the storage overhead of transmitting-receiving two-end.Simultaneously, can divide exactly the numerical value of QPP interleaver weaving length arbitrarily, can be as the parallel processing degree, so receiver can support parallel decoding to handle neatly.As seen, owing to, provide parallel processing capability more flexibly to receiving terminal based on the QPP deinterleaving method.
One of ordinary skill in the art will appreciate that all or part of step that realizes in the said method execution mode is to instruct relevant hardware to finish by program, described program can be stored in the computer read/write memory medium, here the alleged storage medium that gets, as: ROM/RAM, magnetic disc, CD etc.
The above is preferred embodiment of the present invention only, is not to be used to limit protection scope of the present invention.All any modifications of being done within the spirit and principles in the present invention, be equal to replacement, improvement etc., all be included in protection scope of the present invention.
Claims (12)
1. the method for interweaving internal codes in the communication system is characterized in that, comprising:
First sequence is carried out bit internally interweave, second sequence after obtaining to interweave;
Adopt binomial interweave multinomial QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave.
2. method according to claim 1 is characterized in that, describedly first sequence is carried out the mode that bit internally interweaves comprises: to all information bits of first sequence to carrying out the exchange sequence operation.
3. method according to claim 2 is characterized in that,
Described first sequence is: u
0=[(A
0, B
0), (A
1, B
1), (A
2, B
2), (A
3, B
3) ..., (A
N-1, B
N-1)];
Described all information bits to first sequence to the operation of carrying out exchange sequence after, second sequence after the interweaving of acquisition is:
u
1＝[(B
0，A
0)，(B
1，A
1)，(B
2，A
2)，(B
3，A
3)，...，(B
N-1，A
N-1)]＝[u
1(0)，u
1(1)，u
1(2)，u
1(3)，...，u
1(N-1)]
Wherein, the information bit of input is to being (A
i, B
i), i=0,1,2 ..., the information bit that N-1, N represent to import is to number.
4. method according to claim 1 is characterized in that, describedly first sequence is carried out the mode that bit internally interweaves comprises: to the partial information bit of first sequence to carrying out the exchange sequence operation.
5. method according to claim 4 is characterized in that, described partial information bit to first sequence comprises carrying out the exchange sequence operation:
To the input information bit to (A
i, B
i) subscript i satisfy the bit of i mod 2==1 to exchanging A
iAnd B
iThe operation of order, perhaps,
To the input information bit to (A
i, B
i) subscript i satisfy the bit of i mod 2==0 to exchanging A
iAnd B
iThe operation of order;
Wherein, above-mentioned i=0,1,2 ..., the information bit that N-1, N represent to import is to number.
6. method according to claim 5 is characterized in that,
Described first sequence is: u
0=[(A
0, B
0), (A
1, B
1), (A
2, B
2), (A
3, B
3) ..., (A
N-1, B
N-1)];
The information bit of described first sequence is to (A
i, B
i) subscript i satisfy the bit of i mod 2==1 to exchanging A
iAnd B
iThe operation of order after, second sequence after the interweaving of acquisition is:
u
1＝[(A
0，B
0)，(B
1，A
1)，(A
2，B
2)，(B
3，A
3)，...，(B
N-1，A
N-1)]＝[u
1(0)，u
1(1)，u
1(2)，u
1(3)，...，u
1(N-1)]；
The information bit of described first sequence is to (A
i, B
i) subscript i satisfy the bit of i mod 2==0 to exchanging A
iAnd B
iThe operation of order after, second sequence after the interweaving of acquisition is:
u
1＝[(B
0，A
0)，(A
1，B
1)，(B
2，A
2)，(A
3，B
3)，...，(A
N-1，B
N-1)]＝[u
1(0)，u
1(1)，u
1(2)，u
1(3)，...，u
1(N-1)]。
7. method according to claim 1 is characterized in that, to interweaving, the step of the 3rd sequence after obtaining to interweave comprises described employing QPP deinterleaving method to the bit of described second sequence:
The QPP deinterleaving method is shown below:
π (x)=(f
1X+f
2X
2) mod N, x=0,1,2 ..., N-1, x are the sequence label,
Wherein, the information bit that N represents to import is to number, and the information bit that π (x) expression is afterwards exported by interweaving is to the position of information bit centering before interweaving, parameter f
1And f
2Satisfy: when N is 4 multiple, f
1Can not be divided exactly f by all prime factors of N
2Can be divided exactly by all prime factors of N; f
1And f
2Be integer;
The 3rd sequence that obtains after to second series processing through following formula is:
u
2＝[u
1(π(0))，u
1(π(1))，u
1(π(2))，...，u
1(π(N-1))]。
8. method according to claim 1 is characterized in that, to interweaving, the step of the 3rd sequence after obtaining to interweave comprises described employing QPP deinterleaving method to the bit of described second sequence:
The QPP deinterleaving method is shown in following two formulas, and wherein N is 4 multiple:
π
1(x)＝(f
11·x+f
21·x
2)modN，x＝0，2，4，…，N-2
π
2(x)＝(f
12·x+f
22·x
2)modN，x＝1，3，5，…，N-1，
Coefficient f wherein
11And f
12Can not be divided exactly f by all prime factors of N
21And f
22Can be divided exactly f by all prime factors of N
11, f
12, f
21And f
22Be integer, x is the sequence label;
The 3rd sequence that obtains after to second series processing through above-mentioned two formulas is:
u
2＝[u
1(π(0))，u
1(π(1))，u
1(π(2))，...，u
1(π(N-1))]。
9. an interweaving internal codes device is characterized in that, comprising:
The internal interleave unit of bit is used for that first sequence is carried out bit and internally interweaves, second sequence after obtaining to interweave;
The binomial multinomial QPP interleave unit that interweaves, be used to adopt the QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave.
10. interweaving internal codes device according to claim 9 is characterized in that, the internal interleave unit of described bit comprises:
The internal interleave unit of first bit is used for all information bits of first sequence are operated carrying out exchange sequence; Perhaps,
The internal interleave unit of second bit is used for the partial information bit of first sequence is operated carrying out exchange sequence.
11. interweaving internal codes device according to claim 9 is characterized in that, described QPP interleave unit comprises:
The one QPP interleave unit is used to adopt π (x)=(f
1X+f
2X
2) mod N, x=0,1,2,, N-1 is to the 3rd sequence that obtains after second series processing, wherein, the information bit that N represents to import is to number, and x is the sequence label, and the information bit that π (x) expression is afterwards exported by interweaving is to the position of information bit centering before interweaving, parameter f
1And f
2Satisfy: when N is 4 multiple, f
1Can not be divided exactly f by all prime factors of N
2Can be divided exactly by all prime factors of N; f
1And f
2Be integer;
Perhaps,
The 2nd QPP interleave unit, wherein N is 4 multiple, is used for adopting
π
1(x)＝(f
11·x+f
21·x
2)mod?N，x＝0，2，4，…，N-2
π
2(x)＝(f
12·x+f
22·x
2)mod?N，x＝1，3，5，…，N-1
To the 3rd sequence that obtains after second series processing,
Coefficient f wherein
11And f
12Can not be divided exactly f by all prime factors of N
21And f
22Can be divided exactly f by all prime factors of N
11, f
12, f
21And f
22Be integer, x is the sequence label.
12. a convolution turbo sign indicating number CTC encoder is characterized in that, comprises
First component coder is used to receive first sequence as input information, the code word bits after the bit of described input information is encoded behind the output encoder;
The interweaving internal codes device is used for internally interweaving to carrying out bit as first sequence of input information, second sequence after obtaining to interweave; Adopt binomial interweave multinomial QPP deinterleaving method to the bit of described second sequence to interweaving, the 3rd sequence after obtaining to interweave is delivered to the second component encoder with described the 3rd sequence;
The second component encoder, after being used for the bit of the 3rd sequence that receives encoded, the code word bits behind the output encoder.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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