CN101740387B - Process for manufacturing surface channel PMOS device with polycide - Google Patents
Process for manufacturing surface channel PMOS device with polycide Download PDFInfo
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- CN101740387B CN101740387B CN2008100440186A CN200810044018A CN101740387B CN 101740387 B CN101740387 B CN 101740387B CN 2008100440186 A CN2008100440186 A CN 2008100440186A CN 200810044018 A CN200810044018 A CN 200810044018A CN 101740387 B CN101740387 B CN 101740387B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 238000000034 method Methods 0.000 title claims abstract description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 43
- 229920005591 polysilicon Polymers 0.000 claims abstract description 43
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 35
- 239000010703 silicon Substances 0.000 claims abstract description 35
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 32
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 29
- 239000012535 impurity Substances 0.000 claims abstract description 22
- 238000005530 etching Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 239000013078 crystal Substances 0.000 claims description 26
- 238000005516 engineering process Methods 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 16
- 229910044991 metal oxide Inorganic materials 0.000 claims description 13
- 150000004706 metal oxides Chemical class 0.000 claims description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052796 boron Inorganic materials 0.000 claims description 10
- 238000004151 rapid thermal annealing Methods 0.000 claims description 5
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 238000002513 implantation Methods 0.000 claims description 4
- 238000002955 isolation Methods 0.000 claims description 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 229910052760 oxygen Inorganic materials 0.000 claims description 3
- 239000001301 oxygen Substances 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 238000002347 injection Methods 0.000 claims 2
- 239000007924 injection Substances 0.000 claims 2
- 238000005468 ion implantation Methods 0.000 abstract description 3
- 102000004129 N-Type Calcium Channels Human genes 0.000 abstract 3
- 108090000699 N-Type Calcium Channels Proteins 0.000 abstract 3
- 238000000151 deposition Methods 0.000 abstract 3
- 108091006146 Channels Proteins 0.000 abstract 2
- 230000005611 electricity Effects 0.000 abstract 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 6
- 239000003870 refractory metal Substances 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 2
- 230000035515 penetration Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910008484 TiSi Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
The invention discloses a process for manufacturing a surface channel PMOS device with polycide, which comprises the following steps of: 1, doping an N-type impurity on a P-type silicon substrate to form an N-type channel; 2, depositing a layer of oxidized silicon nitride on the surface of a silicon wafer; 3, depositing a layer of polysilicon on the surface of the silicon wafer and doping a P-type impurity in a gate region of the layer of polysilicon to form P-type polysilicon; 4, forming the polycide on the surface of the silicon wafer; 5, etching the polycide, the P-type polysilicon and the oxidized silicon nitride except for the polycide, the P-type polysilicon and the oxidized silicon nitride outside the gate region until the N-type channel is exposed; 6, depositing a layer of silicon nitride on the surface of the silicon wafer and etching the layer of silicon nitride until the N-type channel is exposed and part of silicon nitride side wall is reserved on the side wall of the P-type polysilicon; and 7, performing ion implantation of the P-type impurity on the silicon wafer to form a source region and a drain region of the PMOS device. The surface channel PMOS device manufactured by the invention can realize low leakage of electricity under a lower threshold voltage.
Description
Technical field
The present invention relates to a kind of manufacture craft of semiconductor device, particularly relate to a kind of manufacture craft of PMOS device.
Background technology
0.35 in the semiconductor integrated circuit of μ m and above size, adopt multi-crystal silicification thing (polycide) to cover on the polysilicon gate of MOS device usually.The multi-crystal silicification thing is that refractory metal and polysilicon reaction form, and refractory metal comprises cobalt, molybdenum, platinum, tantalum, titanium, tungsten etc.The multi-crystal silicification thing can reduce the silica that remains in silicon face in forming process, thereby reduces the contact resistance of polysilicon gate.
The multi-crystal silicification thing covers on the polysilicon gate, and its fine and close characteristic makes leaks when injecting in the source of MOS device, and ion can't be injected into polysilicon gate.Like this to the doping of polysilicon gate can only carry out when the deposit polysilicon doping on the throne or etc. inject behind the intact polysilicon of deposit comprehensively.Usually the grid of nmos device and PMOS device all are N type silicon, for taking into account nmos device, and doping on the throne or what inject can only be N type impurity comprehensively.When making the PMOS device, in order to satisfy the requirement of PMOS threshold voltage, PMOS can only make buried channel (buried channel) device, i.e. doping one deck P type buried channel in N type raceway groove like this.The shortcoming of buried channel device maximum is to have higher threshold voltage can have lower leakage current.Present semiconductor integrated circuit technique requires the PMOS device must have low threshold voltage and low-leakage current simultaneously, so the buried channel device must be substituted by the surface channel device.
Summary of the invention
Technical problem to be solved by this invention provides a kind of surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing.
For solving the problems of the technologies described above, the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft that the present invention has the multi-crystal silicification thing comprises the steps:
In the 1st step, doped N-type impurity on P type silicon substrate 1 forms N type raceway groove 2;
The 2nd step is at silicon chip surface deposit one deck oxidized silicon nitride 3;
The 3rd step, at silicon chip surface deposit one deck polysilicon, inject p type impurity with ion implantation technology at this layer polysilicon, form P type polysilicon 4;
In the 4th step, form multi-crystal silicification thing 5 at silicon chip surface;
In the 5th step, multi-crystal silicification thing 5, P type polysilicon 4 and the oxidized silicon nitride 3 of etching except that area of grid until exposing N type raceway groove 2, forms the P type polysilicon bar utmost point 41;
The 6th step at silicon chip surface deposit one deck silicon nitride 6, anti-carved this layer silicon nitride 6 until exposing N type raceway groove 2, stayed silicon nitride side wall 6 in grid 41 both sides;
In the 7th step, the ion that silicon chip is carried out p type impurity injects, and forms source electrode 71, the drain electrode 72 of PMOS device.
The surface P-channel metal oxide semiconductor (PMOS) device that the present invention is made is compared with buried channel PMOS device, has following advantage.At first, can satisfy the circuit needs of under low-voltage, working depress the low electric leakage of realization than low-threshold power.Secondly, though the PMOS device has the P type polysilicon bar, the covering by the multi-crystal silicification thing still can realize the interconnection of N type and two kinds of polysilicon gates of P type.Once more, single N type mixes and constitutes the PMOS raceway groove, and technology is simple.At last, improve the short-channel effect of PMOS device, can effectively reduce device size.
Description of drawings
The present invention is further detailed explanation below in conjunction with drawings and Examples:
Fig. 1 a～Fig. 1 g is respectively the silicon chip generalized section in～the 6 step of the 1st step of technology of the present invention.
Reference numeral is among the figure: 1-P type substrate; 2-N type raceway groove; The 3-oxidized silicon nitride; 4-P type polysilicon; The 41-grid; 5-multi-crystal silicification thing; 6-silicon nitride side wall; 71-source electrode, 72-drain electrode.
Embodiment
The present invention has the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft of multi-crystal silicification thing, has a step oxygen isolation, LOCOS to isolate or shallow-trench isolation (STI) technology before technology begins usually, is used for the active area on the silicon chip is isolated from each other.On this basis, the present invention also comprises the steps:
The 1st step saw also Fig. 1 a, and doped N-type impurity on P type silicon substrate 1 forms N type raceway groove 2.N type impurity commonly used comprises phosphorus, arsenic, antimony etc.Doping method can be that thermal diffusion or ion inject.
After forming N type raceway groove 2, can also carry out the threshold voltage adjustment and inject (not shown).Be exactly to inject N type or p type impurity, to change the impurity concentration of N type raceway groove 2 to N type raceway groove 2.Because the threshold voltage of MOS device is very responsive to the impurity concentration of channel region, therefore just can realize the MOS device threshold voltage is adjusted.
In the 2nd step, see also Fig. 1 b, at silicon chip surface deposit one deck oxidized silicon nitride (SiO
xN
y) 3, oxidized silicon nitride is exactly oxygen containing silicon nitride, in other words conj.or perhaps nitrogenous silica.For example, can requiring wherein among the present invention, the atomicity content of nitrogen is 0.5%～1.5%.
The 3rd step saw also Fig. 1 c, at silicon chip surface deposit one deck polysilicon 4, then to this layer polysilicon 4 doping p type impurities, formed P type polysilicon 4.P type impurity commonly used comprises boron etc.Doping method can be that thermal diffusion or ion inject.
For example, that the present invention can adopt is low-yield, the boron ion of middle dosage injects forming P type polysilicon, and the implantation dosage that requires the boron ion is less than 1 * 10
19Ions/cm
2(every square centimeter in ion) makes the outdiffusion of boron atom arrive the N type doping impurity of the concentration of N type raceway groove 2 much smaller than N type raceway groove 2, thereby keeps the stable of PMOS device property.Deposit is nitrogenous silica in the 2nd step, further reduces the penetration effect of boron atom.
Preferred boron ion implantation energy is 1keV～5keV, and implantation dosage is 5 * 10
14Cm
2～8 * 10
14Ions/cm
2
The 4th step saw also Fig. 1 d, and refractory metal is deposited on silicon chip surface, carried out rapid thermal annealing (RTA) then, formed multi-crystal silicification thing 5.For example, refractory metal can be selected titanium, and the multi-crystal silicification thing of formation is titanium/silicon (TiSi
2).
The 5th step saw also Fig. 1 e, resist coating on multi-crystal silicification thing 5, and photoresist only covers the area of grid of PMOS device behind the exposure imaging, and all the other zones all do not have photoresist to cover.Etch polysilicon thing 5, P type polysilicon 4 and oxidized silicon nitride 3 in the photoetching window that exposes, etching stopping when exposing N type raceway groove 2.This step has formed the P type polysilicon bar utmost point 41.
Then silicon chip is carried out rapid thermal oxidation (RTO) technology, realize reoxidizing of grid 41, promptly side and the surfaces of active regions at the P type polysilicon bar utmost point 41 forms oxide layer (not shown).Adopting rapid thermal oxidation process is to consider to reduce thermal process as far as possible, thereby reduces the outdiffusion of the p type impurity in the P type polysilicon bar utmost point 41.
The 6th step saw also Fig. 1 f, at silicon chip surface deposit one deck silicon nitride 6, anti-carved this layer silicon nitride 6 until exposing N type raceway groove 2.On the side wall of P type polysilicon 4, also remain with a part of silicon nitride side wall 6.Deposit can be adopted LPCVD technology, anti-carves and then uses anisotropic plasma etch technology.
The 7th step saw also Fig. 1 g, silicon chip is carried out p type impurity inject, and formed the source electrode 71 and the drain electrode 72 of PMOS device.Because stopping of multi-crystal silicification thing 5 and silicon nitride side wall 6, ion injects the only part of meeting outside the both sides of grid 41 silicon nitride side wall 6.Then silicon chip is carried out rapid thermal annealing (RTA) technology, this also is in order to reduce the outdiffusion of the p type impurity in the P type polysilicon bar utmost point 41 as far as possible.
In sum, the present invention carries out p type impurity to the PMOS polysilicon gate and injects in advance, forms the P type polysilicon bar; Adopt nitrogenous silica (oxidized silicon nitride) as gate oxide again, overcome the penetration effect of boron atom; Also reduce the thermal process of subsequent technique as far as possible, the outdiffusion of control boron atom.
Claims (8)
1. surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing, it is characterized in that: this technology comprises the steps:
The 1st step, go up doped N-type impurity at P type silicon substrate (1), form N type raceway groove (2);
The 2nd step is at silicon chip surface deposit one deck oxidized silicon nitride (3);
In the 3rd step, at silicon chip surface deposit one deck polysilicon, the ion that this layer polysilicon is carried out p type impurity injects, and forms P type polysilicon (4);
In the 4th step, form multi-crystal silicification thing (5) at silicon chip surface;
In the 5th step, multi-crystal silicification thing (5), P type polysilicon (4) and the oxidized silicon nitride (3) of etching except that area of grid until exposing N type raceway groove (2), forms the P type polysilicon bar utmost point (41);
The 6th step at silicon chip surface deposit one deck silicon nitride (6), anti-carved this layer silicon nitride (6) until exposing N type raceway groove (2), stayed silicon nitride side wall (6) in grid (41) both sides;
In the 7th step, the ion that silicon chip is carried out p type impurity injects, and forms the source electrode (71) and the drain electrode (72) of PMOS device.
2. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1 is characterized in that: described technology also comprised before the 1st step: adopt an oxygen isolation, LOCOS to isolate or shallow grooved-isolation technique, isolate the active area on the silicon chip.
3. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1 is characterized in that: in the 1st step of described technology, carry out threshold voltage again to N type raceway groove (2) and adjust the ion injection.
4. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1 is characterized in that: in the 2nd step of described technology, described oxidized silicon nitride (3) is nitrogenous silica, and wherein the atomicity content of nitrogen is 0.5%～1.5%.
5. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1 is characterized in that: in the 3rd step of described technology, polysilicon (4) is carried out the boron ion inject, implantation dosage is less than 1 * 10
19Ions/cm
2
6. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1 is characterized in that: in the 3rd step of described technology, polysilicon (4) is carried out the boron ion inject, the injection energy is 1keV～5keV, and implantation dosage is 5 * 10
14Ions/cm
2～8 * 10
14Ions/cm
2
7. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1, it is characterized in that: in the 5th step of described technology, after etching is finished silicon chip is carried out rapid thermal oxidation, in the side and the silicon chip surfaces of active regions formation oxide layer of the P type polysilicon bar utmost point (41).
8. the surface P-channel metal oxide semiconductor (PMOS) device manufacture craft with multi-crystal silicification thing according to claim 1 is characterized in that: in the 7th step of described technology, ion carries out rapid thermal annealing to silicon chip after injecting and finishing.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008100440186A CN101740387B (en) | 2008-11-27 | 2008-11-27 | Process for manufacturing surface channel PMOS device with polycide |
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|---|---|---|---|
| CN2008100440186A CN101740387B (en) | 2008-11-27 | 2008-11-27 | Process for manufacturing surface channel PMOS device with polycide |
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| CN101740387B true CN101740387B (en) | 2011-11-02 |
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| CN103094280B (en) * | 2011-11-04 | 2015-10-14 | 上海华虹宏力半导体制造有限公司 | There is surface channel cmos device and the manufacture method thereof of polycrystalline silicon |
| CN103035530B (en) * | 2012-06-08 | 2015-12-02 | 上海华虹宏力半导体制造有限公司 | The manufacture method of nmos switch device |
| CN105097450B (en) | 2015-06-23 | 2019-11-01 | 京东方科技集团股份有限公司 | Polysilicon membrane and production method, TFT and production method, display panel |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140109 |
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