CN101739542A - Near field communication radio frequency interface integrated circuit - Google Patents
Near field communication radio frequency interface integrated circuit Download PDFInfo
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- CN101739542A CN101739542A CN200810226290A CN200810226290A CN101739542A CN 101739542 A CN101739542 A CN 101739542A CN 200810226290 A CN200810226290 A CN 200810226290A CN 200810226290 A CN200810226290 A CN 200810226290A CN 101739542 A CN101739542 A CN 101739542A
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Abstract
The invention provides a near field communication radio frequency interface integrated circuit and relates to the technical field of near field communication (NFC). The integrated circuit comprises a reader-writer transmission circuit, a RFID power circuit, a transmission/receive antenna and an antenna matching circuit, wherein the clock signal PCD_CLK having the same frequency as the carrier wave and the data signal PCD_TXD needed to be transmitted are connected to the input end of the reader-writer transmission circuit, and the output ends TXRFA and TXRFB of the reader-writer transmission circuit are connected to the input end of the antenna matching network; and the output end of the antenna matching network is connected with the VA end and the VB end of the transmission/receive antenna, the VA end and the VB end of the transmission/receive antenna are connected to the input end of the RFID power circuit, and the RFID power circuit outputs the internal electric source VDD_PICC. The has the advantages of effectively avoiding the mutual influences of the transmission circuit and the receive circuit and ensuring that the near field communication radio frequency interface integrated circuit can effectively work in both passive state and active state.
Description
Technical field
The present invention relates to near-field communication (Near Field Communication, NFC) technical field, particularly near field communication radio frequency interface integrated circuit.
Background technology
The near-field communication technology comes from RFID (radio-frequency (RF) identification) technology, is proposed by Sony, Philips and Nokia, and it makes two electronic equipments can directly carry out the communication of short distance.NFC equipment has three kinds of typical mode of operations: reader/writer mode, card simulation model and ad hoc mode.No matter be operated in which kind of pattern, for the radio-frequency interface circuit of NFC equipment, have only two states: send the active state (read write line state) in magnetic field and do not send out the passive states (RFID state) in magnetic field.In the prior art, since under the active state under the transmission in magnetic field and the passive states reception in magnetic field all be to realize by shared external antenna, therefore transtation mission circuit and receiving circuit exert an influence sometimes mutually, can't guarantee that radio-frequency interface circuit can both correctly effectively work under passive states and active state.
Summary of the invention
In order to solve above-mentioned problems of the prior art, the purpose of this invention is to provide a kind of near field communication radio frequency interface integrated circuit.It can effectively avoid influencing each other of transtation mission circuit and receiving circuit, and assurance near field communication radio frequency interface circuit can both effectively be worked under passive states and active state.
In order to reach the foregoing invention purpose, technical scheme of the present invention realizes as follows:
A kind of near field communication radio frequency interface integrated circuit, its design feature is that it comprises: the RFID power circuit, send/receive antenna and the antenna matching network that receive magnetic field at the read write line transtation mission circuit in active state transmission magnetic field, in passive states.Be connected to the input end that adopts the complementary read write line transtation mission circuit that sends of two-way with the clock signal PCD_CLK of carrier wave same frequency and the data-signal PCD_TXD that will send, the output terminal TXRFA of read write line transtation mission circuit and output terminal TXRFB are connected to the input end of the antenna matching network that adopts symmetrical structure and symcenter ground connection, the output terminal of antenna matching network links to each other with the VB end with the VA of send/receive antenna end, the VA end of send/receive antenna and VB end are connected to the input end of the RFID power circuit that uses a plurality of PMOS pipes, RFID power circuit output internal electric source VDD_PICC.
In said integrated circuit, described send/receive antenna is composed in series by two identical in structure inductance L A and inductance L B, the tie point ground connection of inductance L A and inductance L B.
In said integrated circuit, described read write line transtation mission circuit comprises a plurality of metal-oxide-semiconductors and resistance.Clock signal PCD_CLK links to each other and links to each other with the grid of PMOS pipe M16 with NMOS pipe M15 through phase inverter INV1 with the grid of NMOS pipe M12 and PMOS pipe M13 respectively, the drain electrode of the drain electrode of NMOS pipe M12 and PMOS pipe M13 links to each other and becomes output terminal TXRFA, and the drain electrode of the drain electrode of NMOS pipe M15 and PMOS pipe M16 links to each other and becomes output terminal TXRFB.Data-signal PCD_TXD links to each other with the grid of NMOS pipe M14 with NMOS pipe M11 respectively, the source electrode of NMOS pipe M12 links to each other with the drain electrode of NMOS pipe M11, the source electrode of NMOS pipe M15 links to each other with the drain electrode of NMOS pipe M14, the source ground of the source electrode of NMOS pipe M11 and NMOS pipe M14.Connect resistance R 1 between the source electrode of NMOS pipe M11 and the drain electrode, NMOS pipe M14 source electrode and drain electrode between connect resistance R 2.
In said integrated circuit, described antenna matching network comprises a plurality of electric capacity and inductance.The output terminal TXRFA of read write line transtation mission circuit is connected to the VA end of send/receive antenna successively through inductance L 1A, capacitor C 3A and capacitor C 1A, the output terminal TXRFB of read write line transtation mission circuit is connected to the VB end of send/receive antenna successively through inductance L 1B, capacitor C 3B and capacitor C 1B.The tie point of capacitor C 3A and capacitor C 1A is connected to the tie point of capacitor C 3B and capacitor C 1B, the tie point ground connection of capacitor C 2A and capacitor C 2B successively through capacitor C 2A and capacitor C 2B.
In said integrated circuit, in the described antenna matching network signal input part of inductance L 1A successively series capacitance C5A and capacitor C 5B be connected to the signal input part of inductance L 1B, the signal output part of inductance L 1A series capacitance C4A and capacitor C 4B successively is connected to the signal output part of inductance L 1B.The tie point ground connection of the tie point of capacitor C 5A and capacitor C 5B and capacitor C 4A and capacitor C 4B.
In said integrated circuit, described RFID power circuit comprises a plurality of PMOS pipes and a clamper module VR.The VB end of send/receive antenna connects the drain electrode of PMOS pipe M1, the drain electrode of PMOS pipe M2A and the grid of PMOS pipe M2B respectively, and the drain electrode of PMOS pipe M2A source electrode and PMOS pipe M2B links to each other.The VA end of send/receive antenna connects the drain electrode of PMOS pipe M3, the drain electrode of PMOS pipe M4A and the grid of PMOS pipe M4B respectively, and the drain electrode of PMOS pipe M4A source electrode and PMOS pipe M4B links to each other.The source electrode of the source electrode of the grid of the source electrode of the source electrode that the grid of PMOS pipe M2A, PMOS manage M2B, PMOS pipe M1 and grid, PMOS pipe M4A, PMOS pipe M4B and PMOS pipe M3 links to each other with grid and exports rectifier power source VREC.Rectifier power source VREC connects the drain electrode of PMOS pipe M5, the drain electrode of PMOS pipe M6A and the grid of PMOS pipe M6B respectively, and the drain electrode of PMOS pipe M6A source electrode and PMOS pipe M6B links to each other.The grid of signal PICC_SLEEP and PMOS pipe M5 links to each other, and the source electrode of the grid of PMOS pipe M6A, PMOS pipe M6B and the source electrode that PMOS manages M5 link to each other and export internal electric source VDD_PICC respectively and through clamper module VR ground connection.
The present invention is owing to adopted said structure, and under the cooperation of internal logic control circuit, when sending the active state in magnetic field, the RFID power circuit is in low power consumpting state, can the efficient of transtation mission circuit not impacted; And when receiving the passive states of external magnetic field, the read write line transtation mission circuit can not impact the RFID power circuit yet.The RFID power circuit adopts a plurality of PMOS pipe to realize, can not leak electricity when avoiding VA end and VB to bring out existing negative pressure.The present invention can effectively avoid influencing each other of transtation mission circuit and receiving circuit, and assurance near field communication radio frequency interface circuit can both effectively be worked under passive states and active state.
The present invention will be further described below in conjunction with the drawings and specific embodiments.
Description of drawings
Fig. 1 is a structural representation of the present invention;
Fig. 2 is the circuit diagram of read write line transtation mission circuit of the present invention;
Fig. 3 is the circuit diagram of antenna matching network of the present invention;
Fig. 4 is the circuit diagram of RFID power circuit of the present invention;
VA end when Fig. 5 works for active mode of the present invention and VB end simulation waveform figure;
VA end and VB end simulation waveform figure when Fig. 6 works for passive mode of the present invention.
Embodiment
Referring to Fig. 1 to Fig. 4, the present invention includes: the RFID power circuit, send/receive antenna and the antenna matching network that receive magnetic field at the read write line transtation mission circuit in active state transmission magnetic field, in passive states.The read write line transtation mission circuit comprises a plurality of metal-oxide-semiconductors and resistance.Clock signal PCD_CLK links to each other and links to each other with the grid of PMOS pipe M16 with NMOS pipe M15 through phase inverter INV1 with the grid of NMOS pipe M12 and PMOS pipe M13 respectively, the drain electrode of the drain electrode of NMOS pipe M12 and PMOS pipe M13 links to each other and becomes output terminal TXRFA, and the drain electrode of the drain electrode of NMOS pipe M15 and PMOS pipe M16 links to each other and becomes output terminal TXRFB.Data-signal PCD_TXD links to each other with the grid of NMOS pipe M14 with NMOS pipe M11 respectively, the source electrode of NMOS pipe M12 links to each other with the drain electrode of NMOS pipe M11, the source electrode of NMOS pipe M15 links to each other with the drain electrode of NMOS pipe M14, the source ground of the source electrode of NMOS pipe M11 and NMOS pipe M14.Connect resistance R 1 between the source electrode of NMOS pipe M11 and the drain electrode, NMOS pipe M14 source electrode and drain electrode between connect resistance R 2.Antenna matching network comprises a plurality of electric capacity and inductance.The output terminal TXRFA of read write line transtation mission circuit is connected to the VA end of send/receive antenna successively through inductance L 1A, capacitor C 3A and capacitor C 1A, the output terminal TXRFB of read write line transtation mission circuit is connected to the VB end of send/receive antenna successively through inductance L 1B, capacitor C 3B and capacitor C 1B.The tie point of capacitor C 3A and capacitor C 1A is connected to the tie point of capacitor C 3B and capacitor C 1B, the tie point ground connection of capacitor C 2A and capacitor C 2B successively through capacitor C 2A and capacitor C 2B.The signal input part of inductance L 1A series capacitance C5A and capacitor C 5B successively is connected to the signal input part of inductance L 1B, and the signal output part of inductance L 1A series capacitance C4A and capacitor C 4B successively is connected to the signal output part of inductance L 1B.The tie point ground connection of the tie point of capacitor C 5A and capacitor C 5B and capacitor C 4A and capacitor C 4B.The RFID power circuit comprises a plurality of PMOS pipes and clamper module VR.The VB end of send/receive antenna connects the drain electrode of PMOS pipe M1, the drain electrode of PMOS pipe M2A and the grid of PMOS pipe M2B respectively, and the drain electrode of PMOS pipe M2A source electrode and PMOS pipe M2B links to each other.The VA end of send/receive antenna connects the drain electrode of PMOS pipe M3, the drain electrode of PMOS pipe M4A and the grid of PMOS pipe M4B respectively, and the drain electrode of PMOS pipe M4A source electrode and PMOS pipe M4B links to each other.The source electrode of the source electrode of the grid of the source electrode of the source electrode that the grid of PMOS pipe M2A, PMOS manage M2B, PMOS pipe M1 and grid, PMOS pipe M4A, PMOS pipe M4B and PMOS pipe M3 links to each other with grid and exports rectifier power source VREC.Rectifier power source VREC connects the drain electrode of PMOS pipe M5, the drain electrode of PMOS pipe M6A and the grid of PMOS pipe M6B respectively, and the drain electrode of PMOS pipe M6A source electrode and PMOS pipe M6B links to each other.The grid of signal PICC_SLEEP and PMOS pipe M5 links to each other, and the source electrode of the grid of PMOS pipe M6A, PMOS pipe M6B and the source electrode that PMOS manages M5 link to each other and export internal electric source VDD_PICC respectively and through clamper module VR ground connection.Send/receive antenna is composed in series by two identical in structure inductance L A and inductance L B, the tie point ground connection of inductance L A and inductance L B.
NMOS pipe M12 and PMOS pipe M13 and NMOS pipe M15 and PMOS pipe M16 form the carrier transmit part that two phase inverters constitute two branch roads respectively in the read write line, input end signal phase differential 180 degree of two phase inverters.The data-signal PCD_TXD that read write line will send controls the grid of NMOS pipe M11 and the grid of NMOS pipe M14, realizes sending the amplitude modulation(PAM) in magnetic field, the size of resistance R 1 and resistance R 2 decision amplitude modulation(PAM)s.According to actual conditions, resistance R 1 and resistance R 2 can adopt external device to realize, also can realize with inner integrated resistor, and the magnetic field modulation amplitude by the resistance in series realization is generally about 10% like this.In fact, by the device parameters of control carrier transmit part, can at an easy rate realize also that with form in parallel magnetic field amplitude about 10% modulates.100% magnetic field amplitude modulation realizes by turn-offing clock signal PCD_CLK.In the RFID power circuit, PMOS pipe M1, PMOS pipe M2A and PMOS pipe M2B and PMOS pipe M3, PMOS pipe M4A and PMOS pipe M4B have constituted two one-way circuit structures respectively, the rectifier power source VREC that obtains exporting.PMOS pipe M5 in the RFID power circuit is an analog switch, its break-make is controlled by signal PICC_SLEEP, PMOS pipe M6A and PMOS pipe M6B are used for guaranteeing that the substrate of PMOS pipe M5 can both be connected to noble potential one end in various application, clamper module VR in order to the internal electric source VDD_PICC voltage that guarantees output in range of safety operation.
When the present invention worked, when being in the active state that sends magnetic field, read write line transtation mission circuit operate as normal was also held carrier wave by VA end and the VB that antenna matching network sends to send/receive antenna, sent with the form in magnetic field.At this moment, the signal PICC_SLEEP output high level in the RFID power circuit, analog switch metal-oxide-semiconductor M5 turn-offs, and has cut off the connection between rectifier power source VREC and the internal electric source VDD_PICC.Therefore, M2A and PMOS pipe M2B and PMOS manage M3, PMOS pipe M4A and PMOS pipe M4B is still in running order though two one-way circuit structure PMOS pipes M1, PMOS manage, but do not have current drain on the rectifier power source VREC, can not impact the output power of transtation mission circuit.At this moment, the simulation waveform of external antenna VA end and VB end as shown in Figure 5.As seen from Figure 5, the waveform of VA end and the VB end sine wave that all is near the mark because there are the phase differential of 180 degree in the carrier frequency input end in the transtation mission circuit, also has 180 phase differential of spending so VA end and VB hold.Because two one-way circuit structures in the RFID power circuit all adopt the PMOS pipe to realize, so the negative pressure of VA end and VB end can not cause extra leakage current.
When the present invention was in the passive states of not sending out magnetic field, the read write line transtation mission circuit turn-offed, and its output terminal TXRFA and output terminal TXRFB are in high-impedance state.Owing to be in reasonable resonant condition between the VA of send/receive antenna end and the VB end, the RFID power circuit obtains dc rectification power VREC by the magnetic field and the rectification of external antenna coupling external reader, signal PICC_SLEEP output low level, analog switch metal-oxide-semiconductor M5 conducting, internal electric source VDD_PICC obtains DC level, and the internal components of RFID power circuit is in normal duty.The simulation waveform of the VA of send/receive antenna end and VB end as shown in Figure 6 at this moment.The phase place of VA end and VB end still differs 180 degree, because the neutral earthing of send/receive antenna, therefore, generating positive and negative voltage alternately appears in VA end and VB end.When the positive voltage of VA end or VB end during greater than PMOS pipe cut-in voltage, corresponding one-way circuit is started working, RFID power circuit internal components consumed current just thus positive voltage provide.Can see that the positive voltage peak of VA end and VB end is starkly lower than negative voltage peak.Of particular note, under passive states, the power supply of internal logic circuit can be provided by the RFID power circuit, also can directly be provided by the contact power supply.
No matter circuit of the present invention is in active state or passive states, under the control of internal logic circuit, can be easily from a kind of state exchange to another state, thereby guaranteed that near-field communication equipment can switch neatly between three kinds of mode of operations.
Claims (6)
1. near field communication radio frequency interface integrated circuit, it is characterized in that, it comprises: the read write line transtation mission circuit that sends magnetic field at active state, receive the RFID power circuit in magnetic field in passive states, send/receive antenna and antenna matching network, be connected to the input end that adopts the complementary read write line transtation mission circuit that sends of two-way with the clock signal PCD_CLK of carrier wave same frequency and the data-signal PCD_TXD that will send, the output terminal TXRFA of read write line transtation mission circuit and output terminal TXRFB are connected to the input end of the antenna matching network that adopts symmetrical structure and symcenter ground connection, the output terminal of antenna matching network links to each other with the VB end with the VA of send/receive antenna end, the VA end of send/receive antenna and VB end are connected to the input end of the RFID power circuit that uses a plurality of PMOS pipes, RFID power circuit output internal electric source VDD_PICC.
2. near field communication radio frequency interface integrated circuit as claimed in claim 1 is characterized in that, described send/receive antenna is composed in series by two identical in structure inductance L A and inductance L B, the tie point ground connection of inductance L A and inductance L B.
3. near field communication radio frequency interface integrated circuit as claimed in claim 1 or 2, it is characterized in that, described read write line transtation mission circuit comprises a plurality of metal-oxide-semiconductors and resistance, clock signal PCD_CLK links to each other and links to each other with the grid of PMOS pipe M16 with NMOS pipe M15 through phase inverter INV1 with the grid of NMOS pipe M12 and PMOS pipe M13 respectively, the drain electrode of the drain electrode of NMOS pipe M12 and PMOS pipe M13 links to each other and becomes output terminal TXRFA, the drain electrode of the drain electrode of NMOS pipe M15 and PMOS pipe M16 links to each other and becomes output terminal TXRFB, data-signal PCD_TXD links to each other with the grid of NMOS pipe M14 with NMOS pipe M11 respectively, the source electrode of NMOS pipe M12 links to each other with the drain electrode of NMOS pipe M11, the source electrode of NMOS pipe M15 links to each other with the drain electrode of NMOS pipe M14, the source ground of the source electrode of NMOS pipe M11 and NMOS pipe M14, connect resistance R 1 between the source electrode of NMOS pipe M11 and the drain electrode, NMOS pipe M14 source electrode and drain electrode between connect resistance R 2.
4. near field communication radio frequency interface integrated circuit as claimed in claim 1 or 2, it is characterized in that, described antenna matching network comprises a plurality of electric capacity and inductance, the output terminal TXRFA of read write line transtation mission circuit is successively through inductance L 1A, capacitor C 3A and capacitor C 1A are connected to the VA end of send/receive antenna, the output terminal TXRFB of read write line transtation mission circuit is successively through inductance L 1B, capacitor C 3B and capacitor C 1B are connected to the VB end of send/receive antenna, the tie point of capacitor C 3A and capacitor C 1A is connected to the tie point of capacitor C 3B and capacitor C 1B, the tie point ground connection of capacitor C 2A and capacitor C 2B successively through capacitor C 2A and capacitor C 2B.
5. near field communication radio frequency interface integrated circuit as claimed in claim 4, it is characterized in that, series capacitance C5A and capacitor C 5B are connected to the signal input part of inductance L 1B to the signal input part of inductance L 1A successively in the described antenna matching network, the signal output part of inductance L 1A series capacitance C4A and capacitor C 4B successively is connected to the signal output part of inductance L 1B, the tie point ground connection of the tie point of capacitor C 5A and capacitor C 5B and capacitor C 4A and capacitor C 4B.
6. near field communication radio frequency interface integrated circuit as claimed in claim 1 or 2, it is characterized in that, described RFID power circuit comprises a plurality of PMOS pipes and a clamper module VR, the VB end of send/receive antenna connects the drain electrode of PMOS pipe M1 respectively, the grid of the drain electrode of PMOS pipe M2A and PMOS pipe M2B, the drain electrode of PMOS pipe M2A source electrode and PMOS pipe M2B links to each other, the VA end of send/receive antenna connects the drain electrode of PMOS pipe M3 respectively, the grid of the drain electrode of PMOS pipe M4A and PMOS pipe M4B, the drain electrode of PMOS pipe M4A source electrode and PMOS pipe M4B links to each other, the grid of PMOS pipe M2A, the source electrode of PMOS pipe M2B, source electrode and the grid of PMOS pipe M1, the grid of PMOS pipe M4A, the source electrode of the source electrode of PMOS pipe M4B and PMOS pipe M3 links to each other with grid and exports rectifier power source VREC, rectifier power source VREC connects the drain electrode of PMOS pipe M5 respectively, the grid of the drain electrode of PMOS pipe M6A and PMOS pipe M6B, the drain electrode of PMOS pipe M6A source electrode and PMOS pipe M6B links to each other, signal PICC_SLEEP links to each other with the grid of PMOS pipe M5, the grid of PMOS pipe M6A, the source electrode of the source electrode of PMOS pipe M6B and PMOS pipe M5 links to each other and exports internal electric source VDD_PICC respectively and through clamper module VR ground connection.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2008102262906A CN101739542B (en) | 2008-11-12 | 2008-11-12 | Near field communication radio frequency interface integrated circuit |
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| CN2008102262906A CN101739542B (en) | 2008-11-12 | 2008-11-12 | Near field communication radio frequency interface integrated circuit |
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| CN101739542A true CN101739542A (en) | 2010-06-16 |
| CN101739542B CN101739542B (en) | 2012-06-27 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103340009A (en) * | 2010-11-26 | 2013-10-02 | 惟动无线有限公司 | Multi-mode communications system for a mobile phone |
| CN104025114A (en) * | 2011-10-26 | 2014-09-03 | 高通股份有限公司 | Nfc transceiver |
| CN107659342A (en) * | 2017-10-11 | 2018-02-02 | 深圳市金立通信设备有限公司 | A kind of near-field communication NFC circuit and terminal |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009519652A (en) * | 2005-12-16 | 2009-05-14 | ノキア コーポレイション | Method and device for controlling communication events and providing indications thereof |
| CN100573564C (en) * | 2007-05-16 | 2009-12-23 | 上海华龙信息技术开发中心 | Multiple frequency band multiple protocol radio frequency identifying device system |
| CN201307289Y (en) * | 2008-11-12 | 2009-09-09 | 北京同方微电子有限公司 | Near field communication radio-frequency interface integrated circuit |
-
2008
- 2008-11-12 CN CN2008102262906A patent/CN101739542B/en active Active
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103340009A (en) * | 2010-11-26 | 2013-10-02 | 惟动无线有限公司 | Multi-mode communications system for a mobile phone |
| CN104025114A (en) * | 2011-10-26 | 2014-09-03 | 高通股份有限公司 | Nfc transceiver |
| CN104025114B (en) * | 2011-10-26 | 2016-09-21 | 高通股份有限公司 | Nfc transceiver |
| CN107659342A (en) * | 2017-10-11 | 2018-02-02 | 深圳市金立通信设备有限公司 | A kind of near-field communication NFC circuit and terminal |
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| Publication number | Publication date |
|---|---|
| CN101739542B (en) | 2012-06-27 |
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