CN101738793A - Liquid crystal display panel capable of compensating common voltage and liquid crystal display - Google Patents
Liquid crystal display panel capable of compensating common voltage and liquid crystal display Download PDFInfo
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- CN101738793A CN101738793A CN200810174838A CN200810174838A CN101738793A CN 101738793 A CN101738793 A CN 101738793A CN 200810174838 A CN200810174838 A CN 200810174838A CN 200810174838 A CN200810174838 A CN 200810174838A CN 101738793 A CN101738793 A CN 101738793A
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Abstract
The invention relates to a liquid crystal display panel capable of compensating common voltage and a liquid crystal display. The liquid crystal display panel comprises a first base plate, a second base plate and a liquid crystal layer. The first base plate comprises a substrate, a common electrode routing layer, a first insulation layer, a semiconductor layer, a second insulation layer, a data wire and a conductive layer. The common electrode routing layer is formed on the substrate. The first insulation layer is formed on the common electrode routing layer. The semiconductor layer is formed on the first insulation layer. The second insulation layer is formed on the semiconductor layer and is provided with an opening. The data wire is formed on the second insulation layer. The conductive layer is formed on the opening and part of the second insulation layer, and the conductive layer is electrically isolated from the data wire. The second base plate is arranged in parallel with the first base plate. The liquid crystal layer is clamped between the first base plate and the second base plate.
Description
Technical field
The present invention relates to a kind of display panels and LCD, and be particularly related to a kind of display panels and LCD that compensates common voltage.
Background technology
In the driving process of display panels, current potential according to common voltage, and provide suitable pixel voltage by data drive circuit, make pixel present corresponding gray scale, and also utilize storage capacitors to store to provide in order to drive the pixel voltage of pixel via data line.A kind of framework of common storage capacitors is that the infrabasal plate at display panels is provided with common electrode routing layer, so that form storage capacitors between itself and the pixel electrode.
With reference to Figure 1A, it illustrates the equivalent circuit diagram of the pixel of traditional display panels.In the layout of display panels, data line D and the common electrode routing layer Ld that is formed at infrabasal plate have overlapping, so can produce stray capacitance Cxd between the two, and data line D also has overlapping with the common electrode layer Lu that is formed at upper substrate, so can produce stray capacitance Cxu.Because the pixel voltage that data line D is transmitted, when every scanning line selection time (scan line selection time), to constantly change, make upper substrate common voltage Vcomu and infrabasal plate common voltage Vcomd be subjected to respectively stray capacitance Cxu and Cxd coupling effect influence and constantly produce change.
Transmitting in regular turn with respect to common voltage by data drive circuit is a plurality of pixel voltages of the AC signal of alternate positive and negative, can alleviate the problems referred to above.Yet in some cases, when for example required picture that presents was gridiron pattern kenel image, data drive circuit may only drive odd number bar data line or even number bar data line.Thus, the pixel voltage coupling amount of single polarity can make that upper substrate and infrabasal plate common voltage Vcomu and Vcomd can't balances and produce tangible change, cause the common voltage on storage capacitors Cst and the liquid crystal capacitance Clc in time to get back to preset reset voltage level in the time, cause LCD can't show correct picture in scanning line selection.
With reference to Figure 1B, it is depicted as the equivalent circuit diagram of pixel of the display panels of traditional compensated for common voltage.For addressing the above problem, known technology is to form tin indium oxide (Indium Tin Oxide between the common electrode layer Lu of data line D and upper substrate, ITO) layer, and apply common voltage thereon, so that upper substrate common voltage Vcomu relatively is not easy to be subjected to the influence of the pixel voltage on the data line D.Yet, in the above-mentioned framework, because the distance between ITO layer and the data line D is very near, can produce very big stray capacitance, cause the load of data drive circuit to increase the weight of, not only make its comparatively power consumption, and the range data driving circuit has the problem of undercharge than the storage capacitors of the pixel in distally, cause LCD can't show correct picture.
Summary of the invention
The present invention relates to a kind of display panels and LCD, but the common voltage of compensation panel stablizing the level of common voltage, and can not cause the load of data drive circuit overweight, thereby make the picture that liquid crystal display displays is correct.
According to a first aspect of the invention, propose a kind of display panels, comprise first substrate, second substrate and liquid crystal layer.First substrate comprises substrate, common electrode routing layer, first insulation course, semiconductor layer, second insulation course, data line and conductive layer.Common electrode routing layer is formed on the substrate.First insulation course is formed on the common electrode routing layer.Semiconductor layer is formed on first insulation course.Second insulation course is formed on the semiconductor layer, and second insulation course has opening.Data line is formed on second insulation course.Conductive layer is formed on opening and part second insulation course, and conductive layer and the isolation of data line electricity.Second substrate and the first substrate configured in parallel.Liquid crystal layer is folded between first substrate and second substrate.
According to a second aspect of the invention, propose a kind of LCD, comprise display panels and backlight module.Display panels comprises first substrate, second substrate and liquid crystal layer.First substrate comprises substrate, common electrode routing layer, first insulation course, semiconductor layer, second insulation course, data line and conductive layer.Common electrode routing layer is formed on the substrate.First insulation course is formed on the common electrode routing layer.Semiconductor layer is formed on first insulation course.Second insulation course is formed on the semiconductor layer, and second insulation course has opening.Data line is formed on second insulation course.Conductive layer is formed on opening and part second insulation course, and conductive layer and the isolation of data line electricity.Second substrate and the first substrate configured in parallel.Liquid crystal layer is folded between first substrate and second substrate.Backlight module is coupled to display panels.
For foregoing of the present invention can become apparent more, preferred embodiment cited below particularly, and in conjunction with the accompanying drawings, be described in detail below
Description of drawings
Figure 1A is depicted as the equivalent circuit diagram of the pixel of traditional display panels;
Figure 1B is depicted as the equivalent circuit diagram of pixel of the display panels of traditional compensated for common voltage;
Fig. 2 A is depicted as the part-structure sectional view according to the display panels of first embodiment of the invention;
Fig. 2 B is depicted as the equivalent circuit diagram of pixel of the display panels of Fig. 2 A;
Fig. 3 A to Fig. 3 C is depicted as respectively and imitates circuit according to the electricity of two pixels among Figure 1A, Figure 1B and Fig. 2 B figure;
Fig. 4 A to Fig. 4 C is depicted as respectively the simulation waveform figure according to the common voltage of the equivalent electrical circuit of Fig. 3 A to Fig. 3 C;
Figure 5 shows that wiring diagram according to the part-structure of the display panels of first embodiment of the invention;
Figure 6 shows that part-structure sectional view according to the display panels of second embodiment of the invention;
Figure 7 shows that the equivalent circuit diagram of pixel of the display panels of Fig. 6;
Figure 8 shows that the synoptic diagram of the LCD of the display panels of using the embodiment of the invention.
[primary clustering symbol description]
100: display panels
101: substrate
102: common electrode routing layer
103: the first insulation courses
104: semiconductor layer
104a: amorphous silicon layer
104b: doped layer
105: the second insulation courses
106, D1, D2: data line
107: conductive layer
107a: indium tin oxide layer
108: pixel electrode layer
109: the three insulation courses
110: the first substrates
120: the second substrates
121: common electrode layer
800: LCD
820: display panels
840: backlight module
Clc: liquid crystal capacitance
Cst, Cst1, Cst2: storage capacitors
Cp1, Cp2: equivalent capacity
Cxd, Cxd1, Cxd1a, Cxd1b, Cxda, Cxdb, Cxu, Cxu1, Cxu2, Cxu2a, Cxu2b: stray capacitance
O: opening
R1, R2: zone
Sn: sweep trace
T1, t2: time
TFT: thin film transistor (TFT)
Vcomu: upper substrate common voltage
Vcomd: infrabasal plate common voltage
V1, Va, Vb, Vc: voltage level
Vs: constant voltage source
Embodiment
First embodiment
With reference to Fig. 2 A, it is depicted as the part-structure sectional view according to the display panels of first embodiment of the invention.Display panels 100 comprises first substrate 110, second substrate 120 and liquid crystal layer 130.First substrate 110 for example is an infrabasal plate.Second substrate 120 for example is a upper substrate, itself and first substrate, 110 configured in parallel.Liquid crystal layer 130 is folded between first substrate 110 and second substrate 120.
Simultaneously with reference to Fig. 2 A and Fig. 2 B, Fig. 2 B is depicted as the equivalent circuit diagram of pixel of the display panels 100 of Fig. 2 A.In Fig. 2 B, data line 106 for example is coupled to liquid crystal capacitance Clc and storage capacitors Cst via thin film transistor (TFT) (Thin FilmTransistor) TFT.Liquid crystal capacitance Clc and storage capacitors Cst also are coupled to upper substrate and infrabasal plate common voltage Vcomu and Vcomd respectively.With reference to forming stray capacitance Cxu between the data line 106 of figure 2A and Fig. 2 B and the common electrode layer 121.Also form stray capacitance Cxd between data line 106 and the common electrode routing layer 102.
In addition, form stray capacitance Cxda between data line 106 and the semiconductor layer 104, and form another stray capacitance Cxdb between semiconductor layer 104 and the common electrode routing layer 102.So, because semiconductor layer 104 is formed between data line 106 and the common electrode routing layer 102, so the former stray capacitance Cxd that is used to be expressed as between data line 106 and the common electrode routing layer 102 can be considered connecting of two stray capacitance Cxda and Cxdb.Also have, the infrabasal plate common voltage Vcomd that puts on conductive layer 107 can be considered the constant voltage source Vs of Fig. 2, and the voltage level of this constant voltage source Vs is Vcomd.
Continuation is with reference to Fig. 2 B, and display panels 100 is applied to LCD.This LCD for example comprises data drive circuit (not shown), in order to transmit pixel voltage to data line 106.When its reversing of pixel voltage that data line 106 is transmitted, upper substrate and infrabasal plate common voltage Vcomu and Vcomd are subjected to the influence of the pixel voltage that data line 106 transmitted respectively via stray capacitance Cxu and Cxd, make its voltage level be drawn high or drag down.In the present embodiment, when infrabasal plate common voltage Vcomd is changed by the influence of the pixel voltage of data line 106, can be by stray capacitance Cxdb and the constant voltage source Vs between semiconductor layer 104 and the common electrode routing layer 102, compensate infrabasal plate common voltage Vcomd, so that influenced by pixel voltage and the infrabasal plate common voltage Vcomd that changes can in time get back to preset reset voltage level in scanning line selection in the time.
Equivalent electrical circuit and the simulation result thereof of display panels when the compensation common voltage of traditional display panels and present embodiment below will be described.With reference to Fig. 3 A to Fig. 3 C, it is depicted as respectively the equivalent circuit diagram according to two pixels among Figure 1A, Figure 1B and Fig. 2 B.The data line D1 of Fig. 3 C and D2 are two data lines of data line 106 in two pixels in the pixel shown in Fig. 2 B.In Fig. 3 A to Fig. 3 C, data line D1 for example is subjected to the power drives of the maximum drive ability of data drive circuit, and data line D2 is not driven, so data line D2 can not influence the voltage level of upper substrate and infrabasal plate common voltage Vcomu and Vcomd.
In Fig. 4 A to Fig. 4 C, it is depicted as respectively the simulation waveform figure according to the common voltage of the equivalent electrical circuit of Fig. 3 A to Fig. 3 C.With Fig. 4 A is that example is described as follows.Fig. 4 A figure is to be that example is shown with infrabasal plate common voltage Vcomd.When time t1, data line D1 changes into high driving voltage by preset reset voltage level, for example change into 12 volts by 6 volts, and the voltage of data line D2 does not have change, for example still keeps 6 volts.At this moment, infrabasal plate common voltage Vcomd is subjected to the influence of data line D1 and is pulled up to voltage level V1.Crossed after the time t1, infrabasal plate common voltage Vcomd is influenced by data line D1 no longer, and returns back to default common voltage level (6 volts) gradually.When time t2, data line D1 changes into another voltage, and for example minimum drive voltage is 0 volt, and this moment, infrabasal plate common voltage Vcomd did not get back to preset reset voltage level (6 volts) yet, and drifted to voltage level Va.In like manner as can be known, upper substrate common voltage Vcomu also can be affected and make its voltage level produce drift.
Below will provide detailed analog result.In Fig. 4 A, infrabasal plate common voltage Vcomd simulation result is voltage level Va, and promptly 6.29 volts, old friend's infrabasal plate common voltage Vcomd can't in time get back to preset reset voltage level in scanning line selection in the time.In Fig. 4 B, be voltage level Vb via the simulation result of the upper substrate common voltage Vcomd after the classic method compensation, promptly 6.07 volts, old friend's upper substrate common voltage Vcomd still can't in time get back to preset reset voltage level in scanning line selection in the time.In Fig. 4 C, utilize the display panels of the embodiment of the invention, the simulation result of the infrabasal plate common voltage Vcomd after the compensation is voltage level Vc, promptly 5.99 volts.Hence one can see that, and in the display panels that present embodiment proposed, infrabasal plate common voltage Vcomd can get back to preset reset voltage level in the time in scanning line selection.
In addition, the display panels of present embodiment also has the advantage of high aperture (aperture ratio).With reference to Fig. 5, it is depicted as the wiring diagram according to the part-structure of the display panels of first embodiment of the invention.In Fig. 5, conductive layer 107 is preferably tin indium oxide (Indium Tin Oxide, ITO) layer 107a.This transparent ITO layer 107a is applied in constant voltage source Vs, the voltage level of this constant voltage source Vs is infrabasal plate common voltage Vcomd, and the voltage level of constant voltage source Vs is sent to the semiconductor layer 104 that is formed between data line 106 and the common electrode routing layer 102 via opening O, with compensation infrabasal plate common voltage Vcomd.Transparent ITO layer 107a can make the light penetration of backlight module (not shown among Fig. 5), so can not cause the reduction of aperture opening ratio.
And generally speaking, can form storage capacitors Cst between common electrode routing layer 102 and the pixel electrode layer 108.And in the foregoing description, common electrode routing layer 102 also can be formed on the below of ITO layer 107a, to form another storage capacitors Cst ', as shown in Figure 5.Therefore, compared to traditional display panels, because the display panels of the embodiment of the invention has extra storage capacitors Cst ', so the area of storage capacitors Cst can reduce, the wiring width of common electrode routing layer 102 through pixel electrode 108 time can reduce, and this further improves aperture opening ratio.
In addition, the display panels of the embodiment of the invention can alleviate the load of data drive circuit, now is described as follows.Continuation is with reference to Fig. 5, the stray capacitance Cxu of Fig. 2 B is positioned at the overlapping place of the common electrode layer 121 of the data line 106 and second substrate, promptly be positioned at region R 1, and stray capacitance Cxd is positioned at the overlapping place of the common electrode routing layer 102 of the data line 106 and first substrate, promptly is positioned at region R 2.According to CALCULATION OF CAPACITANCE formula C=ε A/d, because the area of region R 2 is less than the area of region R 1, so can know stray capacitance Cxd by inference less than stray capacitance Cxu.
Therefore, in the method for traditional bucking voltage, be between the common electrode layer of the data line and second substrate, to form an ITO layer again, will make stray capacitance therebetween become bigger, and cause the load of data drive circuit overweight.And in the embodiments of the invention, be between less stray capacitance Cxd, to provide current path to compensate common voltage, so can not cause the load of data drive circuit overweight.
Second embodiment
With reference to Fig. 6, it is depicted as the part-structure sectional view according to the display panels of second embodiment of the invention.Different with first embodiment is that first substrate 110 also comprises the 3rd insulation course 109.The 3rd insulation course 109 is formed on the data line 106, and cover data line 106.Conductive layer 107 also extends on the 3rd insulation course 109, to overlap with data line 106.So, can form stray capacitance Cxua between conductive layer 107 and the data line 106, and can form stray capacitance Cxub between conductive layer 107 and the common electrode layer 121.In the present embodiment, the equivalent circuit diagram of the pixel of display panels 600 is shown in Fig. 7 figure.
In Fig. 7, when the upper substrate common voltage Vcomu of second substrate 120 is changed by the influence of the pixel voltage of data line 106, by stray capacitance Cxub and the constant voltage source Vs between conductive layer 107 and the common electrode layer 121, can compensate upper substrate common voltage Vcomu, make the upper substrate common voltage Vcomu that is influenced by pixel voltage and change in time to get back to preset reset voltage level in the time in scanning line selection.Therefore, in the present embodiment, not only have the advantage of the compensation infrabasal plate common voltage Vcomd that is same as first embodiment, can also compensate upper substrate common voltage Vcomu, make common voltage Vcomu and Vcomd all can get back to preset reset voltage level in real time.
In addition, the display panels that the above embodiment of the present invention proposed can be applicable in the LCD.With reference to Fig. 8, it is depicted as the synoptic diagram of the LCD of the display panels of using the embodiment of the invention.LCD 800 comprises display panels 820 and backlight module 840.Display panels 820 for example has the framework of the disclosed display panels of the foregoing description (as the display panels 100 of Fig. 2 A or the display panels 600 of Fig. 6).Backlight module 840 is coupled to this display panels 820, required light source LS when display panels 820 display frames to be provided.Because display panels 820 can be by the common voltage of compensation upper substrate and infrabasal plate, stablize the common voltage of upper substrate and infrabasal plate, therefore, LCD 800 can be under the operation of the display panels with stable common voltage, correctly regulate and control the light source LS that backlight module 840 is provided, thereby show correct picture.
Disclosed display panels of the above embodiment of the present invention and LCD, be by forming semiconductor layer between the common electrode routing layer and data line of first substrate, compensate the common voltage of common electrode routing layer, make that the infrabasal plate common voltage is able in time get back to normal level in the time in scanning line selection, so LCD can show correct picture, and can seriously not increase the weight of the load of data drive circuit, thus, the range data driving circuit does not have the problem of undercharge than the storage capacitors of the pixel in distally.In addition, also, make aperture opening ratio be maintained by using transparent ITO layer as conductive layer.Also have, in another embodiment, also conductive layer is arranged on the data line, compensate the upper substrate common voltage to get back to normal level, so can reach the effect of the common voltage of stablizing upper substrate and infrabasal plate simultaneously.
In sum, though the present invention with preferred embodiment openly as above, yet it is not in order to limit the present invention.The technician of the technical field of the invention, without departing from the spirit and scope of the present invention, when making various modifications and modification.Therefore, protection scope of the present invention should be as the criterion with the scope of appended claims.
Claims (12)
1. display panels comprises:
First substrate comprises:
Substrate;
Common electrode routing layer is formed on the described substrate;
First insulation course is formed on the described common electrode routing layer;
Semiconductor layer is formed on described first insulation course;
Second insulation course is formed on the described semiconductor layer, and described second insulation course has opening;
Data line is formed on described second insulation course; And
Conductive layer is formed on described second insulation course of described opening and part, and described conductive layer and the isolation of described data line electricity;
Second substrate, itself and the described first substrate configured in parallel; And
Liquid crystal layer, it is folded between described first substrate and described second substrate;
Wherein, described common electrode routing layer and described conductive layer are applied in a common voltage.
2. display panels according to claim 1, wherein, described first substrate also comprises the 3rd insulation course, described the 3rd insulation course is formed on the data line, and cover described data line, described conductive layer also extends on described the 3rd insulation course, with overlapping with described data line part.
3. display panels according to claim 1, wherein, described semiconductor layer comprises:
Amorphous silicon layer is formed on described first insulation course; And
Doped layer is formed on the described amorphous silicon layer, and contacts with described conductive layer.
4. display panels according to claim 1, wherein, described conductive layer is tin indium oxide (Indium Tin Oxide, ITO) layer.
5. display panels according to claim 1, wherein, described first insulation course and described second insulation course are silicon nitride layer.
6. display panels according to claim 1, wherein, described second substrate comprises common electrode layer, described common electrode layer is applied in another common voltage.
7. LCD comprises:
Display panels comprises:
First substrate comprises:
Substrate;
Common electrode routing layer is formed on the described substrate;
First insulation course is formed on the described common electrode routing layer;
Semiconductor layer is formed on described first insulation course;
Second insulation course is formed on the described semiconductor layer, and described second insulation course has opening;
Data line is formed on described second insulation course; And
Conductive layer is formed on described second insulation course of described opening and part, and described conductive layer and the isolation of described data line electricity;
Second substrate, itself and the described first substrate configured in parallel; And
Liquid crystal layer, it is folded between described first substrate and described second substrate; And
Backlight module, it is coupled to described display panels;
Wherein, described common electrode routing layer and described conductive layer are applied in a common voltage.
8. LCD according to claim 7, wherein, described first substrate also comprises the 3rd insulation course, described the 3rd insulation course is formed on the data line, and cover described data line, described conductive layer also extends on described the 3rd insulation course, with overlapping with described data line part.
9. LCD according to claim 7, wherein, described semiconductor layer comprises:
Amorphous silicon layer is formed on described first insulation course; And
Doped layer is formed on the described amorphous silicon layer, and contacts with described conductive layer.
10. LCD according to claim 7, wherein, described conductive layer is an indium tin oxide layer.
11. LCD according to claim 7, wherein, described first insulation course and described second insulation course are silicon nitride layer.
12. LCD according to claim 7, wherein, described second substrate comprises common electrode layer, and described common electrode layer is applied in another common voltage.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200810174838 CN101738793B (en) | 2008-11-07 | 2008-11-07 | Liquid crystal display panel capable of compensating common voltage and liquid crystal display |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200810174838 CN101738793B (en) | 2008-11-07 | 2008-11-07 | Liquid crystal display panel capable of compensating common voltage and liquid crystal display |
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| CN101738793A true CN101738793A (en) | 2010-06-16 |
| CN101738793B CN101738793B (en) | 2013-07-10 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103137054A (en) * | 2011-11-30 | 2013-06-05 | 上海中航光电子有限公司 | Bigrid horizontal pixel reversal driving method |
| CN104035228A (en) * | 2013-03-04 | 2014-09-10 | 三星显示有限公司 | Liquid crystal display and manufacturing method thereof |
| CN107221297A (en) * | 2017-05-31 | 2017-09-29 | 友达光电股份有限公司 | Display device |
| CN111312066A (en) * | 2018-12-12 | 2020-06-19 | 三星显示有限公司 | Display device including amorphous silicon conductive layer |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1920647A (en) * | 2005-08-26 | 2007-02-28 | 群康科技(深圳)有限公司 | Liquid crystal display device |
| CN100583222C (en) * | 2006-08-15 | 2010-01-20 | 中华映管股份有限公司 | Common voltage compensation device, liquid crystal display and its driving method |
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2008
- 2008-11-07 CN CN 200810174838 patent/CN101738793B/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103137054A (en) * | 2011-11-30 | 2013-06-05 | 上海中航光电子有限公司 | Bigrid horizontal pixel reversal driving method |
| CN103137054B (en) * | 2011-11-30 | 2015-09-23 | 上海中航光电子有限公司 | Bigrid pixels across inversion driving method |
| CN104035228A (en) * | 2013-03-04 | 2014-09-10 | 三星显示有限公司 | Liquid crystal display and manufacturing method thereof |
| CN104035228B (en) * | 2013-03-04 | 2020-02-07 | 三星显示有限公司 | Liquid crystal display and method of manufacturing the same |
| CN107221297A (en) * | 2017-05-31 | 2017-09-29 | 友达光电股份有限公司 | Display device |
| CN107221297B (en) * | 2017-05-31 | 2020-06-23 | 友达光电股份有限公司 | Display device |
| CN111312066A (en) * | 2018-12-12 | 2020-06-19 | 三星显示有限公司 | Display device including amorphous silicon conductive layer |
| CN111312066B (en) * | 2018-12-12 | 2022-12-16 | 三星显示有限公司 | Display device including amorphous silicon conductive layer |
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| Publication number | Publication date |
|---|---|
| CN101738793B (en) | 2013-07-10 |
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