CN101711052B - Method for reducing stand-by power consumption of wireless transceiver system and system thereof - Google Patents

Method for reducing stand-by power consumption of wireless transceiver system and system thereof Download PDF

Info

Publication number
CN101711052B
CN101711052B CN200910109991A CN200910109991A CN101711052B CN 101711052 B CN101711052 B CN 101711052B CN 200910109991 A CN200910109991 A CN 200910109991A CN 200910109991 A CN200910109991 A CN 200910109991A CN 101711052 B CN101711052 B CN 101711052B
Authority
CN
China
Prior art keywords
microprocessor
time
wireless transceiver
transceiver system
sleep
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200910109991A
Other languages
Chinese (zh)
Other versions
CN101711052A (en
Inventor
安飞虎
刘建伟
姜西辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen H&T Intelligent Control Co Ltd
Original Assignee
Shenzhen H&T Intelligent Control Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen H&T Intelligent Control Co Ltd filed Critical Shenzhen H&T Intelligent Control Co Ltd
Priority to CN200910109991A priority Critical patent/CN101711052B/en
Publication of CN101711052A publication Critical patent/CN101711052A/en
Application granted granted Critical
Publication of CN101711052B publication Critical patent/CN101711052B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Abstract

The invention relates to a method for reducing the stand-by power consumption of a wireless transceiver system, comprising the step of: setting the primary transmitting time of a coded signal of a transmitting device in the wireless transceiver system to be bigger than the sum of the sleep time of a micro processor of a receiving device and the power-on time of the micro processor after being waken up; setting the micro processor of the receiving device in the wireless transceiver system to enter the sleep state by utilizing a watchdog; the receiving device quits the sleep state after receiving the coded signal sent out by a primary transmitting device. The invention also relates to a wireless transceiver system. Implementing the method for reducing the stand-by power consumption of the wireless transceiver system and the system has the following advantages that the shortest possible intermittent power supply and longest possible sleep time in a fixed cycle can be achieved, and moreover, any possible foreign signal reception can not be missed.

Description

Reduce the method and the system thereof of stand-by power consumption of wireless transceiver system
Technical field
The present invention relates to the radio field, more particularly, relate to a kind of method and system that reduce stand-by power consumption of wireless transceiver system.
Background technology
In battery-powered electronic product; The stand-by time that customer requirements is long as far as possible; It is long as far as possible service time of battery request; Preferably can be in half a year even 1 year battery non-exchangings all, but also to accomplish not miss any signal that should receive whenever and wherever possible at ordinary times, this just proposes very high requirement to the standby power consumption of product.For radiating circuit, be easier to address this problem because it only just energized and emission once just do not press the button thoroughly being connected of disconnecting circuit and battery when pressing the button.But the problem of receiving circuit is then wanted the many of difficulty; Its reason is: in order to reach the standby super low-power consumption; Receiving circuit must get into sleep pattern, but the microprocessor of product (MCU) when sleep suspend execution command, cause again receiving extraneous signal; Only way is an intermittent power supply, to receive possible extraneous signal at any time.But how responding under the limitation condition at existing MCU, reduce and sleep and the time scale of waking up (or dutycycle of title intermittent power supply), to reduce the stand-by power consumption of MCU as far as possible, is one of this electronic product performance of judge advanced person whether key index.Common solution is to receive signal through the external interrupt mouth that arousal function is arranged, in case skip signal is arranged, just wakes MCU up, and this is fine when wire communication.But just can't realize at Radio infrared or when RF remote-controlled; Because MCU is between sleep period; Be in the pause instruction state, and supporting peripheral receiving circuit, signal transformation circuit must there be power supply could receive extraneous signal, wake MCU up otherwise can't produce external skip signal.So that the wireless receiving in the product, signal transformation circuit are in power supply state always; Cause the complete machine standby power consumption to increase (serviceable life of battery is also just very short) greatly; So the standby power consumption electric current that wakes this method of MCU by the external interrupt mouth that triggers arousal function with extraneous signal up remains higher.
Summary of the invention
The technical matters that the present invention will solve is, to the higher defective of above-mentioned standby power consumption electric current of prior art, a kind of method and system that have lower standby power consumption electric current and can not miss the reduction stand-by power consumption of wireless transceiver system of wireless signal is provided.
The technical solution adopted for the present invention to solve the technical problems is: construct a kind of method that reduces stand-by power consumption of wireless transceiver system; Comprise the emitter coded signal that is provided with in said wireless transceiver system launch time greater than length of one's sleep of said receiving trap microprocessor and said microprocessor by the power-on time sum after waking up, also comprise the steps:
A) microprocessor of setting the receiving trap in the said wireless transceiver system utilizes house dog (WatchDog Timer, WDT) entering sleep state;
B) withdraw from sleep state behind the coded signal that emitter of receiving trap reception is seen off.
In the method for reduction stand-by power consumption of wireless transceiver system of the present invention, said steps A) further comprise:
A1) enable said microprocessor watchdog function;
House dog when A2) said microprocessor being set waking up is overflowed number of times;
A3) judge that said house dog overflows number of times and whether reach, in this way, wake said microprocessor up, otherwise, sleep continued.
In the method for reduction stand-by power consumption of wireless transceiver system of the present invention, said microprocessor be the length of one's sleep said house dog regularly the time of overflowing the house dog of multiply by setting regularly overflow number of times.
In the method for reduction stand-by power consumption of wireless transceiver system of the present invention, said step B) in, thereby judges whether to receive once satisfactory synchronous code and address code makes said microcontroller get into sleep state or normal operating conditions once more.
In the method for reduction stand-by power consumption of wireless transceiver system of the present invention, the length of one's sleep ratio of said intermittent power supply time with said microprocessor is 1: 5.
The invention still further relates to a kind of wireless transceiver system, comprise receiving trap and coded signal thereof launch time greater than length of one's sleep of the microprocessor of said receiving trap and said microprocessor by the emitter of the power-on time sum after waking up; Said receiving trap comprises that also being used to be provided with the sleep state that gets into sleep state time length is provided with module, is used to judge whether the signal identification module that breaks away from said dormant sleep state detection module and be used for during said microprocessor power supply, judging whether to receive correct synchronous code and address code.
In the wireless transceiver system of the present invention, said sleep state is provided with module and comprises being provided with and see that time of overflowing that house dog is overflowed the time is provided with module and house dog is set overflows the number of times of number of times module is set.
In the wireless transceiver system of the present invention, said sleep state judge module comprises being used to discern whether said house dog overflow overflows judge module, be used to judge that said house dog overflows the number of times judge module whether number of times reaches setting value.
In the wireless transceiver system of the present invention, said signal identification module comprise be used to judge the power-on time that saidly receives signal receiving circuit and signaling module that whether synchronous code and address code conform to this machine, when said synchronous code conforms to address code, keep said microprocessor power supply to make the power-on time Postponement module of the coding that it can the said emitter emission of complete reception and be used to judge said microprocessor whether with the power-on time control circuit that reaches setting-up time.
In the wireless transceiver system of the present invention, said receiving trap comprises that also being connected said microprocessor has on the input/output end port of arousal function, when it is triggered microprocessor with said receiving trap by the button that wakes up immediately in the sleep state.
The method and system of the reduction stand-by power consumption of wireless transceiver system of embodiment of the present invention; Have following beneficial effect: regularly overflow technique is next regularly from waking the microprocessor in the receiving trap up owing to adopt house dog; And have or not according to judgement and to receive effective forward position identification code and determine whether withdrawing from sleep state; Therefore, can reach the intermittent power supply short as far as possible in a fixed cycle and the long as far as possible length of one's sleep, be unlikely to miss any possible extraneous signal again and receive.
Description of drawings
Fig. 1 is that the present invention reduces method flow diagram among the method and system embodiment of stand-by power consumption of wireless transceiver system;
Fig. 2 is the receiving trap structural representation of said embodiment.
Embodiment
To combine accompanying drawing that the embodiment of the invention is described further below.
As shown in Figure 1, reduce among the method and system embodiment of stand-by power consumption of wireless transceiver system in the present invention, comprise the steps:
Step S11 begins: as previously mentioned; In wireless transceiver system, the standby power consumption of radiating portion can not considered, and can when button is pressed, just be circuit supply; When not having button to press; Power supply not to be connected, and need not consider its power consumption basically, mainly needs to consider the standby power consumption of receiving unit.In this step, the microprocessor start program of receiving unit.
Step S12 judge WDT regularly the overflow indicator position whether be 0: owing to regularly overflow when waking up when the WDT of system house dog, its watchdog reset zone bit can become 1 by 0, and program can start anew to move.Therefore, in this step, earlier judge whether the watchdog reset zone bit is 1, as be 1 (house dog have timing to overflow wake up), then execution in step S15; As be 0, execution in step S13 then.
Step S13 initiation parameter is set: in this step; Parameter initialization comprises that the house dog when microprocessor is set to be waken up overflows number of times; Because the time that house dog is overflowed is certain, has set the number of times that overflows of house dog, has also just set the length of one's sleep of microprocessor in the receiving trap.
Step S14 moves sleep program: after setting parameter, in this step, the microprocessor of receiving trap gets into sleep state, when the house dog generation is overflowed for the first time, returns step S11 and begins to carry out.
Step S15 accumulative total WDT regularly overflows and reaches set point number whether: in this step, judge whether the number of times of the WDT of accumulative total surpasses the number of times of setting, if surpass, and execution in step S16, otherwise, execution in step S14.
The variable zero clearing that step S16 accumulative total WDT regularly overflows number of times: with the WDT of accumulative total overflow the number of times zero clearing, prepare to finish this sleep state.
Step S17 finishes sleep to the receiving circuit operation master routine that powers on: finish this sleep state, power on for the each several part of receiving trap, comprise and accept circuit, move the master routine of the microprocessor of this receiving device, prepare acknowledge(ment) signal.
Step S18 judges whether power-on time has reached setting value: owing to when parameter setting, set power-on time, promptly in any one-period; For the power-on time of microprocessor and receiving circuit can not surpass this time; Therefore in this step, judge whether this power-on time reaches this setting value, if; Execution in step S14, microprocessor gets into sleep state; If not, execution in step S19.
Step S19 drives timer, judges receiving code: open timer, begin the signal of waiting for that emitter sends out.
Step S20 receiving code OK: judge whether the receiving code in the signal that receives is correct, promptly whether this signal sends to this receiver, if, execution in step S21, if not, execution in step S18 returned.
Step S21 operation master routine is carried out relevant action: in this step, when receiving correct receiving code, microprocessor is decoded to it, finds corresponding action, and carries out.
Whether receive receiving code again behind the step S22 setting-up time: behind the execution of step S21, judge after timer is opened, whether to receive receiving code once more, in this way, execution in step S20; If not, execution in step S14.
In the present embodiment; The shortest power-on time during intermittent power supply should have long enough; At least should be able to be in this power-on time section; Let the microprocessor of receiving trap can receive all transmitting, and through judge whether to receive desired launching code decide the microprocessor of follow-up receiving trap be this continuation sleep (the ultralow power consumption stand-by operation pattern of intermittent power supply) still this ends sleep get into lasting normal mode of operation (the microprocessor power consumption of receiving trap at this moment obviously increases severely).In the present embodiment; Need not to wait for that the microprocessor of receiving trap can receive all transmitting; As long as judge some crucial bit data wherein, whether the microprocessor that can determine receiving trap should continuations be controlled and the power supply that continues receiving circuit still is that this is got back in the sleep again and goes.
Usually; The shortest power-on time of intermittent power supply is to confirm like this: because the launching code of wireless transceiver system is made up of synchronous code (or claiming the forward position sign indicating number), address code, numeric data code etc.; And after the microprocessor of receiving trap regularly intermittently wakes up; Usually to wait until coding that interpretation to 2 at least time receives all protocol compliant require and just think after the unanimity as a result to receive decoding effectively, just can let the microprocessor of receiving trap get into normal mode of operation afterwards.So; The shortest power-on time of intermittent power supply pattern; Receive effective transmit coded signals no matter have or not; All must reserve the time that guarantees enough to run through 2 complete and effective transmit coded signals (the BIT data that comprise all constituents such as synchronous code, address code, numeric data code) at least, create necessary time conditions for receiving at least 2 complete and effective transmit coded signals, so duration of power supply is longer.
In the present embodiment; As long as once satisfactory synchronous code and address code (also claiming " extraneous signal identity code ") are arrived in the microprocessor interpretation; Need not to wait until follow-up numeric data code and other yard BIT of the first string of interpretation again; Also need not to wait again interpretation to finish the effective transmit coded signals of the 2nd string, can finish sleep and get into normal mode of operation, and continued power is in power supply/reception data mode to guarantee reception, signal transformation circuit always; Numeric data code as the back receives is not right, just gets into sleep again at once.Thus; The shortest power-on time of reserving; Only need get final product for receiving 1 synchronous code and necessary time conditions of address code creation in the complete transmit coded signals, because the BIT position has significantly reduced, the shortest power-on time of the intermittent power supply standby mode of design has also just shortened dramatically like this; Dutycycle can reach more than 1: 5, and significantly reduces the standby average current.What need cooperation is: the every emission of coded signal once; Its duration should be greater than the T.T. (being referred to as a time cycle) of receiving trap microprocessor length of one's sleep+intermittent power supply time; Can cover the time period that the receiving circuit in any time cycle is waken up to guarantee to transmit, make receiving circuit not miss the reception of any external transmit coded signals once.
In the present embodiment, when the WDT of system house dog is regularly overflowed when waking up, its watchdog reset zone bit can become 1 by 0, the program operation that can start anew.Through the number of times of inquiry when beginning and accumulative total watchdog reset zone bit jumping 1, can calculate and set the time of receiving trap microprocessor sleep.Every regularly the waking up of receiving trap microprocessor come once, i.e. whether inspection has the reception signal, as does not have, and gets into sleep state again.If any receiving effective extraneous signal, then get into normal mode of operation.Normal work period as there is not the signal of reception in the setting-up time always, then gets into sleep again, to reach the power saving purpose.
Wherein, earlier judge whether the watchdog reset zone bit is 1, as be 1 (house dog have regularly to overflow wake up), cumulative number then as also not reaching the number of times of setting, does not also reach the number of times of setting like cumulative number, and then watchdog reset zone bit zero clearing continues to sleep; Reached the number of times of setting like cumulative number, then directly operation is opened and is regularly interrupted, declares master routine parts such as receiving code, key scan.
In the present embodiment, the house dog of the length of one's sleep=house dog time of regularly overflowing * setting that the receiving trap microprocessor is set is regularly overflowed number of times, and regularly the time of overflowing can remove to set correlation parameter through the mask option to house dog.After receiving trap microprocessor house dog is regularly waken up certainly, the operation master routine, at first whether the power-on time of judgement setting arrives, and as also being less than, then the receiving trap microprocessor continues to the receiving circuit power supply, and the execution extraneous signal receives and a judgement yard supervisor; Power-on time as setting arrives, and the receiving trap microprocessor judges do not receive effective extraneous signal identity code, jumps again and removes to carry out sleep program; Receive effective extraneous signal identity code like the receiving trap microprocessor judges; Then prolong receiving circuit power-on time to 1 second; Receiving all external transmit coded signals, as the extraneous signal that receives decodes successfully, then gets into operate as normal (non-power saving) pattern.As there is not the signal of reception in the follow-up setting-up time of receiving trap microprocessor always, then MCU just gets into sleep again, recovers the intermittent power supply pattern of receiving circuit simultaneously, to reach power saving effect.
Attention: key scan should select the I/O mouth of arousal function, so as between receiving trap microprocessor sleep period also response button in good time.And need add an instruction of jumping to master routine in sleep instruction back; Because it is to wake the statement that sleep instruction back is carried out in the back up that button I/O mouth wakes up; Watchdog reset wakes the statement of then not carrying out sleep instruction back up; Directly from the beginning the return information beginning is carried out, and this wakes up different with watchdog reset.
Owing to adopt house dog timing wake-up mode, and house dog is regularly overflowed to reset and just makes the program operation that starts anew again, but can't change the data in the RAM, and these are different with other reset mode, so also just do not have the drawback of the information of brushing former storage.
In addition, in the present embodiment, during intermittent power supply operation master routine, be added with the anti-endless loop instruction of " CLRWDT " in the master routine; As not receiving signal in the setting-up time, then jump again and remove to carry out sleep program.Because of nothing in the sleep program " clear WDT " instruction, so can not occur to wake the problem of sleep certainly up with house dog because of operation " clear WDT ".
In the present embodiment, also disclosed a kind of wireless transceiver system, comprise receiving trap and coded signal thereof launch time greater than length of one's sleep of the microprocessor of said receiving trap and said microprocessor by the emitter of the power-on time sum after waking up; Said receiving trap comprises that also being used to be provided with the sleep state that gets into sleep state time length is provided with module 1, is used to judge whether the signal identification module 3 that breaks away from said dormant sleep state detection module 2 and be used for during said microprocessor power supply, judging whether to receive correct synchronous code and address code.Sleep state is provided with module 1 and comprises that house dog is set overflows the number of times of number of times module 11 is set; The number of times that this number of times is provided with module 11 settings combined with the time of overflowing that microprocessor itself is had at every turn, had fixed each dormant total time of entering of microprocessor.Sleep state judge module 2 comprises being used to discern whether said house dog overflow overflows judge module 21, be used to judge that said house dog overflows the number of times judge module 22 whether number of times reaches setting value; Overflow judge module 21 through judging that house dog overflow indicator position is 0 or 1 to judge that house dog is overflowed and whether take place; And house dog of every generation is overflowed; Number of times judge module 22 all will add the number of times that overflows of its record 1 back and detect and once to overflow number of times and whether reach above-mentioned number of times the set number of times of module 11 is set; Surpass set point number like this number of times, mean that arrive the length of one's sleep of microprocessor, should withdraw from sleep state; Do not surpass set point number like this number of times, then continue sleep.Signal identification module 3 comprise be used to judge the power-on time that saidly receives signal receiving circuit and signaling module 31 that whether synchronous code and address code conform to this machine, when said synchronous code conforms to address code, keep said microprocessor power supply to make the power-on time Postponement module 32 of the coding that it can the said emitter emission of complete reception and be used to judge said microprocessor whether with the power-on time control circuit 33 that reaches setting-up time; When signal receiving circuit and signaling module 31 are judged the synchronous code that receives and address code when correct, 32 work of power-on time Postponement module, the power-on time that prolongs microprocessor and receiving circuit guarantees that microprocessor can receive complete launching code; Power-on time control circuit 33 then is used for when microprocessor does not receive signal, the power-on time of microprocessor and receiving circuit in the control sleep state.In addition, receiving trap also be included in its when being triggered with the microprocessor of said receiving trap by the button that wakes up in the sleep state 4; Said button 4 is connected said microprocessor and has on the input/output end port 5 of arousal function.Therefore, no matter how, triggering button 4, the state of microprocessor all can make it get into duty.
The above embodiment has only expressed several kinds of embodiments of the present invention, and it describes comparatively concrete and detailed, but can not therefore be interpreted as the restriction to claim of the present invention.Should be pointed out that for the person of ordinary skill of the art under the prerequisite that does not break away from the present invention's design, can also make some distortion and improvement, these all belong to protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with accompanying claims.

Claims (7)

1. method that reduces stand-by power consumption of wireless transceiver system; It is characterized in that; Comprise the emitter coded signal that is provided with in said wireless transceiver system launch time greater than length of one's sleep of receiving trap microprocessor and said microprocessor by the power-on time sum after waking up, also comprise the steps:
A) microprocessor of setting the receiving trap in the said wireless transceiver system utilizes house dog to get into sleep state;
B) withdraw from sleep state behind the coded signal that emitter of receiving trap reception is seen off;
Said steps A) further comprise:
A1) enable said microprocessor watchdog function;
House dog when A2) said microprocessor being set waking up is overflowed number of times;
A3) judge that said house dog overflows number of times and whether reach, in this way, wake said microprocessor up, otherwise, sleep continued.
2. the method for reduction stand-by power consumption of wireless transceiver system according to claim 1 is characterized in that, said microprocessor be the length of one's sleep said house dog regularly the time of overflowing the house dog of multiply by setting regularly overflow number of times.
3. the method for reduction stand-by power consumption of wireless transceiver system according to claim 1; It is characterized in that; Said step B) in, thereby judges whether to receive once satisfactory synchronous code and address code makes said microcontroller get into sleep state or normal operating conditions once more.
4. the method for reduction stand-by power consumption of wireless transceiver system according to claim 3 is characterized in that, the length of one's sleep ratio of intermittent power supply time with said microprocessor is 1:5.
5. a wireless transceiver system is characterized in that, comprise receiving trap and coded signal thereof launch time greater than length of one's sleep of the microprocessor of said receiving trap and said microprocessor by the emitter of the power-on time sum after waking up; Said receiving trap comprises that also being used to be provided with the sleep state that gets into sleep state time length is provided with module, is used to judge whether the signal identification module that breaks away from said dormant sleep state detection module and be used for during said microprocessor power supply, judging whether to receive correct synchronous code and address code;
Said sleep state is provided with module and comprises being provided with and see that time of overflowing that house dog is overflowed the time is provided with module and house dog is set overflows the number of times of number of times module is set;
Said sleep state judge module comprises being used to discern whether said house dog overflow overflows judge module, be used to judge that said house dog overflows the number of times judge module whether number of times reaches setting value.
6. wireless transceiver system according to claim 5; It is characterized in that, said signal identification module comprise be used to judge the power-on time that saidly receives signal receiving circuit and signaling module that whether synchronous code and address code conform to this machine, when said synchronous code conforms to address code, keep said microprocessor power supply to make the power-on time Postponement module of the coding that it can the said emitter emission of complete reception and be used to judge said microprocessor whether with the power-on time control circuit that reaches setting-up time.
7. wireless transceiver system according to claim 6; It is characterized in that said receiving trap comprises that also being connected said microprocessor has on the input/output end port of arousal function, when it is triggered microprocessor with said receiving trap by the button that wakes up immediately in the sleep state.
CN200910109991A 2009-11-03 2009-11-03 Method for reducing stand-by power consumption of wireless transceiver system and system thereof Expired - Fee Related CN101711052B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN200910109991A CN101711052B (en) 2009-11-03 2009-11-03 Method for reducing stand-by power consumption of wireless transceiver system and system thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN200910109991A CN101711052B (en) 2009-11-03 2009-11-03 Method for reducing stand-by power consumption of wireless transceiver system and system thereof

Publications (2)

Publication Number Publication Date
CN101711052A CN101711052A (en) 2010-05-19
CN101711052B true CN101711052B (en) 2012-10-10

Family

ID=42403805

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200910109991A Expired - Fee Related CN101711052B (en) 2009-11-03 2009-11-03 Method for reducing stand-by power consumption of wireless transceiver system and system thereof

Country Status (1)

Country Link
CN (1) CN101711052B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102065526B (en) * 2010-11-25 2013-07-03 北京合众天恒科技有限公司 Power-saving operation mode of wireless transceiver
CN102625423B (en) * 2011-03-10 2015-06-03 深圳市华奥通通信技术有限公司 Wireless communication system and wake up method thereof
CN102956093A (en) * 2011-08-17 2013-03-06 中兴通讯股份有限公司 Wireless remote control method and system, receiver
CN105188542B (en) 2012-10-08 2019-01-04 卡尔斯特里姆保健公司 Limbs imaging device for cone-beam computed tomography
CN104503860A (en) * 2014-12-31 2015-04-08 深圳市航盛电子股份有限公司 Embedded device low-power-consumption watchdog utilization method
CN104636215B (en) * 2015-03-13 2018-04-20 北京经纬恒润科技有限公司 A kind of hardware watchdog and its application circuit
CN106304295B (en) * 2016-08-31 2019-08-09 杭州鸿雁智能科技有限公司 A kind of wireless telecommunication system that realizing battery supply set power saving and method
CN106708642A (en) * 2016-11-03 2017-05-24 深圳市博巨兴实业发展有限公司 Watch dog timer used for MCU (Microprogrammed Control Unit) chip
CN109150224B (en) * 2017-06-27 2020-09-11 关隆股份有限公司 Wireless signal transceiver and energy-saving control method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1845624A (en) * 2005-04-06 2006-10-11 大唐移动通信设备有限公司 Standby processing method and device for mobile terminal
CN101067790A (en) * 2006-05-04 2007-11-07 Qnx软件操作系统德国有限公司 System excuting a fast boot wake-up

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1845624A (en) * 2005-04-06 2006-10-11 大唐移动通信设备有限公司 Standby processing method and device for mobile terminal
CN101067790A (en) * 2006-05-04 2007-11-07 Qnx软件操作系统德国有限公司 System excuting a fast boot wake-up

Also Published As

Publication number Publication date
CN101711052A (en) 2010-05-19

Similar Documents

Publication Publication Date Title
CN101711052B (en) Method for reducing stand-by power consumption of wireless transceiver system and system thereof
CN101916137B (en) Platform and processor power management
CN100401820C (en) Cellular phone and operational mode switching method thereof
US8108704B2 (en) Method for automatically switching power states
EP2876944A1 (en) Network card device, routing device, system and method for realizing dynamic sleep and wakeup
CN102483706B (en) Information processing device, control method of information processing device
CN101171755A (en) Control of sleep modes in a wireless transceiver
CN101504565A (en) Method for awakening chip module
CN102385531A (en) Apparatus for performing timer management and associated method
CN102542218A (en) Method and system for transmitting radio frequency identification (RFID) data, and hardware platform for RFID label
CN102184445A (en) Electronic tag awakening method and electronic tag
CN105301990A (en) Control system and method thereof
CN103532576A (en) Data transmission method, equipment and system
CN101489029A (en) Set-top box which is multiple remote control encoding mode compatible under standby state and method
CN110865959B (en) Method and circuit for waking up I2C equipment
CN105528241B (en) Electronic device and its operating system awakening method
US8825917B2 (en) Method, system and device for enabling USB data card with USB flash drive function to hibernate
CN100481146C (en) Double processing unit radio remote control circuit and remote control method
CN102956093A (en) Wireless remote control method and system, receiver
CN114169351A (en) Label detection method and device
CN111679730B (en) Processor state control method and device based on FreeRTOS
CN111683398A (en) Low-power-consumption electric energy meter reading method and electric energy meter
CN114116029A (en) Control method, device, equipment and medium for awakening low power consumption of infrared receiver
CN104536840A (en) Watchdog timer and control method thereof
US8183985B2 (en) Method and device for the power-saving operation of RFID data carriers

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20121010

Termination date: 20211103

CF01 Termination of patent right due to non-payment of annual fee