CN101667883A - Method and device for realizing HARQ removal - Google Patents
Method and device for realizing HARQ removal Download PDFInfo
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- CN101667883A CN101667883A CN200810214964A CN200810214964A CN101667883A CN 101667883 A CN101667883 A CN 101667883A CN 200810214964 A CN200810214964 A CN 200810214964A CN 200810214964 A CN200810214964 A CN 200810214964A CN 101667883 A CN101667883 A CN 101667883A
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Abstract
The invention discloses a method and a device for realizing hybrid automatic retransmission request (HARQ) removal. The device for realizing the HARQ removal comprises a bit removing selection module,a second-time speed removing matching module and a first-time speed removing matching module. The bit removing selection module is used for performing bit removing selection for a system bit, a first-route check bit and a second-route check bit respectively and acquiring a reference system bit, a reference first-route check bit and a reference second-route check bit in a serial mode; the second-time speed removing matching module is used for performing the second speed removing matching for the reference system bit, the reference first-route check bit and the reference second-route check bit;and the first-time speed removing matching module is used for performing the first punching speed removing matching for the reference system bit, the reference first-route check bit and the referencesecond-route check bit, which are performed the second speed removing matching. The realization method and the realization device realize the HARQ removing processing and facilitate the effective useof data due to the fact that the processing process is concentrative and highly efficient.
Description
Technical field
The present invention relates to the communications field, particularly, relate to a kind of HARQ removal implementation method and device.
Background technology
At third generation mobile partner plan (3rd Generation partnership project, abbreviate 3GPP as) chnnel coding standard (3GPP TS 25.212) in, the mixing that has provided sending direction retransmits (Hybrid Automatic Retransmission Request automatically, abbreviate HARQ as) handling process, this flow process mainly comprises for the first time rate-matched, rate-matched and bit are selected for the second time.
According to above-mentioned agreement, in the HARQ processing procedure, data after at first will encoding are divided into systematic bits, first via check bit and the second road check bit, then three circuit-switched data are carried out the rate-matched processing first time, rate-matched processing for the second time, bit selection processing respectively.
Wherein, the first rate matching treatment makes input bit and subscriber equipment (UserEquipment, abbreviating UE as) soft buffer capacity is complementary, second rate-matched is handled by punching or repeated operation, and result's (that is high speed descending sharing channel (HS-DSCH) TTI Bit data) of first rate matching treatment and the bit number in high-speed downstream Physical Shared Channel (HS-PDSCH) frame are complementary.During bit select to be handled, the order that writes according to protocol data was the position that earlier systematic bits is write regulation, then with the second road check bit and for the first time check bit write the position of regulation successively.
At present, the HARQ removal processing for receive direction does not have concrete solution as yet.
Summary of the invention
Consider a kind of technology of the needs that exist in the correlation technique to solve the problem that the HARQ removal of receive direction handles and propose the present invention that for this reason, main purpose of the present invention is to provide a kind of HARQ removal implementation method and device, to address the above problem.
According to an aspect of the present invention, provide a kind of HARQ removal implement device.
HARQ removal implement device according to the present invention comprises: go bit to select module, be used for going bit to select to systematic bits, first via check bit and the second road check bit respectively, with serial mode acquisition frame of reference bit, with reference to first via check bit with reference to the second road check bit; For the second time go the rate-matched module, be used for the frame of reference bit, carry out going the second time rate-matched with reference to first via check bit with reference to the second road check bit; For the first time go the rate-matched module, be used for to carried out going for the second time after the rate-matched the frame of reference bit, carry out punching first time with reference to first via check bit with reference to the second road check bit and go rate-matched.
Wherein, go bit to select module further to comprise: first goes bit chooser module, is used for going bit to select to systematic bits; Second goes bit chooser module, is connected to first and goes bit chooser module, is used for going bit to select to first via check bit; The 3rd goes bit chooser module, is connected to second and goes bit chooser module, is used for going bit to select to the second road check bit.
Wherein, for the second time go the rate-matched module further to comprise: the rate-matched submodule is removed in punching, be connected to and for the first time go the rate-matched module, being used for carries out punching second time to the frame of reference bit, with reference to first via check bit with reference to the second road check bit goes rate-matched; Repeat the rate-matched submodule, go the rate-matched submodule to walk abreast with punching and be connected, be used for the frame of reference bit after the serial, repeat rate-matched with reference to first via check bit with reference to the second road check bit.
Preferably, this device also comprises: calling module is used to call punching and removes the rate-matched submodule or repeat the rate-matched submodule.
Preferably, this device also comprises: preserve module, be used to preserve to the frame of reference bit, carry out going for the second time data after the rate-matched with reference to first via check bit with reference to the second road check bit.
Further, this device also comprises: receiver module is used for receiving system bit, first via check bit and the second road check bit, and exports systematic bits, first via check bit and the second road check bit that receives to bit selection module.
According to another aspect of the present invention, provide a kind of HARQ removal implementation method.
HARQ removal implementation method according to the present invention comprises: what will obtain goes bit to select to systematic bits, first via check bit and the second road check bit, with serial mode acquisition frame of reference bit, with reference to first via check bit with reference to the second road check bit; To the frame of reference bit, carry out going rate-matched the second time, obtain current systematic bits, current first via check bit and current the second road check bit with reference to first via check bit with reference to the second road check bit; Go rate-matched to having carried out going for the second time current systematic bits, current first via check bit and current the second road check bit after the rate-matched to carry out the punching first time.
Wherein, at the frame of reference bit, with reference to first via check bit with reference under the situation of total number greater than current systematic bits, current first via check bit and current the second road check bit total number of the second road check bit, rate-matched is gone rate-matched for punching for the second time.
Wherein, at the frame of reference bit, with reference to first via check bit with reference under the situation of total number less than current systematic bits, current first via check bit and current the second road check bit total number of the second road check bit, rate-matched is for repeating rate-matched for the second time.
By means of technique scheme of the present invention, by the data that receive being gone bit select to handle, go for the second time rate-matched to handle and going rate-matched to handle for the first time, realized the HARQ removal processing of receive direction, and processing procedure is concentrated, efficient, is of value to effective utilization of data.
Other features and advantages of the present invention will be set forth in the following description, and, partly from specification, become apparent, perhaps understand by implementing the present invention.Purpose of the present invention and other advantages can realize and obtain by specifically noted structure in the specification of being write, claims and accompanying drawing.
Description of drawings
Accompanying drawing described herein is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Figure 1A is the structured flowchart according to the HARQ removal implement device of apparatus of the present invention embodiment;
Figure 1B is the structured flowchart of HARQ removal implement device according to the preferred embodiment of the invention;
Fig. 2 is the another kind of structured flowchart according to the HARQ removal implement device of apparatus of the present invention embodiment;
Fig. 3 is the process chart according to the HARQ removal implementation method of the inventive method embodiment;
Fig. 4 selects process chart according to the bit that goes of the HARQ removal implementation method of the inventive method embodiment;
Fig. 5 is the concrete process chart of HARQ removal implementation method according to the preferred embodiment of the invention.
Embodiment
Functional overview
As mentioned above, at at present the data of receive direction being carried out the demand that HARQ removal is handled, the present invention proposes a kind of realization mechanism of HARQ removal, wherein, by means of the HARQ removal implementation method, by the data that receive being gone bit select to handle, go for the second time rate-matched to handle and going rate-matched to handle for the first time, realized that the HARQ removal of receive direction is handled.
Describe embodiments of the invention in detail below in conjunction with accompanying drawing.
Device embodiment
According to present embodiment, provide a kind of HARQ removal implement device.
Figure 1A shows the structure according to the HARQ removal implement device of apparatus of the present invention embodiment, and Figure 1B shows the structure of HARQ removal implement device according to the preferred embodiment of the invention.Shown in Figure 1A, comprise that according to the HARQ removal implement device of apparatus of the present invention embodiment bit selects module 10, goes rate-matched module 12 for the second time, goes rate-matched module 14 for the first time.
Describe above-mentioned module below in detail.
Go bit to select module 10, be connected to and go rate-matched module 12 for the second time, be used for going bit to select to systematic bits, first via check bit and the second road check bit respectively, with serial mode acquisition frame of reference bit, with reference to first via check bit with reference to the second road check bit, shown in Figure 1B, go bit to select module 10 may further include:
First goes bit chooser module 100, is used for going bit to select to systematic bits;
Second goes bit chooser module 102, is connected to first and goes bit chooser module 100, is used for going bit to select to first via check bit;
The 3rd goes bit chooser module 104, is connected to second and goes bit chooser module 102, is used for going bit to select to the second road check bit.
For the second time go rate-matched module 12, be used for the frame of reference bit, carry out going the second time rate-matched with reference to first via check bit with reference to the second road check bit; This module selects module 10 to be connected with removing bit, and is connected to and goes rate-matched module 14 for the first time.
Wherein, the data flow of going rate-matched module 12 to receive for the second time may be greater than or less than the data flow of systemic presupposition, like this, will handle respectively both of these case, shown in Figure 1B, goes rate-matched module 12 to may further include again for the second time:
Rate-matched submodule 120 is removed in punching, be connected to and go rate-matched module 14 for the first time, be used in the data flow that receives during, carry out punching second time to the frame of reference bit, with reference to first via check bit with reference to the second road check bit and go rate-matched less than the data flow of systemic presupposition;
Repeat rate-matched submodule 122, be connected to and go rate-matched module 14 for the first time, and, go 120 parallel connections of rate-matched submodule with punching, be used in the data flow that receives during, to the frame of reference bit after the serial, repeat rate-matched with reference to first via check bit with reference to the second road check bit greater than the data flow of systemic presupposition.
In addition, be directed to above-mentioned two kinds of situations, for the second time go rate-matched module 12 when receiving data flow, to judge to the size of data flow, therefore, for the second time go rate-matched module 12 to can further include calling module 124, be used for calling punching and remove rate-matched submodule 120 or repeat rate-matched submodule 122 according to different situations.
Go for the first time rate-matched module 14, with for the second time go rate-matched module 12 to be connected, be used for to carried out going for the second time after the rate-matched the frame of reference bit, carry out punching first time with reference to first via check bit with reference to the second road check bit and go rate-matched.
Shown in Figure 1B, the HARQ removal implement device of present embodiment can further include:
Preserve module 16, be connected to and go rate-matched module 12 for the second time, be used to preserve to the frame of reference bit, carry out going for the second time data after the rate-matched with reference to first via check bit with reference to the second road check bit;
Receiver module 18 is used for receiving system bit, first via check bit and the second road check bit, and exports systematic bits, first via check bit and the second road check bit that receives to bit selection module 10.
By the HARQ removal implement device that present embodiment provides, realized that the HARQ removal of receive direction is handled, and processing procedure is concentrated, efficient, is of value to effective utilization of data.
Fig. 2 shows the another kind of structure according to the HARQ removal implement device of apparatus of the present invention embodiment, as shown in Figure 2, this device comprises: go bit to select module 20, punching to go rate-matched module 22, repeat rate-matched module 24, HARQ control module 26, IRRAM 28.
Go bit to select module 20, select module 10, be connected to HARQ control module 26, be used for going bit to select to systematic bits, first via check bit, the second road check bit successively corresponding to the bit that goes among Figure 1A.
Rate-matched module 22 is gone in punching, removes rate-matched submodule 120 corresponding to the punching among Figure 1B, is connected to HARQ control module 26, is used to the rate adaptation operating of punching.
Repeat rate-matched module 24,, be connected to HARQ control module 26, be used to repeat rate adaptation operating corresponding to repeating rate-matched submodule 122 among Figure 1B.
HARQ control module 26, being connected to bit selects module 20, punching to go rate-matched module 22, repeat rate-matched module 24 and IR RAM 28, be used to control the carrying out of HARQ removal flow process, comprise that bit is selected, go rate-matched the second time and go rate-matched for the first time.
Method embodiment
According to present embodiment, a kind of HARQ removal implementation method is provided, this method can use the HARQ removal implement device shown in Figure 1A to realize.
Fig. 3 shows the handling process according to the HARQ removal implementation method of the inventive method embodiment, and as shown in Figure 3, this processing procedure comprises step S302, step S304 and step S306.
Below above-mentioned steps is elaborated.
Step S302 goes bit to select to systematic bits, first via check bit and the second road check bit that obtains respectively, with serial mode acquisition frame of reference bit, with reference to first via check bit with reference to the second road check bit;
Step S304 to the frame of reference bit, carry out going the second time rate-matched with reference to first via check bit with reference to the second road check bit, obtains current systematic bits, current first via check bit and current the second road check bit;
Particularly, at the frame of reference bit, with reference to first via check bit with reference under the situation of total number greater than current systematic bits, current first via check bit and current the second road check bit total number of the second road check bit, rate-matched is gone rate-matched for punching for the second time; Perhaps, at the frame of reference bit, with reference to first via check bit with reference under the situation of total number less than current systematic bits, current first via check bit and current the second road check bit total number of the second road check bit, rate-matched is for repeating rate-matched for the second time.
Step S306 goes rate-matched to having carried out going for the second time current systematic bits, current first via check bit and current the second road check bit after the rate-matched to carry out the punching first time.
Particularly, above-mentioned processing procedure can be divided into three processing sections that function is different again, comprise: go bit selection processing, go rate-matched to handle (comprise the punching rate matching processing or repeat the rate-matched processing) for the second time and go the first time rate-matched to handle, below these three processing sections are elaborated.
(1) go bit to select to handle
Going bit to select to handle can be corresponding to above-mentioned steps S302, and the major function of this processing section is separated systematic bits, first via checking data, the second road checking data exactly from data flow.
Fig. 4 shows according to the bit that goes of method shown in Figure 3 and selects process chart, and as shown in Figure 4, this handling process may further comprise the steps:
401, remove the bit selection operation when what go bit to select circuit to receive to begin after systematic bits is selected initial signal to carry out systematic bits, if systematic bits go to select to finish, execution in step 405, otherwise, execution in step 402;
402, according to agreement 3GPP TS 25.212, at first the systematic bits in the Nc row is handled, whether interpretation col_cnt less than Nc, when less than the time, execution in step 403, otherwise, execution in step 404;
403, read the capable systematic bits of Nr, the specific implementation method can for: if row_cnt=Nr, row_cnt=0 then, col_cnt+1, otherwise row_cnt+1;
404, the capable systematic bits of Nr-1 outside the Nc row is carried out read operation, the specific implementation method can for: if row_cnt=Nr-1, row_cnt=0 then, col_cnt+1, otherwise row_cnt+1;
405 to 406, entering into first via check bit after systematic bits reads and finishes goes to select to handle, according to agreement 3GPP TS 25.212 regulations, putting in order of check bit is p2, p1, p2, p1..., so, when first via check bit is not finished read operation, the even bit in the check bit is read, up to finishing reading of first via check bit, promptly, judge whether the selection of P1 bit is finished,, then the ordering of the even number in check bit bit is read if do not finish, and up to finishing execution in step 407 after finishing;
407 to 408, after finishing the reading of first via check bit, begin the read operation to the second road check bit, method is similar with first via check bit, only the odd number bit in many check bits reads, that is, judge whether the selection of P2 bit is finished, if do not finish, then the ordering of the even number in check bit bit is read, and, so far, go bit to select handling process to finish up to finishing.
(2) go rate-matched to handle for the second time
Going for the second time rate-matched to handle can be corresponding to above-mentioned steps S304, this processing is used for going bit to select processed data stream to carry out going the second time rate-matched to handle, and this processing can comprise the punching rate matching processing or repeat rate-matched and handle.
Wherein, rate-matched is gone in punching, is used for during less than the data flow of systemic presupposition, finishing the rate adaptation operating of going under the punching rate matching pattern in the data flow that receives, the data of punching are mended 0 operation, data volume is returned to the data volume of going for the first time before the rate-matched;
Repeat rate-matched, be used in the data flow that receives during greater than the data flow of systemic presupposition, finish the rate adaptation operating of going under the repetition rate match pattern,, data volume is returned to data volume before go rate-matched the first time the data that the repeat operation that adds up.
(3) go rate-matched to handle for the first time
Going for the first time rate-matched to handle can be corresponding to above-mentioned steps S306, and this processing is used for going for the second time the rate-matched processed data stream to carry out going the first time rate-matched to handle.
By the method that present embodiment provides, realized that the HARQ removal of receive direction is handled, and processing procedure is concentrated, efficient, is of value to effective utilization of data.
Fig. 5 is the processing schematic diagram of the specific implementation of HARQ removal implementation method according to the preferred embodiment of the invention, and this method can use the HARQ removal implement device shown in Figure 1B to realize, as shown in Figure 5, this processing procedure may further comprise the steps:
501, the first go 100 pairs of data of bit chooser module to go systematic bits to select to handle, and processing finishes the back and sends the sys_bit_over signal, continues execution in step 502;
502, the second go 102 pairs of data of bit chooser module to go first via check bit to select to handle, and processing finishes the back and sends the p1_bit_over signal, continues execution in step 503;
503, the three go 104 pairs of data of bit chooser module to remove the second road check bit selection operation, and processing finishes the back and sends the p2_bit_over signal, continues execution in step 504, enter and go rate-matched to handle for the second time;
504, calling module 124 is compared the data volume that receives after receiving data with the data volume of systemic presupposition, the data volume that receives less than the situation of the data volume of systemic presupposition under execution in step 505, greater than situation under execution in step 506;
505, punching goes 120 pairs of data that receive of rate-matched submodule rate-matched of punching to handle, and processing finishes the back and sends the rm2_over signal, continues execution in step 507, enters to go rate-matched to handle for the first time;
506, repeat 122 pairs of data that receive of rate-matched submodule and repeat the rate-matched processing, processing finishes the back and sends the rm2_over signal, continues execution in step 507, enters the first time and goes rate-matched to handle;
507, go 14 pairs of data that receive of rate-matched module to carry out going the first time rate-matched to handle for the first time, processing finishes the back dateout, and, send the rm1_over signal, so far, processing procedure finishes.
In sum, by means of HARQ removal implementation method provided by the invention and device, by the data that receive being gone bit select to handle, go for the second time rate-matched to handle and going rate-matched to handle for the first time, realized the HARQ removal processing of receive direction, and processing procedure is concentrated, efficient, is of value to effective utilization of data.
The above is the preferred embodiments of the present invention only, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.Within the spirit and principles in the present invention all, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (9)
1. a HARQ removal implement device is characterized in that, comprising:
Go bit to select module, be used for going bit to select to systematic bits, first via check bit and the second road check bit respectively, with serial mode acquisition frame of reference bit, with reference to first via check bit with reference to the second road check bit;
For the second time go the rate-matched module, be used for described frame of reference bit, describedly carry out going the second time rate-matched with reference to first via check bit and described reference the second road check bit;
For the first time go the rate-matched module, be used for to carried out going for the second time after the rate-matched described frame of reference bit, described carry out punching first time with reference to first via check bit and described reference the second road check bit go rate-matched.
2. device according to claim 1 is characterized in that, the described bit that goes selects module further to comprise:
First goes bit chooser module, is used for going bit to select to systematic bits;
Second goes bit chooser module, is connected to described first and goes bit chooser module, is used for going bit to select to first via check bit;
The 3rd goes bit chooser module, is connected to described second and goes bit chooser module, is used for going bit to select to the second road check bit.
3. device according to claim 1 is characterized in that, goes the described second time rate-matched module further to comprise:
The rate-matched submodule is removed in punching, is connected to and goes the rate-matched module the described first time, be used for to described frame of reference bit, described carry out punching second time with reference to first via check bit and described reference the second road check bit go rate-matched;
Repeat the rate-matched submodule, go with described punching that the rate-matched submodule is parallel to be connected, be used for the described frame of reference bit after the serial, describedly repeat rate-matched with reference to first via check bit and described reference the second road check bit.
4. device according to claim 3 is characterized in that, described device also comprises: calling module is used to call described punching and removes rate-matched submodule or the described rate-matched submodule that repeats.
5. device according to claim 1, it is characterized in that, described device also comprises: preserve module, be used to preserve to described frame of reference bit, describedly carry out going for the second time data after the rate-matched with reference to first via check bit and described reference the second road check bit.
6. device according to claim 1, it is characterized in that, described device also comprises: receiver module, be used to receive described systematic bits, described first via check bit and described the second road check bit, and the described systematic bits that will receive, described first via check bit and described the second road check bit export the described bit selection module of going to.
7. a HARQ removal implementation method is characterized in that, comprising:
Go bit to select what obtain to systematic bits, first via check bit and the second road check bit, with serial mode acquisition frame of reference bit, with reference to first via check bit with reference to the second road check bit;
To described frame of reference bit, describedly carry out going rate-matched the second time with reference to first via check bit and described reference the second road check bit, obtain current systematic bits, current first via check bit and current the second road check bit;
Go rate-matched to having carried out going for the second time described current systematic bits, described current first via check bit and described current the second road check bit after the rate-matched to carry out the punching first time.
8. method according to claim 7, it is characterized in that, at described frame of reference bit, with reference to first via check bit with reference under the situation of total number greater than described current systematic bits, described current first via check bit and described current the second road check bit total number of the second road check bit, described second time, rate-matched was gone rate-matched for punching.
9. method according to claim 7, it is characterized in that, at described frame of reference bit, with reference to first via check bit with reference under the situation of total number less than described current systematic bits, described current first via check bit and described current the second road check bit total number of the second road check bit, described second time, rate-matched was for repeating rate-matched.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103248454A (en) * | 2012-02-10 | 2013-08-14 | 展讯通信（上海）有限公司 | Decoding method, decoding device and communication terminal in communication system |
| CN110190934A (en) * | 2019-06-18 | 2019-08-30 | 普联技术有限公司 | A kind of method and apparatus of data punching |
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2008
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103248454A (en) * | 2012-02-10 | 2013-08-14 | 展讯通信（上海）有限公司 | Decoding method, decoding device and communication terminal in communication system |
| CN103248454B (en) * | 2012-02-10 | 2016-04-06 | 展讯通信（上海）有限公司 | Coding/decoding method in communication system and decoding device, communication terminal |
| CN110190934A (en) * | 2019-06-18 | 2019-08-30 | 普联技术有限公司 | A kind of method and apparatus of data punching |
| CN110190934B (en) * | 2019-06-18 | 2022-02-18 | 普联技术有限公司 | Data punching method and equipment |
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Application publication date: 20100310 |