CN101661712A - Color sequence displayer and correlative electricity-saving method - Google Patents
Color sequence displayer and correlative electricity-saving method Download PDFInfo
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Abstract
The invention relates to a color sequence displayer and a correlative electricity-saving method. In order to further reduce the power consumption of the color sequence displayer, the frame rate or thefield rate is reduced according to the conditions that pictures received by the color sequence displayer are dynamic or static, the color sequence displayer whether opens a backlight mode, and the like. Besides more, image data also can be selectively outputted by means of color image or gray scale, so as to reduce the outputted data volume.
Description
Technical field
The present invention discloses a kind of color sequence displayer and correlative electricity-saving method, refers to especially whether a kind of backlight mode according to this color sequence displayer is opened and judges how to downgrade frame rate and color sequence displayer and correlative electricity-saving method that image data is exported with colour or GTG mode according to the picture that is received for dynamic or static state.
Background technology
General color sequence displayer is when showing the picture of being made up of many picture elements (Frame), can the sub-picture element that adhere to different colours in each picture element separately is separated, and assisting by color sequence time control circuit (Color Sequential Timing Controller), switch and show the sub-picture element (Sub-pixel) that belongs to different colours, be unlikely to be found the quick switching that shows sub-picture element in order to the phenomenon with the human eye persistence of vision demonstrates the required shades of colour of picture, wherein color sequence time control circuit is the picture element display timing generator that is used for controlling on the display panel that color sequence displayer comprises.General color sequence displayer does not use color filter (Color Filter), so the penetration of panel (Transmittance) can significantly improve; Yet under the condition of not using color filter, the not homochromy figure field that is (for example adhering to the difference figure field of red green blue tricolor separately) must be exported with timesharing and mode in regular turn, reach the purpose that shows full-color picture in order to persistence of vision phenomenon with human eye.In general color sequence displayer, in order to transmit image data fast with colour (Color Image) expression, need between the image processing end of color sequence displayer and color sequence time control circuit, provide a large amount of transmitting bandwidths, make required sub-picture element to be shown on the display panel by correspondence via color sequence time control circuit fast with bus.In addition, for each picture, the dynamically branch of (Dynamic) and static (Static) is also arranged.Concerning user's vision finding of color sequence displayer, dynamic menu and tableaux be picture intensity of variation in a period of time at interval respectively, wherein the intensity of variation of dynamic menu in this time interval is bigger, and the intensity of variation of tableaux in this time interval is less or be close in without any variation; And concerning color sequence displayer itself, if under the condition of keeping certain quality of image when viewing and admiring, can effectively reach the mechanism of power saving, dynamic menu and tableaux need height difference to some extent on picture update rate (Frame Rate), wherein dynamic menu need be high picture update rate than tableaux, and the required picture transfer rate of tableaux is lower.
Summary of the invention
The present invention discloses a kind of electricity saving method that is used for color sequence displayer.It is to be static (Static) or dynamic (Dynamic) that this method comprises the received picture of an image processing end of judging this color sequence displayer; Judge whether this color sequence displayer opens a backlight mode; Whether reach according to this picture is to be unlocked for static or dynamic, this backlight mode, downgrade employed one first frame rate of an image engine (Graphics Engine) that this image processing end is comprised, and downgrade one second frame rate of this color sequence displayer output picture.
The present invention discloses a kind of color sequence displayer.This color sequence displayer comprises an image processing end and a display end.This image processing end is to comprise an image dynamic detection unit and a frame rate control module.This image dynamic detection unit is that to be used for detecting a image that this color sequence displayer receives be to be static or dynamically.This frame rate control module is whether the result and this color sequence displayer that are used for detecting according to this image dynamic detection unit this image open a backlight mode, downgrades one first frame rate of the image engine that this color sequence displayer comprises.This display end is to comprise an image I/O control module and a driving control unit.This image I/O control module is to be used for whether opening this backlight mode and this first frame rate according to this color sequence displayer, downgrades employed one second frame rate when reading image data.This driving control unit is to be used for controlling a data-driven unit that this color sequence displayer comprises, one scan driver element, and the sequential of a light emitting diode driver element according to this image data that this image I/O control module is read.This data-driven unit and this scan drive cell are the picture element display modes that is used for controlling on the panel that this color sequence displayer comprises, and this light emitting diode driver element is whether the backlight mode that is used for controlling the backlight module that this color sequence displayer comprises is opened.
The present invention discloses a kind of electricity saving method that is used for color sequence displayer.This method comprises judges that the received picture of an image processing end that this color sequence displayer comprises is for static or dynamic; Judge whether this color sequence displayer opens a backlight mode; The image data that this picture comprised is converted to the sub-picture element data group of a plurality of representative different colours; And according to this picture be for static or dynamically, whether this backlight mode be unlocked, and downgrades this image processing end employed separately figure field rate (Field Rate) when transmitting the sub-picture element data of this plural number group.
The present invention discloses a kind of color sequence displayer.This color sequence displayer comprises an image dynamic detection unit, a figure field rate control module, a monochromatic colour output unit, reaches a colour to the GTG converting unit.This image dynamic detection unit is that to be used for detecting a image that this color sequence displayer receives be to be static or dynamically.This figure field rate control module is to be used for detecting according to this image dynamic detection unit the result of this image, downgrades this image processing end employed separately figure field rate when transmitting the sub-picture element data of this plural number group.This monochrome colour output unit is to be used for when this color sequence displayer is opened a backlight mode, and the image data that this picture comprised is converted to a plurality of first sub-picture element data group, and exports this plural number picture element data group according to the preface of filling in colors on a sketch in advance.This colour to GTG converting unit is to be used for when this color sequence displayer is not opened this backlight mode, optionally should a plural number picture element data group represent, and export this plural number picture element data group according to this preface of filling in colors on a sketch in advance by being converted in the GTG mode in the colour mode.The image data that this monochrome colour output unit and this colour are exported to the GTG converting unit is all received by a bus and is transmitted.
Description of drawings
Fig. 1 is the synoptic diagram according to the disclosed color sequence displayer of one first embodiment of the present invention, and this color sequence displayer is to carry out reading and importing image data in the mode of detecting frame rate.
Fig. 2 is in the disclosed electricity saving method of the present invention, be applied to image engine shown in Figure 1 and color sequence time control circuit electricity saving method step synoptic diagram.
Fig. 3 is the synoptic diagram according to the disclosed color sequence displayer of one second embodiment of the present invention, and this color sequence displayer is to notify the mode of color sequence time control circuit to carry out reading and writing image data with direct generation frame rate controlling signal.
Fig. 4 is the synoptic diagram according to the disclosed color sequence displayer of one the 3rd embodiment of the present invention, this color sequence displayer is classification and the ordering of finishing in advance each sub-picture element data group at display end, the sub-picture element data group that makes color sequence time control circuit directly to transmit to finish ordering.
Fig. 5 is an a third embodiment in accordance with the invention, electricity saving method of the present invention is applied to the process flow diagram of color sequence displayer shown in Figure 4.
[primary clustering symbol description]
| 100、300、400 | |
| 110、310、410 | |
| 120、420 | Color sequence time control circuit |
| 122、322 | |
| 124 | DCU data control unit |
| 126 | |
| 128 | |
| 130 | The data-driven |
| 132 | |
| 134 | |
| 136 | The light emitting |
| 138 | Backlight module |
| 140、??142 | Memory buffer |
| R | Red sub-picture element memory buffer |
| G | Green sub-picture element memory buffer |
| B | Blue sub-picture |
| 144 | The frame |
| 146 | Image I/ |
| 150、450 | The |
| 152 | |
| 154 | |
| 156、456 | The |
| 160、460 | |
| 164 | |
| 170 | The colour output unit |
| 172 | Colour is to the |
| 174 | |
| 176 | The image |
| 178 | The frame |
| 180 | Bus |
| 478 | Figure rate control module |
| 470 | Monochromatic colour output unit |
| 202-222、502-512 | Step |
Embodiment
In the middle of instructions and follow-up claim, used some vocabulary to censure specific assembly.The person with usual knowledge in their respective areas should understand, and same assembly may be called with different nouns by manufacturer.This instructions and follow-up claim are not used as distinguishing the mode of assembly with the difference of title, but the benchmark that is used as distinguishing with the difference of assembly on function.Be to be an open term mentioned " comprising " in the middle of instructions and the follow-up request item in the whole text, so should be construed to " comprise but be not limited to ".In addition, " electric connection " speech is to comprise any indirect means that are electrically connected that directly reach at this.Therefore, be electrically connected at one second device, then represent this first device can be directly connected in this second device, or be connected to this second device indirectly through other device or connection means if describe one first device in the literary composition.
The present invention is the electricity saving method and relevant color sequence displayer that discloses several color sequence displayers, and can further reduce consumed power and transmitting bandwidth compared to the described general color sequence displayer of prior art; In addition, when the disclosed electricity saving method of the present invention and color sequence displayer are applied to the Portable color sequence displayer, can further prolong the service time of Portable color sequence displayer.In disclosed electricity saving method of the present invention and color sequence displayer, be so that this color sequence displayer is transferred to employed one first frame rate of a display end/figure rate with image data by an image processing end, or this display end employed one second frame rate is (in other words when reading image data by a memory buffer, this image processing end is with frame rate or represents the figure field rate of different colours in the single picture frame to transmit data, and this display end is to read image data with the figure field rate corresponding to different colours), considering dynamically/force to be reduced under the different condition that whether tableaux or backlight mode are opened different types of critical frame rate/critical graph field rate or even this critical frame rate/below the rate of critical graph field, the transmitting bandwidth and the power that are consumed with reduction.The present invention also considers with the backlight mode of color sequence displayer in addition, with image data with colour or optionally transmit and show in the GTG mode, employed data volume when reducing image data displaying.
See also Fig. 1, it is the synoptic diagram according to the disclosed color sequence displayer 100 of one first embodiment of the present invention.As shown in Figure 1, color sequence displayer 100 is to comprise a display end 110 and an image processing end 150.Between display end 110 and the image processing end 150 is to be electrically connected mutually with a bus 180, makes image processing end 150 and display system 110 to transmit various image datas and other comprise the controlling signal of frequency or sync signal by bus 180.
Color sequence time control circuit 120 be used for control data driver element 130, scan drive cell 132, and light emitting diode driver element 134 drive the transistor of control separately or the sequential of light emitting diode.Memory buffer 140 and 142 is that to be used for being used as color sequence time control circuit 120 be that unit reads or write fashionable memory buffer with sub-picture element.Color sequence time control circuit 120 comprises an input buffer storage 122, a DCU data control unit 124, a driving control unit 126, reaches a receiver 128.Receiver 128 is to be used for receiving the image data that sends via bus 180 or signal etc.Input buffer storage 122 be used for image data that image engine 160 is imported and outside input color sequence time control circuit 110 a synchronous signal, and a system frequency of color sequence time control circuit 110 make synchronous processing; In addition, also ordering is to different sub-picture element data group in each picture element classification that input buffer storage 122 comprises in also can the image data with image engine input, and wherein each sub-picture element data group is corresponding to different types of sub-picture element; In a preferred embodiment of the present invention, color sequence displayer 100 shown sub-picture element kinds comprise redness, green, with blue sub-picture element.Input buffer storage 122 comprises a frame rate detecting unit 144, is used for detecting the first frame rate FR1 that frame rate control module 178 is controlled.DCU data control unit 124 comprises an image I/O control module 146, be used for and memory buffer 140 and 142 operate together, and downgrade according to the first frame rate FR1 that frame rate control module 178 is controlled and memory buffer 140 or 142 to be carried out image data employed one second frame rate FR2 is (in other words when reading, be equal to according to picture be for static or dynamically, whether open the basis that condition such as backlight mode is used as downgrading frame rate), and control writes memory buffer 140 or 142 image datas that carried out in addition.Driving control unit 126 is used for coming control data driver element 130, scan drive cell 132, and the sequential of light emitting diode driver element 136 according to the image data that image I/O control module 146 is read.Please note, the first frame rate FR1 must be higher than the second frame rate FR2, this is the necessary process earlier of the image data buffered that transfers to display end 110 because of image processing end 150, carry out the output of image data by driving control unit 126 again, so need lower frame rate when buffering.
The present invention is as described below at color sequence displayer shown in Figure 1 100 employed electricity saving methods.When primary processor 152 and chipset 154 produce a picture on image engine 160, image dynamic detection unit 176 can this picture of detecting be to be a static state (Static) image or dynamic (Dynamic) picture, and next frame rate control module 178 can be controlled the image engine 160 employed first frame rate FR1 according to the result of image dynamic detection unit 176 detectings.
The mode of the frame rate control module 178 control first frame rate FR1 be comprise as follows: (1) when this picture be for dynamically, and color sequence displayer 100 is when opening backlight mode, the first frame rate FR1 to be downgraded the critical frame rate FR1_1 of one first image processing end; (2) when this picture be for dynamically, and color sequence displayer 100 is not when opening backlight mode, this first frame rate downgraded the critical frame rate FR1_2 of one second image processing end or below the critical frame rate FR1_2 of the second image processing end; And (3) downgrade the critical frame rate FR1_3 of one the 3rd image processing end when this picture is to be static state with the first frame rate FR1.Wherein, the critical frame rate FR1_1 of the first image processing end is higher than the critical frame rate FR1_2 of the second image processing end, and the critical frame rate FR1_2 of the second image processing end is higher than the critical frame rate FR1_3 of the 3rd image processing end, critical frame rate FR1_1 of the first image processing end and the critical frame rate FR1_2 of the second image processing end are all greater than zero, and the critical frame rate FR1_3 of the 3rd image processing end is not less than zero.The definition of each critical frame rate described herein is when having used lower other frame rate of more above-mentioned critical frame rate, and the shown picture that comes out can produce the phenomenon of unfavorable display qualities such as flicker.
In first kind of mode, this picture is for dynamically, and color sequence displayer 100 is to open backlight mode, therefore color sequence displayer 100 needs higher critical frame rate to keep the display quality of dynamic menu, and therefore the critical frame rate FR1_1 of the first image processing end is critical frame rate the highest among the three.And in the second way, this picture is for dynamically, and color sequence displayer 100 do not open backlight mode, therefore can use the display quality of keeping dynamic menu than first kind of lower slightly critical frame rate of mode; Also comprise the critical frame rate that can use in the second way than below the critical frame rate FR1_2 of the second image processing end, this is because of under the state of not opening at backlight mode, even scintillation occurs because frame rate is not enough, also can not discovered by naked eyes easily, but display quality still slightly is inferior to the state when using the critical frame rate FR1_2 of the second image processing end.In the third mode, this picture is to be static state, no matter and backlight mode whether unlatching is arranged, all use among the three the minimum critical frame rate FR1_3 of the 3rd image processing end, this is not keep its display quality because of tableaux itself does not need higher frame rate; Yet, continue to read under the situation of fixed image the critical frame rate FR1_3 of the 3rd image processing end even the hertz that can equal zero in the memory buffer 140 or 142 of utilizing display end 110.Critical frame rate FR1_1 of the first image processing end and the critical frame rate FR1_2 of the second image processing end are to be can not think zero for the frame rate that the transmission dynamic menu is used greater than zero reason all, otherwise the dynamic menu display quality can variation.
In addition, when color sequence displayer 100 is not opened backlight mode, also optionally select to look like to export picture or after GTG converting unit 172 transfers picture to GTG, export picture with full color in the GTG mode by colour by colour output unit 170 with multiplexer 174.When color sequence displayer 100 is exported picture with full color as mode, owing to downgraded the first frame rate FR1, therefore existing power saving effect to a certain degree, yet when color sequence displayer 100 is exported picture in the GTG mode, since the GTG mode export the needed data volume of picture with full color as lacking that mode is come, therefore can reduce the data rate of image processing end 150, and further reach power saving effect of the present invention by this.
The mode of the image I/O control module 146 control second frame rate FR2 is to be listed below: (1) when this picture be for dynamically, and color sequence displayer 100 is when opening this backlight mode, the second frame rate FR2 to be downgraded the critical frame rate FR2_1 of one first display end; (2) when this picture be for dynamically, and color sequence displayer 100 is when not opening this backlight mode, the second frame rate FR2 downgraded the critical frame rate FR2_2 of one second display end or below the critical frame rate FR2_2 of second display end; (3) when this picture be to be static state, and color sequence displayer 100 is when opening this backlight mode, the second frame rate FR2 to be downgraded the critical frame rate FR2_3 of one the 3rd display end; And (4) when this picture be to be static state, and color sequence displayer 100 is when closing this backlight mode, and the second frame rate FR2 is downgraded the critical frame rate FR2_4 of one the 4th display end.Wherein the critical frame rate FR2_1 of first display end is higher than the critical frame rate FR2_2 of second display end, the critical frame rate FR2_3 of the 3rd display end, and the critical frame rate FR2_4 of the 4th display end, and the critical frame rate FR2_2 of second display end and the critical frame rate FR2_3 of the 3rd display end all are higher than the critical frame rate FR2_4 of the 4th display end.The critical frame rate FR2_4 of the 4th display end is all greater than zero.
Note that the critical frame rate of each display end described herein is to be used for image I/O control module 146 to be read image data and this image data is transferred to the usefulness of driving control unit 126 with show image by memory buffer 140 or 142.It is because open the higher frame rate of backlight mode needs that the critical frame rate FR2_1 of first display end is higher than the critical frame rate FR2_2 of second display end, and the critical frame rate FR2_1 of first display end to be higher than the critical frame rate FR2_3 of the 3rd display end be because of the dynamic image frame rate higher than the static image needs.In like manner, the critical frame rate FR2_4 of the 4th display end is because be that tableaux is not opened backlight mode again, and therefore only needing than the critical frame rate FR2_2 of second display end and the critical frame rate FR2_3 of the 3rd display end is that low frame rate carries out getting final product for the output of the image data of display panel 134.In addition, when the picture of decidable as a result via the frame rate detecting unit 144 detecting first frame rate FR1 is during for static state, image I/O control module 146 is to come read buffer memory 140 or 142 stored stabilized image data according to the preface of filling in colors on a sketch in advance.This preface of filling in colors on a sketch in advance can comprise employed look preface when using RGBW or RGBG scheduling algorithm, and formed other embodiment of variation that this preface of filling in colors on a sketch is in advance carried out on any output look preface must be considered as category of the present invention.
In like manner, when color sequence displayer 100 is exported picture in the GTG mode, since the GTG mode export the needed data volume of picture with full color as lacking that mode is come, so the data volumes of memory buffer 140 and 142 processing also can tail off, and become one of main cause of reaching power saving effect of the present invention.
Please note, as described before, input buffer storage 122 can be categorized into received image data a plural number picture element data group, and in a preferred embodiment of the present invention, the sub-picture element data of this plural number group comprises a red sub-picture element data group, a green sub-picture element data group and a blue sub-picture element data group; As shown in Figure 1, in a preferred embodiment of the present invention, memory buffer 140 and 142 each self-contained one red sub-picture element memory buffer R, a green sub-picture element memory buffer G, an and blue sub-picture element memory buffer B, this a little picture element memory buffer is to be used for the temporary sub-picture element data group that is subordinate to different colours.The frame rate that image I/O control module 146 can be detected according to frame rate detecting unit 144, with sub-picture element be unit read or write buffering memory 140 and 142 in different sub-picture element data group.When color sequence displayer 100 carries out normal operation, at one time in, image I/O control module 146 can be at least one carries out reading of sub-picture element in memory buffer 140 and 142, and another is carried out writing of sub-picture element.
Please note, in other embodiments of the invention, the memory buffer quantity that reads or write of carrying out sub-picture element jointly with image I/O control module 146 is not limited to two memory buffer as shown in Figure 1, and shown in Figure 1 only be a preferred embodiment of the present invention.Note that and read and write fashionable that the sub-picture element that reads or write is the expression mode when having exported according to image engine 160 and representing with colour or GTG mode when what 146 pairs of memory buffer 140 of image I/O control module and 142 were carried out sub-picture element.
At last, driving control unit 126 can be according to coming the opening of plurality of transistors on control data driver element 130 and 132 pairs of display panels 134 of scan drive cell by DCU data control unit 124 (meaning is promptly by image I/O control module 146) the sub-picture element image data that is read out, to carry out corresponding demonstration according to these sub-picture elements that are read out and look preface method on display panel 134.
See also Fig. 2, it is in the disclosed electricity saving method of the present invention, be applied to image engine shown in Figure 1 160 and color sequence time control circuit 110 electricity saving method step synoptic diagram.
As shown in Figure 2, the step of electricity saving method of the present invention comprises as follows:
Step 202: the received picture of an image processing end of judging a color sequence displayer is for static or dynamic, and judges whether this color sequence displayer opens a backlight mode; When this picture is for dynamically, and this backlight mode is when opening, execution in step 204; When this picture is for dynamically, and this backlight mode is when closing, execution in step 206; When this picture is during for static state, execution in step 208;
Step 204: the first frame rate FR1 is adjusted into the critical frame rate FR1_1 of one first image processing end, and execution in step 210;
Step 206: the first frame rate FR1 is adjusted into the critical frame rate FR1_2 of one second image processing end, and execution in step 210;
Step 208: the first frame rate FR1 is adjusted into the critical frame rate FR1_3 of one the 3rd image processing end, and execution in step 210;
Step 210: optionally change image data into transfer to color sequence displayer in the GTG mode by the image processing end a display end by the colour mode, and execution in step 212;
Step 212: this display end judges that according to the first frame rate FR1 picture that is received is for static or dynamic, and judges whether this color sequence displayer opens backlight mode; When this picture is for dynamically, and this backlight mode is when opening, execution in step 214; When this picture is for dynamically, and this backlight mode is when closing, execution in step 216; When this picture is to be static state, and this backlight mode is when opening, execution in step 218; When this picture is to be static state, and this backlight mode is when closing, execution in step 220;
Step 214: the second frame rate FR2 is adjusted into the critical frame rate FR2_1 of one first display end;
Step 216: the second frame rate FR2 is adjusted into the critical frame rate FR2_2 of one second display end;
Step 218: the second frame rate FR2 is adjusted into the critical frame rate FR2_3 of one the 3rd display end, and execution in step 222;
Step 220: the second frame rate FR2 is adjusted into the critical frame rate FR2_4 of one the 4th display end, and execution in step 222;
Step 222: read out the stabilized image data by memory buffer.
Please note, the execution sequence of each step only is a preferred embodiment of the present invention in the process flow diagram shown in Figure 2, so other process flow diagram embodiment that is derived is arranged or made up to each step shown in the 2nd figure, or other embodiment that other mentioned in the relevant narration of Fig. 1 restrictive condition adding process flow diagram shown in Figure 2 is formed, must be considered as category of the present invention.
See also Fig. 3, it is the synoptic diagram according to the disclosed color sequence displayer 300 of one second embodiment of the present invention.Color sequence displayer 100 shown in color sequence displayer 300 and the 1st figure is similar, the difference place only is not use the frame rate circuit for detecting on color sequence time control circuit, directly control the frequency that 146 pairs of display panels 134 of image I/O control module upgrade but change the frame rate control module 178 that is comprised by image engine 160.In order to distinguish color sequence displayer 100 and 300, the display end that color sequence displayer 300 is comprised is to be display end 310, the color sequence time control circuit that display end 310 is comprised is to be color sequence time control circuit 320, and the input buffer storage that color sequence time control circuit comprises is to be input buffer storage 322.Further, frame rate control module 178 provides one first frame rate FC1 to image processing end 150, so that image processing end 150 is according to the interface transfer rate of first frame rate FC1 control for display end 310, frame rate control module 178 also directly provides one second frame rate FC2 to image I/O processing unit 146 simultaneously, so that image I/O control module 146 frequency that control is upgraded display panel 134 according to the second frame rate FC2.Person very, the present invention according to another embodiment that Fig. 3 provided in, frame rate control module 178 is directly to provide controlling signal to image I/O processing unit 146, makes image I/O processing unit 146 can produce the second above-mentioned frame rate FR2 according to this.
In addition, but also application drawing 2 disclosed electricity saving methods of color sequence displayer 300, to reach the effect identical with color sequence displayer 100.
See also Fig. 4, it is the synoptic diagram according to the disclosed color sequence displayer 400 of one the 3rd embodiment of the present invention.As shown in Figure 4, color sequence displayer 400 is similar with color sequence displayer 200 and 300, but has different slightly in the mode of sub-picture element transmission image data with color sequence displayer 200 and 300.Color sequence displayer 400 and first difference of 200 and 300 are in not using memory buffer and DCU data control unit (also not using image I/O control module), and second difference place is for replacing colour output unit 170 with a monochromatic colour output unit 470, and replace in view of the above in the input buffer storage originally picture element, and provide this a plurality of different sub-picture element data group is inputed to the function of display end with the preface of filling in colors on a sketch in advance via bus 180 according to the different kind classification of sub-picture element color and ordering function for a plural number picture element data group.In addition, employed frame rate control module 178 also is replaced by figure field rate (Field Rate) control module 478 originally, is used for controlling color sequence time control circuit 420 employed figure field rate FF.In order to distinguish color sequence displayer 400 and 200 and 300, the display end that color sequence displayer 400 is comprised is to be display end 410, also is a display end of color sequence displayer 400; The color sequence time control circuit that display end 410 comprises is to be color sequence time control circuit 420; The image processing end that color sequence displayer 400 comprises is to be image processing end 450; The image adapter that image processing end 450 comprises is to be image adapter 456; The image engine that image adapter 456 is comprised is to be image engine 460.
When image engine 460 receives image, can be directly produce the sub-picture element data of the plural number of classifying group to the GTG converting unit 172 according to the different colours of sub-picture element at monochromatic colour output unit 470 and colour, and with the ordering of preface when exporting the sub-picture element data group of this plural number of filling in colors on a sketch in advance, the output in regular turn of for example above-mentioned red sub-picture element data group, green sub-picture element data group, blue sub-picture element data group etc.Figure rate control module 478 can be to be static or dynamic result according to image dynamic detection unit 176 detecting images, is for dynamically or static and whether open the figure field rate FF that a backlight mode downgrades each sub-picture element data group according to color sequence displayer 400 with the figure field rate FF under each sub-picture element data group according to the picture that is received.The mode that figure field rate control module 478 downgrades figure field rate FF is identical with mode and the principle that the described image I/O of Fig. 1 control module 146 downgrades the second frame rate FR2, only simply be listed below herein: (1) when this picture be for dynamically, and color sequence displayer 400 is when opening this backlight mode, will scheme a rate FF and downgrade one first image processing end critical graph field rate FF_1; (2) when this picture be for dynamically, and color sequence displayer 400 is when not opening this backlight mode, will scheme that a rate FF downgrades one second image processing end critical graph field rate FF_2 or below the second display end critical graph field rate FF_2; (3) when this picture be to be static state, and color sequence displayer 400 is when opening this backlight mode, will scheme a field rate FF and downgrade one the 3rd image processing end critical graph field rate FF_3; And (4) when this picture be to be static state, and color sequence displayer 400 is when closing this backlight mode, will scheme a field rate FF and downgrade one the 4th image processing end critical graph field rate FF_4.In above-mentioned four kinds of adjustment, figure rate FF is all still greater than zero at last.The first image processing end critical graph field rate FF_1 is higher than the second image processing end critical graph field rate FF_2 and the 3rd image processing end critical graph field rate FF_3, and the second image processing end critical graph field rate FF_2 and the 3rd image processing end critical graph field rate FF_3 all are higher than the 4th image processing end critical graph field rate FF_4.In other words, the first image processing end critical graph field rate FF_1, the second display end critical graph field rate FF_2, the 3rd image processing end critical graph field rate FF_3, with the critical frame rate FF_4 of the 4th display end be all greater than zero.
Please note, narration with Fig. 1, in color sequence displayer 400, can also multiplexer 174 optionally determine to export the image data that GTG mode that full color that monochromatic colour output unit 470 produced produced to GTG converting unit 172 as image data or output colour is represented, and both difference only in the data volume of the image data of exporting in the GTG mode than full color as lacking that image data comes, so can further reach the effect of power saving.In addition, because arranging the output look preface of each sub-picture element data group in advance with the above-mentioned preface of filling in colors on a sketch in advance, image engine 460 finishes, so, color sequence time control circuit 420 can be under the situation that does not need antithetical phrase picture element data group to sort the sequential and the running of control data driver element 130 and scan drive cell 132 smoothly.
See also Fig. 5, it is an a third embodiment in accordance with the invention, electricity saving method of the present invention is applied to the process flow diagram of color sequence displayer shown in Figure 4 400.As shown in Figure 5, electricity saving method of the present invention is to comprise following steps:
Step 502: the received picture of an image processing end of judging a color sequence displayer is for static or dynamic, and judges whether a color sequence displayer opens a backlight mode; When this picture is for dynamically, and this color sequence displayer is when opening this backlight mode, execution in step 504; When this picture is for dynamically, and this color sequence displayer is when closing this backlight mode, execution in step 506; When this picture is to be static state, and this color sequence displayer is when opening this backlight mode, execution in step 508; When this picture is to be static state, and this color sequence displayer is when closing this backlight mode, execution in step 510;
Step 504: will scheme a rate FF and downgrade one first image processing end critical graph field rate FF_1, and execution in step 512;
Step 506: when this picture is for dynamically, and color sequence displayer 400 is when not opening this backlight mode, will scheme that a rate FF downgrades one second image processing end critical graph field rate FF_2 or below the second display end critical graph field rate FF_2, and execution in step 512;
Step 508: when this picture is to be static state, and color sequence displayer 400 is when opening this backlight mode, will scheme a field rate FF and downgrade one the 3rd image processing end critical graph field rate FF_3, and execution in step 512;
Step 510: when this picture is to be static state, and color sequence displayer 400 is when closing this backlight mode, will scheme a rate FF and downgrade one the 4th image processing end critical graph field rate FF_4, and execution in step 512;
Step 512: optionally with full color as mode or GTG mode image output data a display end to this color sequence displayer.
Please note, the execution sequence of each step only is a preferred embodiment of the present invention in the process flow diagram shown in Figure 5, so other process flow diagram embodiment that is derived is arranged or made up to each step shown in Figure 5, or, must be considered as category of the present invention with the disclosed relevant limit condition adding of above the present invention other embodiment that Fig. 5 produced.
The present invention discloses several to be used for the electricity saving method of color sequence displayer and relevant color sequence displayer.Electricity saving method of the present invention mainly is by judging that a picture that institute receives and transmit is an employed frame rate or scheme a field rate when downgrading the transmission image data for dynamic menu or tableaux, and whether open to select whether to transmit according to the backlight mode of color sequence displayer and take the less grey-tone image of frequency range, the power that effectively reduces color sequence displayer and consumed; When the color sequence displayer of using electricity saving method of the present invention does not need to play dynamic image, this color sequence displayer is to be for dynamic or static according to the picture that is received, or whether open according to a backlight mode of this color sequence displayer, downgrade its frame rate or a figure rate; And when receiving tableaux by continuing to read fixing static image in the memory buffer, make color sequence time control circuit not need additionally to read again at this moment the dynamic image that other can change, and save the frequency range and the consumed power of color sequence displayer itself.Moreover when electricity saving method of the present invention was used to implement the Portable color sequence displayer, low frequency range that is brought and low power consumption also can further prolong the service time of Portable color sequence displayer when not having extraneous power supply to supply with.Disclosed general color sequence displayer in the prior art, disclosed electricity saving method of the present invention and color sequence displayer can reduce the data processing amount of image processing end and simplify the image processing complexity, and reduce image processing end and display end itself or the power consumption on interface between the two by reducing employed frame rate of transmission or the employed figure of reading of data field rate.Moreover the present invention is the relevant electricity-saving mechanism of color sequential display, but is equipped with the image processing end of color filter plate (Color Filter) also can reach similar electricity-saving mechanism by the reload buffer storer in its driving circuit in tradition; The main cause that the present invention is equipped with the image processing end of color filter plate more can reach power saving effect compared to this kind tradition all can significantly be reduced for the data processing operation/transmission quantity of image processing end in its display chip group.
The above only is preferred embodiment of the present invention, and all equalizations of being done according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.
Claims (24)
1. electricity saving method that is used for color sequence displayer is characterized in that comprising:
The received picture of an image processing end of judging this color sequence displayer is to be static (Static) or dynamic (Dynamic);
Judge whether this color sequence displayer opens a backlight mode; And
Whether according to this picture is to be unlocked for static or dynamic, this backlight mode, downgrade employed one first frame rate of an image engine (Graphics Engine) that this image processing end is comprised, and downgrade one second frame rate of this color sequence displayer output picture.
2. the electricity saving method that is used for color sequence displayer according to claim 1 is characterized in that: wherein this second frame rate is that the memory buffer that comprises by this color sequence displayer is used when reading image data.
3. the electricity saving method that is used for color sequence displayer according to claim 1 is characterized in that:
Be whether to be unlocked wherein for static or dynamic, this backlight mode according to this picture, downgrade employed this first frame rate of this image engine that this image processing end is comprised, and downgrade this memory buffer that this color sequence displayer comprises employed this second frame rate when reading image data, be to comprise to read or to write this image data:
When this picture is for dynamically, and this backlight mode is when being unlocked, and this first frame rate is downgraded the critical frame rate of one first image processing end;
When this picture is for dynamically, and this backlight mode is not when being unlocked, and this first frame rate downgraded the critical frame rate of one second image processing end or below the critical frame rate of this second image processing end; And
When this picture is to be static state, this first frame rate is downgraded the critical frame rate of one the 3rd image processing end;
Wherein the critical frame rate of this first image processing end is to be higher than the critical frame rate of this second image processing end, and the critical frame rate of this second image processing end is to be higher than the critical frame rate of the 3rd image processing end;
Wherein this critical frame rate of first image processing end and the critical frame rate of this second image processing end are neither less than zero.
4. the electricity saving method that is used for color sequence displayer according to claim 3 is characterized in that comprising in addition:
When this color sequence displayer was opened this backlight mode, this image engine transmitted image data in the colour mode;
When this color sequence displayer was not opened this backlight mode, this image engine transmitted image data with GTG mode or colour mode.
5. the electricity saving method that is used for color sequence displayer according to claim 1 is characterized in that:
Wherein according to this picture be for static or dynamically, whether this backlight mode be unlocked, and downgrades employed this first frame rate of this image engine that this image processing end is comprised, and to downgrade employed this second frame rate of this color sequence displayer be to comprise:
When this picture is for dynamically, and this backlight mode is when being unlocked, and this second frame rate is downgraded the critical frame rate of one first display end;
When this picture is for dynamically, and this backlight mode is not when being unlocked, and this second frame rate downgraded the critical frame rate of one second display end or below the critical frame rate of this second display end;
When this picture is to be static state, and this backlight mode is when being unlocked, and this second frame rate is downgraded the critical frame rate of one the 3rd display end; And
When this picture is to be static state, and this backlight mode is when being closed, and this second frame rate is downgraded the critical frame rate of one the 4th display end;
Wherein the critical frame rate of this first display end is to be higher than critical frame rate of this second display end and the critical frame rate of the 3rd display end, and the critical frame rate of this second display end and the critical frame rate of the 3rd display end are all to be higher than the critical frame rate of the 4th display end;
Wherein critical frame rate of this first display end and the critical frame rate of the 4th display end are all greater than zero.
6. the electricity saving method that is used for color sequence displayer according to claim 5 is characterized in that comprising in addition:
When this picture is during for static state, read the stored stabilized image data of this memory buffer according to the preface of filling in colors on a sketch in advance.
7. color sequence displayer is characterized in that comprising:
One image processing end comprises:
One image dynamic detection unit, it is static or dynamically being used for detecting a image that this color sequence displayer receives and being; And a frame rate control module, whether the result and this color sequence displayer that are used for detecting according to this image dynamic detection unit this image open a backlight mode, downgrade one first frame rate of the image engine that this color sequence displayer comprises; And
One display end comprises:
One image I/O control module is used for whether opening this backlight mode and this first frame rate according to this color sequence displayer, downgrades employed one second frame rate when reading image data; And
One driving control unit, be used for controlling a data-driven unit that this color sequence displayer comprises, one scan driver element, and the sequential of a light emitting diode driver element according to this image data that this image I/O control module is read, wherein this data-driven unit and this scan drive cell are the picture element display modes that is used for controlling on the panel that this color sequence displayer comprises, and this light emitting diode driver element is whether the backlight mode that is used for controlling the backlight module that this color sequence displayer comprises is opened.
8. color sequence displayer according to claim 7 is characterized in that comprising in addition:
One frame rate detecting unit is used for detecting this first frame rate and judges that for this display end this image that this color sequence displayer receives is dynamic or static, and this first frame rate that is used for being detected offers this image I/O control module;
Wherein when this picture be for dynamically, and this backlight mode is when being unlocked, this frame rate control module is that this first frame rate is downgraded the critical frame rate of one first image processing end;
Wherein when this picture be for dynamically, and this backlight mode is not when being unlocked, this frame rate control module is this first frame rate to be downgraded the critical frame rate of one second image processing end or below the critical frame rate of this second image processing end;
Wherein working as this picture is to be static state, and this frame rate control module is that this first frame rate is downgraded the critical frame rate of one the 3rd image processing end;
Wherein the critical frame rate of this first image processing end is to be higher than the critical frame rate of this second image processing end, and the critical frame rate of this second image processing end is to be higher than the critical frame rate of the 3rd image processing end;
Wherein this critical frame rate of first image processing end and the critical frame rate of this second image processing end are all greater than zero.
9. color sequence displayer according to claim 7 is characterized in that:
Wherein when this color sequence displayer was opened this backlight mode, this image engine transmitted image data in the colour mode;
Wherein when this color sequence displayer was not opened this backlight mode, this image engine transmitted image data with GTG or colour mode.
10. color sequence displayer according to claim 7 is characterized in that:
Wherein when this picture be for dynamically, and this backlight mode is when being unlocked, this image I/O control module is that this second frame rate is downgraded the critical frame rate of one first display end;
Wherein when this picture be for dynamically, and this backlight mode is not when being unlocked, this image I/O control module is this second frame rate to be downgraded the critical frame rate of one second display end or below the critical frame rate of this second display end;
Wherein when this picture be to be static state, and this backlight mode is when being unlocked, this image I/O control module is that this second frame rate is downgraded the critical frame rate of one the 3rd display end; And
Wherein when this picture be to be static state, and this backlight mode is when being closed, this image I/O control module is that this second frame rate is downgraded the critical frame rate of one the 4th display end;
Wherein the critical frame rate of this first display end is to be higher than critical frame rate of this second display end and the critical frame rate of the 3rd display end, and the critical frame rate of this second display end and the critical frame rate of the 3rd display end are all to be higher than the critical frame rate of the 4th display end;
Wherein critical frame rate of this first display end and the critical frame rate of the 4th display end are all greater than zero.
11. color sequence displayer according to claim 10 is characterized in that:
Wherein when this picture be during for static state, this image I/O control module is to read the stored stabilized image data of a memory buffer that this display end comprises according to the preface of filling in colors on a sketch in advance.
12. color sequence displayer according to claim 7 is characterized in that comprising in addition:
One color sequence time control circuit comprises:
One input buffer storage, this input buffer storage is that to be used for one of a synchronous signal of image data that this image engine is imported and outside this color sequence time control circuit of input and this color sequence time control circuit be that the frequency of uniting is made synchronous processing, and the image data that this image engine is imported is categorized into plural number sub-picture element data group, wherein should plural number sub-picture element data group is one by one corresponding to different types of sub-picture element;
One DCU data control unit comprises this image I/O control module, and this DCU data control unit is to receive this image data that comprises this plural number picture element data group by this input buffer storage;
At least one memory buffer, comprise a plurality of one by one corresponding to the sub-picture element memory buffer of this plural number sub-picture element data group, this at least one memory buffer is to be used for control according to this DCU data control unit, reads or write this plural number picture element data group according to the preface of filling in colors on a sketch in advance;
Wherein this driving control unit be according to this image I/O control module by this image data that this at least one memory buffer read, this sync signal, and this be that the system frequency is controlled this data-driven unit, this scan drive cell, and the sequential of this light emitting diode driver element.
13. color sequence displayer according to claim 12 is characterized in that comprising in addition:
One colour output unit is contained in this image engine, and is used for when this color sequence displayer is opened this backlight mode, the image data that output is represented with colour;
One colour is contained in this image engine to the GTG converting unit, and is used for when this color sequence displayer is not opened this backlight mode, optionally will be converted to the image data of representing with GTG with the image data that colour is represented; And
One multiplexer is used for controlling this image data represented with colour that receives that this colour output unit exported or receives this image data of representing with GTG of being exported by this colour to GTG converting unit;
Wherein this image engine is an image processing end that is installed on this color sequence displayer, and be that device has a bus between this image processing end and this color sequence time control circuit, so that the image data that this multiplexer was received is transferred to this input buffer storage, and this first frame rate is offered this color sequence time control circuit.
14. color sequence displayer according to claim 12, it is characterized in that: wherein this input buffer storage is to comprise a frame rate detecting unit, be used for detecting this first frame rate of this frame rate control module, and this first frame rate that is used for being detected offers this image I/O control module.
15. color sequence displayer according to claim 12, it is characterized in that: wherein this input buffer storage is to comprise a frame rate detecting unit, be used for detecting the transmission information of this frame rate control module, and be used for the detecting result of correspondence is offered this image I/O control module.
16. color sequence displayer according to claim 7, it is characterized in that: wherein this frame rate control module is to produce a frame rate controlling signal according to this first frame rate, and this frame rate controlling signal transferred to this image I/O control module, make this image I/O control module decide this second frame rate, to read the stored image data of at least one memory buffer that this color sequence displayer is comprised according to this first frame rate.
17. an electricity saving method that is used for color sequence displayer is characterized in that comprising:
Judge that the received picture of an image processing end that this color sequence displayer comprises is for static or dynamic;
Judge whether this color sequence displayer opens a backlight mode;
The image data that this picture comprised is converted to the sub-picture element data group of a plurality of representative different colours; And
According to this picture is for static or dynamically, whether this backlight mode be unlocked, and downgrades this image processing end employed separately figure field rate (Field Rate) when transmitting the sub-picture element data of this plural number group.
18. the electricity saving method that is used for color sequence displayer according to claim 17 is characterized in that:
Wherein according to this picture be for static or dynamically, whether this backlight mode be unlocked, downgrading this image processing end employed separately when transmitting the sub-picture element data of this plural number group should figure field rate be to comprise:
When this picture is for dynamically, and this backlight mode is when being unlocked, and should scheme a rate and downgrade one first image processing end critical graph field rate;
When this picture is for dynamically, and this backlight mode is not when being unlocked, and should scheme that a rate downgrades one second image processing end critical graph field rate or this is below rate of second image processing end critical graph field; And
When this picture is to be static state, should scheme a rate and downgrade one the 3rd image processing end critical graph field rate;
Wherein this first image processing end critical graph field rate is to be higher than this second image processing end critical graph field rate, and this second image processing end critical graph field rate is to be higher than the 3rd image processing end critical graph field rate;
Wherein this first image processing end critical graph field rate and this second image processing end critical graph field rate are all greater than zero.
19. the electricity saving method that is used for color sequence displayer according to claim 18 is characterized in that comprising in addition:
When this color sequence displayer is opened this backlight mode, image data is transferred to this display end by this image processing end in the colour mode;
When this color sequence displayer is not opened this backlight mode, image data is transferred to this display end by this image processing end in the GTG mode.
20. the electricity saving method that is used for color sequence displayer according to claim 17 is characterized in that comprising in addition:
When this picture is during for static state, read the stored stabilized image data of a memory buffer that this color sequence displayer comprises according to the preface of filling in colors on a sketch in advance.
21. a color sequence displayer is characterized in that comprising:
One image dynamic detection unit, it is static or dynamically being used for detecting a image that this color sequence displayer receives and being;
One figure field rate control module is used for detecting according to this image dynamic detection unit the result of this image, downgrades this image processing end employed separately figure field rate when transmitting the sub-picture element data of this plural number group;
One monochromatic colour output unit is used for when this color sequence displayer is opened a backlight mode, and the image data that this picture comprised is converted to a plurality of first sub-picture element data group, and exports this plural number picture element data group according to the preface of filling in colors on a sketch in advance; And
One colour is to the GTG converting unit, be used for when this color sequence displayer is not opened this backlight mode, optionally should a plural number picture element data group represent, and export this plural number picture element data group according to this preface of filling in colors on a sketch in advance by being converted in the GTG mode in the colour mode;
Wherein should monochrome colour output unit and the image data exported to the GTG converting unit of this colour all received and transmitted by a bus.
22. color sequence displayer according to claim 21 is characterized in that comprising in addition:
One color sequence time control circuit comprises:
One input buffer storage, this input buffer storage is to be used for each sub-picture element data group that temporary this bus transmits, and one of a synchronous signal of this color sequence time control circuit and this color sequence time control circuit imported in the outside is that the frequency of uniting is made synchronous processing; And
One driving control unit, be used for controlling a data-driven unit that this color sequence displayer comprises, one scan driver element, and the sequential of a light emitting diode driver element according to this image data that this input buffer storage is kept in, wherein this data-driven unit and this scan drive cell are the picture element display modes that is used for controlling on the panel that this color sequence displayer comprises, and whether this light emitting diode driver element is to be used for controlling the backlight module that this color sequence displayer comprises, open to determine this backlight mode;
Wherein this bus is to be installed between this image processing end and this color sequence time control circuit, with should plural number picture element data group transfer to this bus, will scheme each sub-picture element data group that this figure field rate that field rate control module downgraded and this bus transmitted and offer this color sequence time control circuit.
23. color sequence displayer according to claim 21 is characterized in that:
Wherein when this picture be for dynamically, and this backlight mode is when being unlocked, this figure field rate control module is that this figure field rate is downgraded one first display end critical graph field rate;
Wherein when this picture be for dynamically, and this backlight mode is not when being unlocked, this figure field rate control module should scheme that a field rate downgrades one second display end critical graph field rate or this is below rate of second display end critical graph field;
Wherein when this picture be to be static state, and this backlight mode is when being unlocked, this figure field rate control module should be schemed a field rate and be downgraded one the 3rd display end critical graph field rate;
Wherein when this picture be to be static state, and this backlight mode is when being closed, this figure field rate control module should be schemed a field rate and be downgraded one the 4th display end critical graph field rate;
Wherein this first display end critical graph field rate is to be higher than this second display end critical graph field rate and the 3rd display end critical graph field rate, and this second display end critical graph field rate and the 3rd display end critical graph field rate are all to be higher than the 4th display end critical graph field rate;
Wherein this first display end critical graph field rate and the 4th display end critical graph field rate are all greater than zero.
24. color sequence displayer according to claim 21 is characterized in that comprising in addition:
One multiplexer, be used for controlling and receive the plural number picture element data group that this monochrome colour output unit exported or receive, and each the sub-picture element data group that is received is transferred to this bus by a plural number picture element data group of this colour to the output of the selected property of GTG converting unit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009103081067A CN101661712B (en) | 2009-10-05 | 2009-10-05 | Color sequence displayer and correlative electricity-saving method |
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| CN2009103081067A CN101661712B (en) | 2009-10-05 | 2009-10-05 | Color sequence displayer and correlative electricity-saving method |
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