CN101661412A - Collocation method of flash memory - Google Patents
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- CN101661412A CN101661412A CN200810214696A CN200810214696A CN101661412A CN 101661412 A CN101661412 A CN 101661412A CN 200810214696 A CN200810214696 A CN 200810214696A CN 200810214696 A CN200810214696 A CN 200810214696A CN 101661412 A CN101661412 A CN 101661412A
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Abstract
The invention provides a collocation method of a flash memory, which comprises the following steps: adjusting a preliminary data storage capacity corresponding to the flash memory to determine an actual data storage capacity; adjusting a preliminary extra space capacity corresponding to the flash memory to determine an actual extra space capacity, wherein the total sum of the preliminary data storage capacity and the preliminary extra space capacity is equal to the total sum of the actual data storage capacity and the actual extra space capacity; and collocating the actual data storage capacity and the actual extra space capacity in the flash memory, wherein the actual data storage capacity is used for storing data, and the actual extra space capacity is used for storing an operation codethat is generated when the error-correcting code operation of the data is carried out by adopting an error-correcting code algorithm.
Description
Technical field
The invention relates to a flash memory capacity collocation method, refer to prolong a Sheffer stroke gate flash memory (the Nand flash memory) capacity collocation method in serviceable life especially.
Background technology
In portable electronic product or embedded system, nonvolatile Sheffer stroke gate flash memory (Nandflash memory) is one of storage device of the most normal use at present.For example, PDA(Personal Digital Assistant), mobile phone, digital camera, MP3 walkman and recording pen etc. are provided with the Sheffer stroke gate flash memory.Yet, owing to the correctness that is stored in the data in the Sheffer stroke gate flash memory can reduce along with the increase of its access times, therefore in order to solve the problem of error in data, can arranging in pairs or groups in existing Sheffer stroke gate flash memory, the error correcting code that is fit to (ErrorCodes Correction, ECC) repairs the data that mistake occurs by configuration.For instance, in a data page size (Page size) is in the Sheffer stroke gate flash memory of 2K, can provide the space of exceptional space (Spare area) 64 bytes (Bytes) to be used as the operation code (Parity code) that particular error corrigendum code calculation is produced when the data of this data page being carried out error correcting code calculation, and be in the Sheffer stroke gate flash memory of 4K in data page size, can provide the space of exceptional space 218 bytes (Bytes) to be used as the operation code that this particular error corrigendum code calculation is produced when the data of this data page being carried out this error correcting code calculation.
Please refer to Fig. 1.Shown in Figure 1 is the collocation method of the exceptional space of each data page in one known (Conventional) Sheffer stroke gate flash memory, wherein correcting code calculation when this particular error is to adopt a reed-solomon (Reed-Solomon) error correction code calculation and a BCH (Bose, Chaudhuri and Hocquengham) error correction code calculation.When using a BCH 8 error correction code calculations that this Sheffer stroke gate flash memory is encoded, the operation code that its coding back is produced can take the exceptional space of each data page 13 byte.When using a reed-solomon 6 (Reed-Solomon 6) error correction code calculation that this Sheffer stroke gate flash memory is encoded, the operation code that its coding back is produced can take the exceptional space of each data page 15 byte.When using a reed-solomon 8 (Reed-Solomon 8) error correction code calculation that this Sheffer stroke gate flash memory is encoded, the operation code that its coding back is produced can take the exceptional space of each data page 20 byte.When using a reed-solomon 10 (Reed-Solomon 10) error correction code calculation or a BCH 15 error correction code calculations that this Sheffer stroke gate flash memory is encoded, the operation code that its coding back is produced can take the exceptional space of each data page 25 byte.On the other hand, when known Sheffer stroke gate flash memory used this reed-solomon error correction code calculation and this BCH error correction code calculation, the storage data space that all can dispose 512 bytes was in each data page.Therefore, a known Sheffer stroke gate flash memory is when using this reed-solomon error correction code calculation and this BCH error correction code calculation, and the ability of its error in data corrigendum has just been limited by default exceptional space size.In other words, it is that the default exceptional space of each data page is limited that this reed-solomon error correction code calculation and this BCH error correction code calculation can't provide the reason of better error in data corrigendum ability to this known Sheffer stroke gate flash memory, and then causes user's inconvenience greatly.
Summary of the invention
Therefore, the purpose of this invention is to provide an a kind of Sheffer stroke gate flash memory (Nand flash memory) capacity collocation method in serviceable life that prolongs.
According to a kind of collocation method that is applied to a flash memory of one aspect of the present invention, it includes: a preliminary data storage volume of adjusting corresponding to this flash memory decides a real data storage volume; Adjustment decides a real account external space capacity corresponding to this flash memory step exceptional space capacity, wherein, wherein the summation of this preliminary data storage volume and this preliminary exceptional space capacity equals the summation of this real data storage volume and this real account external space capacity; And in this flash memory configuration this real data storage volume and this real account external space capacity, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store an error correcting code (Error Codes Correction, ECC) operation code (Parity Bytes) that produced of algorithm when these data are carried out an error correcting code computing.
A kind of collocation method that is applied to a flash memory according to another aspect of the present invention, include: determine a real data storage volume and a real account external space capacity, wherein this real account external space capacity is greater than (Error Codes Correction ECC) one of algorithm presets byte corresponding to an error correcting code; And in this flash memory configuration this real data storage volume and this real account external space capacity, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store the operation code (Parity Bytes) that this error correction code calculation is produced when these data are carried out an error correcting code computing.
Description of drawings
Fig. 1 is the collocation method of the exceptional space of each data page in the known Sheffer stroke gate flash memory.
Fig. 2 is an a kind of embodiment process flow diagram that is applied to the collocation method of a flash memory (flash memory) of the present invention.
Fig. 3 be the collocation method of Fig. 2 for the configuration of this flash memory before with configuration back synoptic diagram.
Fig. 4 is a kind of another embodiment process flow diagram that is applied to the collocation method of a flash memory of the present invention.
Embodiment
In instructions and follow-up the application's claim, used some vocabulary to censure specific element.The person with usual knowledge in their respective areas should understand, and hardware manufacturer may be called same element with different nouns.This instructions and follow-up claim are not used as distinguishing the mode of element with the difference of title, but the criterion that is used as distinguishing with the difference of element on function.Be an open term mentioned " comprising " in instructions and the follow-up request quite in the whole text, so should be construed to " comprise but be not limited to ".In addition, " coupling " speech is to comprise any indirect means that are electrically connected that directly reach at this, therefore, be coupled to one second device if describe one first device in the literary composition, then represent this first device can directly be electrically connected in this second device, perhaps be electrically connected to this second device indirectly by other device or connection means.
Please also refer to Fig. 2 and Fig. 3, shown in Figure 2 is according to an a kind of embodiment process flow diagram that is applied to the collocation method 200 of a flash memory (flash memory) of the present invention.Shown in Figure 3 be collocation method 200 of the present invention for the configuration of this flash memory before flash memory 300a and configuration back flash memory 300b synoptic diagram.Note that for clearer description spiritual place of the present invention this flash memory in the present embodiment is to explain with a Sheffer stroke gate flash memory (Nand Flash Memory), yet this is not limit by the present invention.In other words, be familiar with this operator and should understand, any storage device with flash memory characteristic, for example a rejection gate flash memory (Nor Flash Memory) is category of the present invention place.If can reach identical result substantially, the sequence of steps that does not need necessarily to shine in the flow process shown in Figure 2 is carried out, and step shown in Figure 2 not necessarily will carry out continuously, that is other step also can insert wherein, and collocation method 200 includes the following step:
Step 202: a preliminary data storage volume that reduces corresponding to this flash memory decides a real data storage volume;
Step 204: a preliminary exceptional space capacity that increases corresponding to this flash memory decides a real account external space capacity, and wherein the summation of this preliminary data storage volume and this preliminary exceptional space capacity equals the summation of this real data storage volume and this real account external space capacity; And
Step 206: this real data storage volume of configuration and this real account external space capacity in this flash memory, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store an error correcting code (Error Codes Correction, ECC) operation code (Parity Bytes) that produced of algorithm when these data are carried out an error correcting code computing.
Because the least unit of exchanges data is a data page (Page) between this flash memory and the primary memory, therefore this flash memory is to illustrate with the unit of data page in Fig. 3.Before this flash memory did not carry out capacity configuration by collocation method 200 of the present invention, storage data space 302a in its each data page and the capacity configuration size of an exceptional space 304a were default according to a specific error correction code calculation.For instance, when utilizing a reed-solomon 10 (Reed-Solomon a 10) error correction code calculation or a BCH15 (Bose, when Chaudhuri and Hocquengham 15) the error correction code calculation came that the data of 512 bytes (Bytes) in the storage data space 302a in each data page are carried out an error correcting code computing, exceptional space 304 amount of capacity that the operation code that is produced after its computing is occupied were to be preset as 25 bytes.Yet, when the amount of capacity of exceptional space 304a when being set to 25 bytes, this specific error correction code calculation just has been limited the decoding ability of each data page in this flash memory.Simultaneously, the access times of this flash memory also have been limited.Therefore, for this specific error correction code calculation, when being configured, the storage volume of the step 202 of collocation method 200 of the present invention pair this flash memory can estimate a preliminary data storage volume of this flash memory earlier, the total data storage volume that this preliminary data storage volume is this flash memory, as shown in Figure 3.This preliminary data storage volume is the summation of the storage data space 302a in all each data pages.Then, this preliminary data storage volume that collocation method 200 reduces corresponding to this flash memory decides a real data storage volume, makes that this real data storage volume is less than this preliminary data storage volume.Same, this real data storage volume is the summation of the storage data space 302b in all each data pages.Note that for convenience's sake, in the present embodiment storage data space 302a in each data page and 302b all as an illustration with 512 bytes, yet this is not limited by the present invention.In step 204, in order to improve the error correction ability of this specific error correction code calculation to each data page, the preliminary exceptional space capacity that collocation method increases corresponding to this flash memory decides a real account external space capacity, and wherein the summation of this preliminary data storage volume and this preliminary exceptional space capacity equals the summation of this real data storage volume and this real account external space capacity.In step 206, this real data storage volume of configuration and this real account external space capacity in this flash memory, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store the operation code (ParityBytes) that this specific error correction code calculation is produced when these data are carried out an error correcting code computing.Please refer again to Fig. 3, because after this flash memory carries out capacity configuration by collocation method 200, storage data space 302b in each data page still is maintained at the size of 512 bytes, and the exceptional space 304b in each data page can be greater than 25 bytes, therefore this specific error correction code calculation is just improved the error correction ability of each data page, and then has prolonged the access times of this flash memory.Though note that after configuration shown in Figure 3 each storage data space 302b and exceptional space 304b arrange in mode at interval among the flash memory 300b, yet this is not limited by the present invention.In other words, the storage data space 302b of each data page and its corresponding exceptional space 304b might not be adjacent, that is the arrangement of each storage data space 302b and exceptional space 304b can tool elasticity change according to design requirement.For instance, in another embodiment of the present invention, it is to dispose the exceptional space 304b of same number more continuously to be combined into the data page of corresponding number behind a plurality of storage datas of the configuration space 302b continuously.
Please refer to Fig. 4.Shown in Figure 4 is according to a kind of another embodiment process flow diagram that is applied to the collocation method 400 of a flash memory of the present invention.In like manner, for clearer description spiritual place of the present invention, this flash memory in the present embodiment is to explain with a Sheffer stroke gate flash memory, yet this is not limit by the present invention.In other words, be familiar with this operator and should understand, any storage device with flash memory characteristic, for example a rejection gate flash memory is category of the present invention place.If can reach identical result substantially, the sequence of steps that does not need necessarily to shine in the flow process shown in Figure 4 is carried out, and step shown in Figure 4 not necessarily will carry out continuously, that is other step also can insert wherein, and collocation method 400 includes the following step:
Step 402: determine a real data storage volume and a real account external space capacity, wherein this real account external space capacity is greater than corresponding to an error correcting code (Error Codes Correction, ECC) one of algorithm default byte; And
Step 404: this real data storage volume of configuration and this real account external space capacity in this flash memory, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store the operation code (ParityBytes) that this error correction code calculation is produced when these data are carried out an error correcting code computing.
As the first above-mentioned embodiment, when utilizing a reed-solomon 10 (Reed-Solomon 10) error correction code calculation or a BCH 15 (Bose, when Chaudhuri and Hocquengham 15) the error correction code calculation came that the data of 512 bytes (Bytes) in the storage data space in each data page of this flash memory are carried out an error correcting code computing, the exceptional space amount of capacity that the operation code that is produced after its computing is occupied was to be preset as 25 bytes.And step 402 can determine the real data storage area and the real account external space in each data page, and wherein this real account external space capacity is greater than 25 bytes, and real data storage area capacity is 512 bytes.In step 404, configuration this real data storage volume of each data page and this real account external space capacity in this flash memory, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store the operation code (Parity Bytes) that this specific error correction code calculation is produced when these data are carried out an error correcting code computing.Hence one can see that, because after this flash memory carries out capacity configuration by collocation method 400, real data storage area in each data page still is maintained at the size of 512 bytes, and the real account external space in each data page can be greater than 25 default bytes, therefore this specific error correction code calculation is just improved the error correction ability of each data page, and then has prolonged the access times of this flash memory.
In sum, though the present invention first and second embodiment explain with reed-solomon 10 error correction code calculations and these BCH 15 error correction code calculations, so it is not limit by the scope of the invention.In other words, when this specific error correction code calculation is a BCH 8 (Bose, Chaudhuri and Hocquengham 8) during the error correction code calculation, behind above-mentioned disclosed collocation method, exceptional space in each data page just can dispose greater than 13 bytes the space, it also belongs to category of the present invention place; When this specific error correction code calculation is a reed-solomon 6 (Reed-Solomon 6) error correction code calculation, behind above-mentioned disclosed collocation method, exceptional space in each data page just can dispose the space greater than 15 bytes, and it also belongs to category of the present invention place; When this specific error correction code calculation is a reed-solomon 8 (Reed-Solomon 8) error correction code calculation, behind above-mentioned disclosed collocation method, exceptional space in each data page just can dispose the space greater than 20 bytes, and it also belongs to category of the present invention place.More definite, at a flash memory, when if this specific error correction code calculation is a BCH 8 error correction code calculations, behind above-mentioned disclosed collocation method, this flash memory can utilize any than BCH8 more the error correction code calculation of high-order carry out error correction calculation, for example utilize reed-solomon 10, BCH15 error correction code calculation or the like.
The above only is preferred embodiment of the present invention, and all changes that is equal to or replacements of having done according to the application's claim scope all should belong to covering scope of the present invention.
Claims (6)
1. collocation method that is applied to a flash memory includes:
Adjustment decides a real data storage volume corresponding to a preliminary data storage volume of this flash memory;
Adjustment decides a real account external space capacity corresponding to a preliminary exceptional space capacity of this flash memory, and wherein the summation of this preliminary data storage volume and this preliminary exceptional space capacity equals the summation of this real data storage volume and this real account external space capacity; And
This real data storage volume of configuration and this real account external space capacity in this flash memory, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store the operation code that an error correction code calculation is produced when these data are carried out an error correcting code computing.
2. collocation method according to claim 1 it is characterized in that this real data storage volume is less than this preliminary data storage volume, and this real account external space capacity is greater than this preliminary exceptional space capacity.
3. collocation method according to claim 1 is characterized in that this real account external space capacity is greater than the default byte corresponding to this error correction code calculation.
4. collocation method according to claim 1 is characterized in that this flash memory is the fast flash memory reservoir of a Sheffer stroke gate.
5. collocation method that is applied to a flash memory includes:
Determine a real data storage volume and a real account external space capacity, it is characterized in that this real account external space capacity is greater than the default byte corresponding to an error correction code calculation; And
This real data storage volume of configuration and this real account external space capacity in this flash memory, wherein this real data storage volume is in order to storage data, and this real account external space capacity is in order to store the operation code that this error correction code calculation is produced when these data are carried out an error correcting code computing.
6. collocation method according to claim 5 is characterized in that this flash memory is the fast flash memory reservoir of a Sheffer stroke gate.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456400A (en) * | 2010-10-15 | 2012-05-16 | 慧荣科技股份有限公司 | Control method and controller for flash memory |
| CN106484331A (en) * | 2015-09-29 | 2017-03-08 | 华为技术有限公司 | A kind of data processing method, device and flash memory device |
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| DE102004058528B3 (en) * | 2004-12-04 | 2006-05-04 | Hyperstone Ag | Memory system for reading and writing logical sector, has logical sectors for communication with host system are buffered in sector buffers and assigned by direct-flash-access-units between sector buffers and flash memory chips |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102456400A (en) * | 2010-10-15 | 2012-05-16 | 慧荣科技股份有限公司 | Control method and controller for flash memory |
| CN102456400B (en) * | 2010-10-15 | 2015-03-11 | 慧荣科技股份有限公司 | Control method and controller for flash memory |
| CN106484331A (en) * | 2015-09-29 | 2017-03-08 | 华为技术有限公司 | A kind of data processing method, device and flash memory device |
| CN106484331B (en) * | 2015-09-29 | 2019-04-12 | 华为技术有限公司 | A kind of data processing method, device and flash memory device |
| US10552315B2 (en) | 2015-09-29 | 2020-02-04 | Huawei Technologies Co., Ltd. | Data processing method and apparatus, and flash device |
| US11200160B2 (en) | 2015-09-29 | 2021-12-14 | Huawei Technologies Co., Ltd. | Data processing method and apparatus, and flash device |
| US11960393B2 (en) | 2015-09-29 | 2024-04-16 | Huawei Technologies Co., Ltd. | Data processing method and apparatus, and flash device |
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Denomination of invention: Collocation method of flash memory Effective date of registration: 20190320 Granted publication date: 20120829 Pledgee: Bank of Hangzhou Limited by Share Ltd. science and Technology Branch Pledgor: MAXIO TECHNOLOGY (HANGZHOU) Ltd. Registration number: 2019330000080 |
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