CN101656551A - Integrated circuit of ultra-wideband pulse signal generator - Google Patents
Integrated circuit of ultra-wideband pulse signal generator Download PDFInfo
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- CN101656551A CN101656551A CN200810041962A CN200810041962A CN101656551A CN 101656551 A CN101656551 A CN 101656551A CN 200810041962 A CN200810041962 A CN 200810041962A CN 200810041962 A CN200810041962 A CN 200810041962A CN 101656551 A CN101656551 A CN 101656551A
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Abstract
The invention designs an integrated circuit of ultra-wideband pulse signal generator. The invention uses differential circuits to carry out pulse emission with greatly narrow width, a differential amplification circuit structure with double-end input and double-end output is employed in the circuit, thereby improving output amplitude of pulse. In addition, a modulation circuit is integrated in thecircuit structure of the invention, which may modulate polarity of pulse simultaneously. Compared with other reported structures, the present invention has characteristics of simple structure, smallarea of chips, high pulse output amplitude, and narrow pulse. The integrated circuit structure of the invention can be verified by using mix signal CMOS technology of 0.18mm.
Description
Affiliated technical field
The present invention relates to a kind of ic core chip technology that produces ultra-wideband impulse signal, particularly utilize the differential circuit method to realize a kind of novel method of pulse emission.Structure of the present invention can realize the amplitude and the polar modulation of ultra-wideband impulse signal simultaneously.
Background technology
Ultra broadband (ultra-wide band, UWB) communication technology realizes communicating by letter by the modulation sequences of pulsed signals extremely narrow with transmitting width, and below 1 nanosecond, its bandwidth can meet or exceed Gigahertz (GHz) to the pulsewidth of this pulse usually.
The narrow pulse signal that produces nanosecond or subnanosecond level width is the precondition of the UWB communication technology.At present, the method for generation UWB pulse signal mainly contains following several:
1. avalanche transistor method.The basic principle of this method is that the transistor PN junction is added reverse voltage, utilizes in avalanche breakdown and obtains precipitous rising edge, promptly obtains the extremely narrow pulse of pulsewidth after the shaping.Please refer to Fan Xiaoming in detail, Zheng Jiyu, Lin Jiming, " based on the design of the ultra broadband ultra-narrow pulse generator of RF-BJT ", 2005 the 5th phases of TV tech (list of references [1]).
2. snap-off diode method.This method utilization step recovery diode through special processing on die design and structural manufacturing process produces current step, can be used for producing extremely narrow pulse.Please refer to Chen Zhenwei in detail, Zheng Jiyu, " ultra-wideband pulse based on SRD produces and design, " Electronic Engineering Institutes Of Guilin's journal, the 25th volume, the 5th phase (list of references [2]).
3. staggered square-wave signal produces method.Please refer to Smaini in detail, L.Tinella, C.Helal, D.Stoecklin, C.Chabert, L.Devaucellc, C.Cattenoz, R.Rinaldi, N.Bclot, D.Adv.Syst.Technol., STMicroelectronics, Geneva, Switzerland " Single-chip CMOS pulse generatorfor UWB systems " IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL.41, NO.7, JULY 2006 (list of references [3]).
4. differential circuit produces method.This method obtains the extremely narrow pulse of pulse duration by the repeatedly differentiate to signal.Please refer to Yuanjing Zheng in detail, Han Dong and Yong Ping Xu, " A Novel CMOS BiCMOS UWB PulseGenerator and Modulator " IEEE Microwave Symposium Digest, 2004 IEEE MTT-SInternational, Volume:2, On page (s): 1269-1272 Vol.2 (list of references [4]).
In the middle of high speed UWB communication, require the extremely narrow pulse signal of width, to the integrated level of system, all there is very high requirement aspects such as power consumption simultaneously.Yet the pulse (list of references [1], [2]) that diode method produces is got on traditional avalanche transistor and rank, and all about 1ns, very difficult realization is lower than the pulse signal of nanosecond to its general pulse duration.For the UWB system of 3.1-10.6GHz frequency range, its corresponding pulse need be in the magnitude of 0.2 nanosecond, and above technology is difficult to realize.In addition, but said method is poor with the integration of traditional silicon CMOS, is difficult to realize the single chip solution of radio system, thereby can't compete mutually with pulse generator technology that can be integrated on the cost.
Staggered square-wave signal produces method and generally adopts the mode of digital circuit to realize (list of references [3]), has that pulse duration is narrow, the level of integrated system advantages of higher.But, the circuit structure more complicated of its realization, realize that difficulty is big, and its chip area is big, thereby cost will be than higher.
What differential circuit generation method adopted is the route of analog circuit, and this method also is the higher pulse signal generator of a kind of integrated level (list of references [4]).It realizes burst pulse by the repeatedly differentiate to signal, but the technology of delivering at present shows that the signal that conventional differentiating circuit produces is because by repeatedly differentiate, the amplitude of signal has had many decay, and general output has only tens millivolts (list of references [4]).For remote UWB system applies, such output amplitude can not satisfy system requirements.
By above analysis to prior art, we find, how to design a pulse signal generator, not only can make the pulse duration of its generation enough narrow, thereby can satisfy the requirement of high speed UWB communication, can satisfy on circuit complexity, integrated level again and easily realize and requirement cheaply, can reach higher output amplitude simultaneously, be a problem of fine solution not as yet so far.
The present invention will adopt differential circuit generation method to realize the pulse emission that width is extremely narrow.Compare with the present structure (list of references [4]) of report, the differential amplifier circuit unit of we integrated both-end input, both-end output on same integrated circuit (IC) chip, thus can improve the output amplitude of pulse, reached the above magnitude of 100mV.In addition, increased circuit unit in circuit structure of the present invention, paired pulses carries out polar modulation simultaneously.Compare other designing technique, take all factors into consideration pulse duration, impulse output amplitude, and factors such as chip area and complexity, the design has bigger improvement.
For proving design philosophy of the present invention, 0.18 micron complementary type metal-oxide semiconductor fieldeffect transistor (CMOS) technology that we adopt SMIC company to provide has designed the integrated circuit (IC) chip of ultra-wideband pulse signal generator.The circuit design result verification feasibility of the present invention.
Summary of the invention
The differential circuit that the design adopts produces method, can realize being used for the pulse signal of the ultra-narrow pulse width of high speed UWB communication.Compare with the technology of having delivered, the present invention utilizes integrated pulse modulated circuit, improves pulse amplitude, and realizes the polar modulation of paired pulses simultaneously.Compare other pulse signal realization technology, take all factors into consideration the complexity and the factors such as chip area, cost of pulse duration, output amplitude and realization, the design has bigger improvement.
The present invention has adopted two rank differential circuits and biphase phase shift keying (BPSK) modulation circuit in circuit design, be used for producing burst pulse respectively and paired pulses carries out polar modulation.
Two rank differential circuits adopt the RLC network to realize.
The BPSK modulation circuit adopts the transmission gate circuit structure to realize, the pulse of opposed polarity is exported in the conducting of the varying level control transmission door by control voltage and closing.
Below explain basic principle of the present invention:
The UWB pulse signal generator is made up of two parts functional circuit: CMOS pulse signal generator, and pulse amplitude modulation, polarity modulator.The CMOS pulse signal generator produces and satisfies the burst pulse that pulse duration requires; Pulse amplitude modulation, polarity modulator increase the pulse amplitude that front-end circuit produces, and finish polar modulation by the control of control voltage.
1.CMOS pulse signal generator
As a reference, we quote the result that delivered as the basis of discussing.
According to the structure that list of references [4] proposes, adopt the method for on-chip CMOS differential circuit, its basic principle is as follows:
At the radiating portion of pulse, realize a narrow second order Gauss pulse by block diagram shown in Figure 1.The functional form of Gaussian pulse is:
According to second order Gauss function pulse requirement.At first, the digital signal that baseband chip is launched produces square characteristic by first functional module of Fig. 1, can be by metal-oxide-semiconductor be biased in the saturation region, and electric current and voltage are that one square relation realizes:
Second module needs the index percent characteristic, when metal-oxide-semiconductor is operated in weak inversion regime, the relation of electric current and voltage presents indicial response (P.R.Gray, P.1.Hmt, S.H.Lewis, and R.G.Meyer, " Analysis and Design of AnalogIntegrated Circuits ", Fourth edition, Job Wiley ﹠amp; Sons, Inc., 2001., list of references [5]).
The 3rd module takes the RLC resonant network to realize, the transfer function of RLC resonant network just in time can realize the function (Thomas H.Lee " CMOS radio frequency integrated circuit design (second edition) ", Electronic Industry Press, list of references [6]) of second order differentiate.
Through above-mentioned three modules of first order circuit, output signal is a pulsewidth less than the second order Gauss pulse of 1 nanosecond, and its bandwidth can meet or exceed GHz.
2. pulse amplitude modulation, polarity modulator
The narrow pulse signal that is produced by the front end pulse signal generator can reach the pulse duration that is fit to high speed UWB application, but pulse amplitude often has only tens millivolts (list of references [4]), for relative distance UWB communication far away, the decay of channel and noise can make signal arrive output and be difficult to detected having arrived.
Be difficult for detected shortcoming for overcoming the little pulse signal of amplitude, realize the modulation of pulse signal simultaneously, we insert follow-up pulse amplitude modulation and polar modulation unit with the pulse signal that pulse generator produces.
The pulse amplitude modulation circuit is made up of the differential amplifier circuit of both-end input, both-end output, and the pulse amplitude that prime is produced amplifies back output.
Polar modulation circuit is made up of transmission gate circuit, by the control of control voltage, finishes the BPSK modulation of pulse signals.
Analysis of cases:
For verifying the feasibility of this circuit invention, we adopt SMIC company 0.18 μ mCMOS technology and HSpice to carry out emulation, obtain simulation result such as Fig. 3.
First behavior clock signal input among Fig. 3, the second behavior pulse polarity modulator control signal.The third line and fourth line signal are the signal of pulse signal generator non-modulated output, and last column is the output signal of entire circuit.As can be seen, this pulse amplitude is 250mV, and pulse duration is 0.17ns (half-peak breadth).It can also be seen that output positive pulse when control signal is 0, control signal are 1 output negative pulse.
The design's integrated circuit diagram as shown in Figure 4.
Description of drawings
The present invention will be further described below in conjunction with drawings and Examples.
Fig. 1 is the circuit theory schematic diagram that the CMOS pulse signal is realized in the design's differential circuit unit.
Fig. 2 is the design's an integrated circuit (IC) chip complete circuit topological diagram.The concrete function of three parts will be set forth in embodiment among the figure.Wherein voltage signal Vck is fixing clock pulse; Vctrl carries out the BPSK modulation for control voltage, pulse signals; Vout is the output pulse signal after modulating.
Fig. 3 is that we adopt SMIC company 0.18 μ mCMOS technology and HSpice to carry out the result that emulation obtains.The input of the first behavior clock signal, the second behavior pulse polarity modulator control signal.The third line and fourth line signal are the signal of pulse signal generator non-modulated output, and last column is the output signal of entire circuit.
Fig. 4 is the design's a integrated circuit diagram.
Among Fig. 2,
10-capacitor C s
The 11-capacitor C
1
The 12-capacitor C
2
The 13-capacitor C
21
The 14-capacitor C
22
The 15-capacitor C
C1
The 16-capacitor C
C2
The 20-resistance R
1
The 21-resistance R
2
The 22-resistance R
5
The 23-resistance R
6
The 24-resistance R
7
The 25-resistance R
Out1
The 26-resistance R
Out2
The 27-resistance R
c
The 30-inductance L
1
The 31-inductance L
2
40-N-type field-effect transistor (NMOS) MB
1
41-P-type field-effect transistor (PMOS) MB
2
42-NMOS transistor M
1
43-PMOS transistor M
2
44-NMOS transistor MS
1
45-NMOS transistor MS
2
46-NMOS transistor MS
3
47-NMOS transistor M3
a
48-NMOS transistor M3
b
49-NMOS transistor M4
a
50-NMOS transistor M4
b
51-NMOS transistor M
21
52-NMOS transistor M
22
53-PMOS transistor M
23
54-PMOS transistor M
24
55-PMOS transistor M
25
56-PMOS transistor M
26
57-PMOS transistor M
27
58-NMOS transistor M
28
59-NMOS transistor M
29
60-NMOS transistor M
30
61-NMOS transistor M
31
62-NMOS transistor MC
1
63-NMOS transistor MC
2
64-NMOS transistor MC
3
70-input voltage Vck port
71-ground GND
72-output voltage V out
73-ground GND
74-control voltage Vctrl port.
Embodiment:
Fig. 2 is the complete topological diagram of circuit.The topological diagram of entire circuit can be divided into three parts.Wherein the A part mainly comprises resistance R
1, R
Out1, R
Out2MOS transistor M
1, M
2, M3
a, M3
b, M4
a, M4
b, MS
1Inductance L
1, L
2, and capacitor C
1, C
2The B part mainly comprises MOS transistor M
21, M
22, M
29, M
23, M
24Remaining circuit is the C part, comprises MOS transistor MC
1, MC
2, MC
3, resistance R
c
A partly is a pulse signal generating circuit; B partly is the amplitude modulation circuit of pulse signal, and this circuit amplifies pulse signal by adopting both-end input, both-end output difference form; C partly is the pulse signal polar modulation circuit, and control voltage Vctrl control transmission door is opened, the polarity of closed decision output pulse.
1. pulse signal generating circuit.MOS transistor M
1Be operated in the saturation region, the square law relation of triode leakage current and gate source voltage is provided.Resistance R
1Being feedback resistance, is metal-oxide-semiconductor M with current conversion
2Input voltage.MOS transistor M
2Be source follower, realize level conversion.Differential pair MOS transistor M3
a, M3
bBe operated in subthreshold region, realize the exponential relationship among Fig. 1.Inductance L
1, L
2, capacitor C
1, C
2And resistance R
Out1, R
Out2Form the RLC resonant network, obtain output voltage differential pair electric current second dervative.
2. amplitude modulation circuit.Transistor M
21And M
22Deng forming both-end input, both-end output differential amplifier circuit, to the small size pulse signal amplification of first order output, the pulse amplitude that obtains can reach the hundreds of millivolt.The result of same list of references [4] compares, and our pulse amplitude improves 1 order of magnitude.
3. polar modulation circuit.Control voltage Vctrl is added in transistor MC
1And MC
2Grid on, make two transistor alternate conduction, the output voltage change in polarity.
Analysis of cases:
For verifying the feasibility of this circuit invention, we adopt SMIC company 0.18 μ mCMOS technology and HSpice to carry out emulation, obtain simulation result such as Fig. 3.
First behavior clock signal input among Fig. 3, the second behavior pulse polarity modulator control signal.The third line and fourth line signal are the signal of pulse signal generator non-modulated output, and last column is the output signal of entire circuit.As can be seen, output positive pulse when control signal is 0, control signal are 1 output negative pulse.This pulse amplitude is 250mV, and pulse duration is 0.17ns (half-peak breadth).It can also be seen that output positive pulse when control signal is 0, control signal are 1 output negative pulse.The domain of design as shown in Figure 4.
Claims (8)
1. the implementation method of an integrated circuit of ultra-wideband pulse signal generator chip, this method adopts simulation circuit structure, integrated two rank differential circuits on a chip, differential amplifier circuit, and three unit of biphase phase shift keying (BPSK) modulation circuit, when realizing ultra-wideband impulse signal, realize the amplification and the polar modulation of pulse.
2. described according to claim 1, the differential circuit part of integrated circuit of ultra-wideband pulse signal generator is made up of following element, comprises three resistance (R
1, R
Out1, R
Out2), 7 transistors (MOS) (M
1, M
2, M3
a, M3
b, M4
a, M4
b, MS
1), 2 inductance (L
1, L
2), and 2 electric capacity (C
1, C
2), produce the second order Gauss pulse signal of pulsewidth less than 1ns.
3. described according to claim 1, the differential amplifier circuit part of integrated circuit of ultra-wideband pulse signal generator is mainly by 5 transistors (MOS) M
21, M
22, M
29, M
23, M
24Form, realize the amplitude modulation(PAM) and the amplification of pulse signal.
4. described according to claim 1, the biphase phase shift keying of integrated circuit of ultra-wideband pulse signal generator (BPSK) modulation circuit part is by 3 transistors (MOS) MC
1, MC
2, MC
3And resistance R
cForm, by control voltage (Vctrl) control transmission door MC
1And MC
2Unlatching and closure, realize the output voltage polar modulation.
5. described according to claim 2, transistor (MOS) M of differential circuit part
1Be operated in the saturation region, provide the square law relation of transistor drain current and gate source voltage, resistance R
1Being feedback resistance, is metal-oxide-semiconductor M with current conversion
2Input voltage, transistor (MOS) M
2Be source follower, realize level conversion.
6. described according to claim 2, differential pair transistors (MOS) M3 of differential circuit part
a, M3
bBe operated in subthreshold region, realize exponential relationship, inductance L input signal
1, L
2, capacitor C
1, C
2And resistance R
Out1, R
Out2Form the RLC resonant network, obtain output voltage electric current second-order differential derivative.
7. described according to claim 3, transistor (MOS) M of differential amplifier circuit part
21And M
22Form both-end input, both-end output differential amplifier circuit, the small size pulse signal amplification to first order output obtains the pulse amplitude more than 100 millivolts.
8. described according to claim 4, the control voltage Vctrl of biphase phase shift keying (BPSK) modulation circuit part is added in transistor MC
1And MC
2Grid on, make two transistor alternate conduction, realize the output voltage change in polarity.
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| CN200810041962A CN101656551A (en) | 2008-08-21 | 2008-08-21 | Integrated circuit of ultra-wideband pulse signal generator |
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| CN200810041962A CN101656551A (en) | 2008-08-21 | 2008-08-21 | Integrated circuit of ultra-wideband pulse signal generator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103929216A (en) * | 2014-04-30 | 2014-07-16 | 郑州联睿电子科技有限公司 | Communication device based on carrier-free pulse ultra-wide-band active positioning tag |
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| CN103929216A (en) * | 2014-04-30 | 2014-07-16 | 郑州联睿电子科技有限公司 | Communication device based on carrier-free pulse ultra-wide-band active positioning tag |
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