CN101650702B - On-line USB communication maintenance device and method - Google Patents
On-line USB communication maintenance device and method Download PDFInfo
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- CN101650702B CN101650702B CN200910088772.4A CN200910088772A CN101650702B CN 101650702 B CN101650702 B CN 101650702B CN 200910088772 A CN200910088772 A CN 200910088772A CN 101650702 B CN101650702 B CN 101650702B
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- usb
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- reset
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Abstract
The invention discloses an on-line USB communication maintenance device which comprises a USB interface, a USB interface circuit and a data processing circuit, wherein the interface circuit is respectively connected with the USB interface and the data processing circuit for realizing data communication between the USB interface and the data processing circuit, and the data processing circuit comprises a reset control module. The invention also discloses an on-line USB communication maintenance method used for automatically detecting the chain fault of a USB communication device on line, automatically sending a resetting signal to a USB interface chip on line for resetting, without reconnecting USB date lines, thereby solving the fault of communication interruption on line.
Description
Technical field
The present invention relates to field of computer technology, in particular, a kind of apparatus and method of USB interface telecommunication circuit on-line maintenance.
Background technology
Along with popularizing of computer utility, Communication between peripherals with computing machine has become a link crucial in various application, in various communication modes, USB enjoys favor because of its plurality of advantages, application number be 200420038273.7 Chinese utility model patent " anode proof circuit based on the reconfigurable password coprocessor of USB " disclose a kind of device being realized communication between peripherals and computing machine by USB interface, see Fig. 1, the technical scheme of this device is, USB interface chip FT245BM is used to connect USB interface and on-site programmable gate array FPGA, realize the data communication between computing machine and FPGA, but program Problems existing is, in data communication process, often occur that data fall chain, the fault that USB interface is hung up, solve this fault often to need again to pull out, insert USB interface, interface chip FT245BM is resetted, re-establish data cube computation, data for lasting large discharge are transmitted, this troubleshooting methodology obviously can not meet application requirement.
Therefore, prior art existing defects, needs to improve.
Summary of the invention
Technical matters to be solved by this invention is for the deficiencies in the prior art, provides a kind of usb communication on-line maintenance device and maintaining method.
Technical scheme of the present invention is as follows:
A kind of device of usb communication on-line maintenance, comprise USB interface, usb circuit and data processing circuit, described usb circuit is connected with described data processing circuit with described USB interface respectively, for the data communication between described USB interface and described data processing circuit, wherein, described data processing circuit also comprises reset control module, it is connected with described USB interface with described usb circuit respectively, for receiving the control signal 1 from described usb circuit and the control signal 2 from described USB interface simultaneously, and according to described control signal 1 and described control signal 2, reset signal is exported to described usb circuit by pre-seting condition.
Described device, described reset control module comprises judging unit and reset output unit, described judging unit is connected with described USB interface with described usb circuit respectively, for receiving described control signal 1 and described control signal 2, judge that described control signal 1 and described control signal 2 pre-set condition described in meeting, export control signal 3 to described reset output unit, described reset output unit, for responding described control signal 3, exports reset signal.
Described device, described usb circuit is chip FT245BM.
Described device, described control signal 1 is the output signal of FT245BM chip pin 10, and described control signal 2 is the power bus signal of described USB interface.
Described device, described data processing circuit is on-site programmable gate array FPGA.
Be applied to a method for device as claimed in claim 1, comprise the steps:
A1: described data processing circuit receives the control signal 1 from described usb circuit and the control signal 2 from described USB interface;
A2: judge whether described control signal 1 and described control signal 2 are high level simultaneously, are perform steps A 3;
A3: detection control signal 1 and control signal 2 are the duration of high level simultaneously, judges whether the described duration exceedes default value, is, performs steps A 4;
A4: export reset signal to described usb circuit, return steps A 2.
Described method, described default value is 5 seconds.
Described method, described reset signal is continue the low level pulse signal of at least 5 milliseconds.
Described method, described usb circuit is FT245BM chip.
Described method, described data processing circuit is on-site programmable gate array FPGA.
Described method, described control signal 1 is the output signal of FT245BM chip pin 10, and described control signal 2 is the power bus signal of described USB interface.Adopt such scheme, the present invention is by arranging reset control module, and what automatic on-line detected usb communication device falls chain fault, and automatic on-line sends reset signal to USB interface chip and makes it again to reset, do not need again to pull out, insert USB data line, solve the fault of communication disruption online.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of prior art;
Fig. 2 is the schematic diagram of the embodiment of the present invention 1;
Fig. 3 is the structural representation of the embodiment of the present invention 2;
Fig. 4 is the schematic diagram of the embodiment of the present invention 3.
Embodiment
Below in conjunction with the drawings and specific embodiments, the present invention is described in detail.
Embodiment 1
As shown in Figure 2, present embodiments provide a kind of USB interface telecommunication circuit on-line maintenance device, comprise usb 10, usb circuit 11 and data processing circuit 12, in the present embodiment, usb circuit 11 adopts interface chip FT245BM to realize its function, data processing circuit 12 adopts on-site programmable gate array FPGA to realize its function, certainly, those skilled in the art also can select other similar hardware as required, such as interface chip can also adopt FT245BL, FT245RL etc., data processing circuit 12 also can adopt single-chip microcomputer or complex programmable gate array CPLD etc.,
FT245BM is connected with data processing circuit FPGA with usb 10, for the data communication between usb 10 and FPGA, the method of attachment real prior art of FT245BM and usb 10 and data processing circuit FPGA, do not repeat them here, following emphasis describes the contribution part of the present invention to prior art.
One reset control module 121 is also set in data processing circuit FPGA, reset control module 121 receives control signal 1---the USB_PWREN from usb circuit FT245BM simultaneously, also be the output of FT245BM chip the 10th pin and control signal 2---the USB_VBUS from usb 10, also namely+the 5V of USB interface holds, this+5V is adopted to hold the signal after resistance R1 dividing potential drop in the present embodiment, reset control module 121 is according to the state of control signal USB_PWREN and control signal USB_VBUS, determine whether to export reset signal to the reset terminal (the 4th pin) of FT245BM, specifically, when USB_VBUS is low level, when USB_PWREN is high level, now represent that USB data line is not plugged, so now USB device is necessarily in the state of disconnection, reset control module does not make any action, USB_VBUS is high, and USB_PWREN is low, now represent that USB line is plugged, and usb communication is normal, equally without the need to process, USB_VBUS is high, and USB_PWREN be high, and this kind of situation represents that USB line is plugged, but USB device is in suspended state, and this just represents that usb communication is made mistakes, but USB driving usually can the connection of reverting equipment.Therefore after this situation occurs, make a decision again after needs wait for a period of time, if after having spent several seconds be still this state, then represent USB connect always mistake and cannot reply, now just need, to sending the low level reset signal that a duration is several milliseconds in FT245BM, so just can recover the connection of USB.
Like this, by arranging reset control module, what automatic on-line detected usb communication device falls chain fault, and automatic on-line sends reset signal to USB interface chip and makes it again to reset, do not need again to pull out, insert USB data line, solve the fault that usb communication interrupts online.
Embodiment 2
The present embodiment has done optimal design further to the reset control module 121 in embodiment 1, as shown in Figure 3, reset control module 121 comprises judging unit 1211 and reset output unit 1212, judging unit 1211 reception control signal 1 and control signal 2, and control signal 1 and control signal 2 are judged and detected, output signal reset output unit 1212 according to judgement and testing result, control it and whether export the reset terminal of reset signal USB_RST to usb circuit.
Such as, described reset control module comprises judging unit and reset output unit, and judging unit comprises receiver module, the first judge module, detection module and the second judge module, and reset output unit comprises respond module and output module.Receiver module receives described control signal 1 and described control signal 2, be sent to the first judge module, judge whether described control signal 1 and described control signal 2 are high level simultaneously by it, if the result is negative, then do not deal with, if when being high level simultaneously, it is then the duration of high level by detection module detection control signal 1 and control signal 2 simultaneously, be sent to the second judge module, judge whether the described duration exceedes default value by it, if the result is negative, then do not deal with, if when exceeding default value, export control signal 3 to respond module, respond module receives control signal 3, then start output module, reset signal is exported to described usb circuit by output module.
A kind of embodiment is control signal 1---the USB_PWREN that judging unit 1211 receives from usb circuit FT245BM, also be the output of FT245BM chip the 10th pin and control signal 2---the USB_VBUS from usb 10, also namely+the 5V of USB interface holds, reset output unit 1212 is according to the state of control signal USB_PWREN and control signal USB_VBUS, determine whether to export reset signal to the reset terminal (the 4th pin of FT245BM) of FT245BM, so further optimal design data processing circuit structure, improves resource utilization ratio.
Embodiment 3
The present embodiment provides a kind of method being applied to the usb communication on-line maintenance of above-mentioned any embodiment, and Fig. 4 is the process flow diagram of the present embodiment, and the method comprises the following steps: A1: data processing circuit reception control signal 1 and control signal 2; A2: judge whether control signal 1 and control signal 2 are high level simultaneously, if NO, attonity; If yes, then continue to perform following steps; A3: whether detection control signal 1 and control signal 2 exceed default value for the duration of high level simultaneously, if NO, attonity, if yes, continues to perform following steps; A4: export reset signal to usb circuit, return steps A 2 simultaneously.
In order to describe said method in detail, in the present embodiment, hardware circuit usb circuit 11 adopts interface chip FT245BM to realize its function, data processing circuit 12 adopts on-site programmable gate array FPGA to realize its function, certainly, those skilled in the art also can select other similar hardware as required, such as interface chip can also adopt FT245BL, FT245RL etc., and data processing circuit 12 also can adopt single-chip microcomputer or complex programmable gate array CPLD etc.
Steps A 1: after system electrification, FPGA reception control signal 1---USB_PWREN is also the output of FT245BM chip the 10th pin and control signal 2---the USB_VBUS from usb 10, is also the signal of+5V end of USB interface.
Steps A 2: judge whether control signal 1 and control signal 2 are high level simultaneously, if NO, attonity; If yes, then continue to perform steps A 3.Specifically, when USB_VBUS is low level, when USB_PWREN is high level, now represent that USB data line is not plugged, so now USB device is necessarily in the state of disconnection, reset control module does not make any action; USB_VBUS is high, and USB_PWREN is low, now represent that USB line is plugged, and usb communication is normal, equally without the need to process; USB_VBUS is high, and USB_PWREN is high, and this kind of situation represents that USB line is plugged, but USB device is in suspended state, and this just represents that usb communication is made mistakes, and continues steps A 3.
Steps A 3: detect, judge control signal 1 and control signal 2 simultaneously for whether the duration of high level exceedes default value, if NO, attonity, if yes, continues to perform following steps; In a particular application, USB drives usually can the connection status of reverting equipment, therefore when USB_VBUS, USB_PWREN are high, need to detect it whether to be continuously high level and to have exceeded Preset Time, if after having spent this time be still all high level state, then represent USB connect always mistake and cannot reply, now continue perform steps A 4, in this step, above-mentioned Preset Time was preferably set to for 5 seconds.
Steps A 4: export reset signal to usb circuit, return steps A 2 simultaneously; This step sends the low level reset signal USB_RST that a duration is several milliseconds on the basis of above-mentioned steps the reset terminal of FT245BM, and so just can recover the connection of USB, preferably, the low level time of reset signal USB_RST is at least 5 milliseconds.
Another example, as shown in Figure 3, said method is done following optimization, reset control module 121 is set in data processing circuit 12, judging unit 1211 and reset output unit 1212 are set in reset control module 121, judging unit 1211 reception control signal 1 and control signal 2, and control signal 1 and control signal 2 are judged and detected, output signal reset output unit 1212 according to judgement and testing result, control it and whether export the reset terminal of reset signal USB_RST to usb circuit.Specifically, judging unit 1211 judges whether control signal 1 and control signal 2 are high level simultaneously, if yes, then continue to detect, judge control signal 1 and control signal 2 simultaneously for whether the duration of high level exceedes default value, if yes, then export control signal 3 to reset output unit 1212, reset output unit 1212 exports reset signal in response to control signal 3 to usb circuit, afterwards, judging unit 1211 continues to judge whether control signal 1 and control signal 2 are high level simultaneously, repeat above step, until failture evacuation.
Like this, by reset control module to control signal 1 and control signal 2 comprehensive descision, what automatic on-line detected usb communication device falls chain fault, automatic on-line sends reset signal to USB interface chip and makes it again to reset, do not need again to pull out, insert USB data line, solve the fault that usb communication interrupts online.
Should be understood that, for those of ordinary skills, can be improved according to the above description or convert, and all these improve and convert the protection domain that all should belong to claims of the present invention.
Claims (10)
1. the device of a usb communication on-line maintenance, comprise USB interface, usb circuit and data processing circuit, described usb circuit is connected with described data processing circuit with described USB interface respectively, for the data communication between described USB interface and described data processing circuit, it is characterized in that, described data processing circuit also comprises reset control module, described reset control module comprises judging unit and reset output unit, described judging unit is connected with described USB interface with described usb circuit respectively, for receiving from the control signal USB_PWREN of described usb circuit and the control signal USB_VBUS from described USB interface simultaneously, and according to described control signal USB_PWREN and described control signal USB_VBUS, judge described control signal USB_PWREN and described control signal USB_VBUS simultaneously for whether the duration of high level exceedes default value, then export control signal 3 to described reset output unit, described reset output unit is for responding described control signal 3, export reset signal.
2. device according to claim 1, is characterized in that, described usb circuit is chip FT245BM.
3. device according to claim 2, is characterized in that, described control signal USB_PWREN is the output signal of FT245BM chip pin 10, and described control signal USB_VBUS is the power bus signal of described USB interface.
4. device according to claim 1, is characterized in that, described data processing circuit is on-site programmable gate array FPGA.
5. be applied to a method for device as claimed in claim 1, it is characterized in that, comprise the steps:
A1: described data processing circuit receives from the control signal USB_PWREN of described usb circuit and the control signal USB_VBUS from described USB interface;
A2: judge whether described control signal USB_PWREN and described control signal USB_VBUS is high level simultaneously, is perform steps A 3;
A3: detection control signal USB_PWREN and control signal USB_VBUS is duration of high level simultaneously, judges whether the described duration exceedes default value, is, performs steps A 4;
A4: export reset signal to described usb circuit, return steps A 2.
6. method according to claim 5, is characterized in that, described default value is 5 seconds.
7. method according to claim 5, is characterized in that, described reset signal is continue the low level pulse signal of at least 5 milliseconds.
8. method according to claim 5, is characterized in that, described usb circuit is FT245BM chip.
9. method according to claim 5, is characterized in that, described data processing circuit is on-site programmable gate array FPGA.
10. a method according to claim 9, is characterized in that, described control signal USB_PWREN is the output signal of FT245BM chip pin 10, and described control signal USB_VBUS is the power bus signal of described USB interface.
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| Application Number | Priority Date | Filing Date | Title |
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| CN200910088772.4A CN101650702B (en) | 2009-07-10 | 2009-07-10 | On-line USB communication maintenance device and method |
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| Application Number | Priority Date | Filing Date | Title |
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| CN200910088772.4A CN101650702B (en) | 2009-07-10 | 2009-07-10 | On-line USB communication maintenance device and method |
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| CN101650702A CN101650702A (en) | 2010-02-17 |
| CN101650702B true CN101650702B (en) | 2015-04-01 |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102012888A (en) * | 2010-12-06 | 2011-04-13 | 无敌科技(西安)有限公司 | Electronic device capable of automatically restoring in transmission interruption and method thereof |
| CN103955414A (en) * | 2014-04-24 | 2014-07-30 | 深圳市道通科技有限公司 | Self-restoration method and device of USB (universal serial bus) Host fault |
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| CN201084145Y (en) * | 2007-10-19 | 2008-07-09 | 陕西海泰电子有限责任公司 | USB-GPIB interface converter |
| CN201179276Y (en) * | 2008-03-03 | 2009-01-14 | 深圳迈瑞生物医疗电子股份有限公司 | Defibrillation instrument with USB interface |
| CN101408902A (en) * | 2008-10-06 | 2009-04-15 | 南京大学 | Method for acquiring and transporting high speed data based on FPGA and USB bus |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040068330A1 (en) * | 2002-10-04 | 2004-04-08 | Ncr Corporation | Methods and apparatus for remote programming of field programmable gate arrays |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201084145Y (en) * | 2007-10-19 | 2008-07-09 | 陕西海泰电子有限责任公司 | USB-GPIB interface converter |
| CN201179276Y (en) * | 2008-03-03 | 2009-01-14 | 深圳迈瑞生物医疗电子股份有限公司 | Defibrillation instrument with USB interface |
| CN101408902A (en) * | 2008-10-06 | 2009-04-15 | 南京大学 | Method for acquiring and transporting high speed data based on FPGA and USB bus |
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