CN101616124A - Use the transmitter and receiver of pseudo orthogonal code - Google Patents

Use the transmitter and receiver of pseudo orthogonal code Download PDF

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Publication number
CN101616124A
CN101616124A CN200810131436A CN200810131436A CN101616124A CN 101616124 A CN101616124 A CN 101616124A CN 200810131436 A CN200810131436 A CN 200810131436A CN 200810131436 A CN200810131436 A CN 200810131436A CN 101616124 A CN101616124 A CN 101616124A
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Prior art keywords
orthogonal code
pseudo orthogonal
transmitter
pseudo
data
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赵镇雄
金容诚
金度勋
金善熙
洪大基
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Electro-Components Institute
Korea Electronics Technology Institute
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Electro-Components Institute
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Abstract

A kind of transmitter that uses pseudo orthogonal code, this transmitter comprises: be serial to parallel converters, it is launched data transaction with serial and becomes 9 parallel-by-bit data; With the pseudo orthogonal code memory, it receives described parallel data and utilizes the data that receive to export 16 pseudo orthogonal codes as the address from the described parallel converters that is serial to.This pseudo orthogonal code memory has the Input Address of as above equation expression and the relation of output code, and wherein C (i) is the pseudo orthogonal code value, and i is everybody of pseudo orthogonal code, 0≤i≤15, and b 0-b 8It is the emission data bit flow of importing as the address in the memory.Therefore, use the efficiency of transmission of the emittor/receiver of orthogonal code to be significantly improved.

Description

Use the transmitter and receiver of pseudo orthogonal code
Technical field
The present invention relates to use the transmitting set and the receiver of orthogonal code, more particularly, relate to pseudo-quadrature transmitter and receiver, it has the spectrum efficiency higher than common orthogonal coding scheme.
Background technology
Typical quadrature code table has been shown among Fig. 1.The orthogonal encoder of prior art receives 4 bits altogether, and bit stream has 16 (=2 4) the kind situation.
Usually, the orthogonal code with 16 sign indicating numbers be necessary for 16 long, Fig. 1 illustration an example of Walsh orthogonal code.
Orthogonal between the Walsh sign indicating number row in orthogonal code is very important.For example, as represented in the following equation, the cross correlation value of a Walsh sign indicating number " 0000000000000000 " and the 2nd Walsh sign indicating number " 0101010101010101 " is zero.This means that two sign indicating numbers are orthogonal.
c = 1 16 ∑ i = 0 15 ( 2 * CODEld i - 1 ) × ( 2 / CODE 2 d i - 1 ) = 0
As represented in the following equation, the autocorrelation value of utilizing a Walsh sign indicating number to be calculated is " 1 ".
c = 1 16 ∑ i = 0 15 ( 2 * CODEld i - 1 ) × ( 2 * CODEld i - 1 ) = 1
Because the orthogonal coding scheme of correlation technique needs 16 sign indicating number bits to transmit 4 data bits altogether, so its spectrum efficiency is 0.25.Usually, 1-Q modulation systems shows good performance under the situation that produces interference owing to diffusion effect.This scheme is used for interim standard (IS:InterimStandard)-95 (a kind of cellular standards).
Yet this system has very low spectrum efficiency, causes channel wastage.Therefore, need new the having spectral efficient and have the orthogonal code modulation scheme of robustness for interference of exploitation.
Summary of the invention
Therefore, the purpose of this invention is to provide the transmitter and receiver that uses the encoding scheme that is different from existing orthogonal scheme to obtain pseudo orthogonal code, so that can use the sign indicating number with existing orthogonal code equal length to send the more data bit, obtain the spread spectrum characteristic simultaneously, thereby improve spectrum efficiency.
In order to realize these and other advantages and according to principle of the present invention, as concrete enforcement and broadly described here, according to an aspect of the present invention, use the transmitter of pseudo orthogonal code to comprise: be serial to parallel converters, it is launched data transaction with serial and becomes 9 parallel-by-bit data; With the pseudo orthogonal code memory, it receives described parallel data and utilizes the data that receive to export 16 pseudo orthogonal codes as the address from the described parallel converters that is serial to, and wherein said pseudo orthogonal code memory has the Input Address of following equation expression and the relation of output code:
Figure S2008101314369D00021
Figure S2008101314369D00023
Figure S2008101314369D00024
Wherein C (i) is the pseudo orthogonal code value, and i is everybody of pseudo orthogonal code, 0≤i≤15, and b 0-b 8It is the emission data bit flow of importing as the address in the memory.
Described transmitter can also comprise the encrypting module that the output of described pseudo orthogonal code memory is encrypted.
Described transmitter can also comprise the encrypting module that the described output that is serial to parallel converters is encrypted.
In order to realize these and other advantages and,, according to a further aspect in the invention, to use the receiver of pseudo orthogonal code to comprise as concrete enforcement and broadly described here according to principle of the present invention: memory, it stores 512 16 pseudo orthogonal codes; Sheer, it is that the received signal of unit after to channel-decoding carried out cutting with 16; 512 correlators, it is respectively applied for of receiving in 512 16 pseudo orthogonal codes and from 16 bit data of described sheer, described 512 correlators have call number (index) separately; And maximum-value selector, it is connected to described correlator to select maximum in the output valve of described correlator.
Other advantage of the present invention, purpose and feature are easier to be clear when describing in detail below investigating in conjunction with the accompanying drawings.
Description of drawings
Accompanying drawing is included further understanding of the invention to be provided and to be merged in and to constitute the application's a part, shows embodiments of the present invention, and is used from specification one and explains principle of the present invention.
Fig. 1 illustration the relation between prior art Walsh orthogonal code and the data bit;
Fig. 2 is the block diagram according to the pseudo-orthogonal encoder of an embodiment of the invention;
Fig. 3 shows the table according to the correlation properties of the pseudo orthogonal code of an embodiment of the invention;
Fig. 4 is the block diagram of pseudo-orthogonal modulation scheme;
Fig. 5 shows the table according to the modulation scheme and the relation between the chnnel coding of an embodiment of the invention;
Fig. 6 is the signal constellation which of modulation scheme;
Fig. 7 illustration the relation between modulation scheme and the TCM;
Fig. 8 illustration use structure according to the receiver of the pseudo-orthogonal coding/decoding scheme of an embodiment of the invention;
Fig. 9 A to Fig. 9 D is the pseudo orthogonal code table according to an embodiment of the invention.
Embodiment
Describe embodiment hereinafter with reference to the accompanying drawings in detail.Yet, can implement the present invention by various ways, and should not be understood that the execution mode that is confined to propose here.Certainly, provide these execution modes can be so that the disclosure comprehensively and complete, and will fully be passed on scope of the present invention to those skilled in the art.
The objective of the invention is a kind of like this system of design, this system can substitute typical orthogonal code and use pseudo orthogonal code, uses the sign indicating number bit, acquisition spread spectrum characteristic and the transmission more data that have with the orthogonal code equal length.
Specifically, can be by being to have with 16 pseudo orthogonal code of the identical figure place of prior art orthogonal code significantly that to improve be 0.25 spectrum efficiency in the prior art with 9 bit data bits switch.
In order to explain native system, 9 input bits (transmission data bit flow) are expressed as follows:
b=(b 8,b 7,b 6,b 5,b 4,b 3,b 2,b 1,b 0)
The binary representation of time index i (0≤i≤15) of supposing 16 output bit is as follows:
i=(i 3,i 2,i 1,i 0)
For example, the 6th output bit is expressed as i=5=(i 3, i 2, i 1, i 0)=(0,1,0,1).In this case, generate as the following represented pseudo orthogonal code of equation:
Figure S2008101314369D00041
Figure S2008101314369D00042
Figure S2008101314369D00043
(1)
In the superincumbent equation 1,, therefore generate 512 (=2 altogether because the input figure place is 9 9) individual sign indicating number.
That is to say that the total bit of the sign indicating number that is produced is 16, and has 512 kinds of situations.According to one in 16 512 long sign indicating number sequences of type selecting of input bit.
Therefore, because the pseudo orthogonal code system needs 16 bits to send 9 bits altogether, so its spectrum efficiency is 0.5625.Compare with orthogonal code, spectrum efficiency has improved 225%.
Fig. 2 is the block diagram of pseudo-orthogonal encoder.As shown in Figure 2, ROM can be used as pseudo-orthogonal encoder of the present invention.The pseudo orthogonal code that this ROM storage is 512 16, and ROM has 9 address pin, by this address pin input data bit to be sent.Select and export in 512 pseudo orthogonal codes one.This process is exactly pseudo-orthogonal coding process.The size of this ROM is 2 9* 512.
The expression of all pseudo orthogonal codes is shown in Fig. 9 A to Fig. 9 D, and the correlation properties of this pseudo orthogonal code as shown in Figure 3.Because the correlation properties of Fig. 3 cause this quadrature modulation to reduce systematic function relatively, but but greatly improved its spectrum efficiency.
Fig. 4 is the block diagram of pseudo-orthogonal modulation scheme.Data transaction to be sent is become 9 parallel data and this parallel data of 9 is input in 9 address pin of ROM by being serial to parallel converters.
Select and export in 512 pseudo orthogonal codes one according to address input (values of data to be sent).By and walk to serial convertor and convert selected pseudo orthogonal code to serial data.Encryption key can be joined in the output code in order to increase fail safe.Can before digital coding, add this encryption key.
As shown in Figure 5, after coding,, utilize difference quadrature phase shift keying (DQPSK), Quadrature Phase Shift Keying (QPSK), 16 quadrature amplitude modulation (16QAM), 32QAM or 64QAM to carry out the signal modulation according to needed data transfer rate.
About modulation scheme, adopt QPSK as basic modulation scheme, then adopt DQPSK for the ease of receiving.In addition, 16/32/64QAM can use together so that transmit data changeably with High Data Rate.
Fig. 6 is the planisphere of the signal that transmits on actual channel according to QPSK, DQPSK and 16/32/64QAM.
In the signal transmission of reality, need normalized to make the signal of all modulation schemes have same average power.For example, QPSK and DQPSK multiply by " 1 ", and 16QAM multiply by
Figure S2008101314369D00051
32QAM multiply by
Figure S2008101314369D00052
64QAM multiply by
Figure S2008101314369D00053
DQPSK is a modulation scheme of supporting asynchronous demodulation.If 2 bits that will send are (0,0), then their phase shift is 0, if be (0,1), then their phase shift is II/2, if be (1,1), then their phase shift is II, if be (1,0), then their phase shift is 3II/2.
Fig. 7 illustration grid coding (Trelliscoding) process of QPSK and 16/32/64QAM modulation scheme.
Trellis-coded modulation (TCM) is included in to improve the performance according to transmitter and receiver of the present invention.TCM according to the present invention combines with top modulation scheme and chnnel coding thereof.
As shown in Figure 7,6 bit streams by 5 input bits coding to ([x n 5, x n 4, x n 3, x n 2, x n 1], [y n 5, y n 4, y n 3, y n 2, y n 1, y n 0]) be the I/O that trellis encoder has.When the output bit was 6, it was mapped to the 64QAM code element.5 bit streams by 4 input bits coding to ([x n 4, x n 3, x n 2, x n 1], [y n 4, y n 3, y n 2, y n 1, y n 0]) be mapped to the 32QAM code element.4 bit streams by 3 input bits coding to ([x n 3, x n 2, x n 1], [y n 3, y n 2, y n 1, y n 0]) be mapped to the 16QAM code element.2 bit streams by 1 input bit coding to ([x n 1], [y n 1, y n 0]) be mapped to the QPSK code element.
Fig. 8 illustration according to the structure of the receiver of the pseudo-orthogonal coding scheme of the utilization of an embodiment of the invention.
With reference to Fig. 8, this receiver comprises that ROM, correlator and maximum-value selector are to carry out demodulation to the transmission signals according to the pseudo orthogonal code coding.
ROM stores 512 16 pseudo orthogonal codes, and these yards are and the identical sign indicating number of sign indicating number in the pseudo-orthogonal encoder according to the present invention.This ROM is as demodulator.Simultaneously, pseudo orthogonal code has their call number.This call number value is the corresponding memory address value of code value with the pseudo-orthogonal encoder of transmitter.
This receiver further comprises and corresponding 512 correlators of exporting from ROM of 512 pseudo orthogonal codes.Each correlator receives in 512 pseudo orthogonal codes one and the signal that receives by channel.
For pseudo-orthogonal demodulation signal being carried out demodulation, BPSK (or QPSK etc.) restituted signal is input in the correlator at receiving terminal.
Correlator calculates correlation by the pseudo orthogonal code that multiply by them.In the correlation of these correlators, having only a value under the noiseless state is 1 and other values are 0.
Therefore, maximum-value selector is selected maximum from these correlations, selects the call number with the corresponding pseudo orthogonal code of this maximum, and converts selected call number to binary number.Can obtain original 9 like this and send signal.
That is, because the call number value of each pseudo orthogonal code is identical with the Input Address value of the encoder of transmitting system, so have the identical value of data bit that sends with this transmitting system.Therefore, the call number by the selected peaked pseudo orthogonal code of the maximum-value selector that will generate receiving system is converted into binary system and obtains original data bits.
Because above-mentioned pseudo-1-Q modulation systems needs 16 bits to send 9 bits altogether, so its spectrum efficiency puppet 0.5625.So, compare spectrum efficiency with quadrature modulation and be significantly increased.
According to the present invention, utilize the encoding scheme that is different from existing orthogonal code scheme to obtain pseudo orthogonal code.So, use have with the orthogonal code equal length the sign indicating number and obtain spreading gain in, can send more data.
Because under the situation that does not deviate from spirit of the present invention and substantive characteristics, can implement the present invention with different forms, should also be appreciated that, above-mentioned execution mode is not limited to aforesaid any details, unless otherwise noted, otherwise should in the spirit and scope that claims limit, explain widely, so wish that claims comprise the border of dropping on claim and scope is interior or the interior all modifications example and the modified example of equivalent of this border or scope.

Claims (7)

1. transmitter that uses pseudo orthogonal code, this transmitter comprises:
Be serial to parallel converters, it is launched data transaction with serial and becomes 9 parallel-by-bit data; With
The pseudo orthogonal code memory, it receives described parallel data and utilizes the data that receive to export 16 pseudo orthogonal codes as the address from the described parallel converters that is serial to,
Wherein said pseudo orthogonal code memory has with the Input Address of following equation expression and the relation of output code:
Figure A2008101314360002C1
Figure A2008101314360002C3
Wherein C (i) is the pseudo orthogonal code value, and i is everybody of pseudo orthogonal code, 0≤i≤15, and b 0-b 8It is the emission data bit flow of importing as the address in the memory.
2. transmitter as claimed in claim 1, this transmitter also comprises the encrypting module that the output of described pseudo orthogonal code memory is encrypted.
3. transmitter as claimed in claim 1, this transmitter also comprise the encrypting module that the described output that is serial to parallel converters is encrypted.
4. transmitter as claimed in claim 1, this transmitter also comprises the modulator that the output of described pseudo orthogonal code memory is modulated, wherein this modulator comprises:
Choice device, it selects modulation scheme; With
Modulating device, it utilizes a kind of modulation the among DQPSK, QPSK, 16QAM, 32QAM and the 64QAM that described choice device selects.
5. receiver that uses pseudo orthogonal code, this receiver comprises:
Memory, it stores 512 16 pseudo orthogonal codes;
Sheer, it is that the received signal of unit after to channel-decoding carried out cutting with 16;
512 correlators are respectively applied for of receiving in described 512 16 pseudo orthogonal codes and from 16 bit data of described sheer, these 512 correlators have call number separately; And
Maximum-value selector, it is connected to described correlator to select maximum in the output valve of described correlator.
6. receiver as claimed in claim 5, this receiver also comprises the transmission dector, this transmission dector carries out Binary Conversion to the call number of exporting the peaked correlator of being selected by described maximum-value selector.
7. receiver as claimed in claim 6, wherein, described call number is identical with following address: the relevant position of storing the pseudo orthogonal code that is input to respective correlator in the described memory has been indicated in this address.
CN200810131436A 2008-06-25 2008-06-25 Use the transmitter and receiver of pseudo orthogonal code Pending CN101616124A (en)

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Application publication date: 20091230