CN101611542A

CN101611542A - Mixer

Info

Publication number: CN101611542A
Application number: CN200780044205.8A
Authority: CN
Inventors: 石黑和久; 高桥义昭
Original assignee: Ricoh Co Ltd; Nigata Semitsu Co Ltd
Current assignee: NSC Co Ltd; Ricoh Co Ltd
Priority date: 2006-12-01
Filing date: 2007-11-30
Publication date: 2009-12-23
Also published as: JP2008141452A; WO2008066208A1

Abstract

Be used for the transistor (N3) of constant-current supply and (N4) respectively cascade be connected to the formation differential amplifier differential transistor to (N1) and each source side (N2) in, bias circuit (10) is constituted to differential transistor to (N1) and (N2) and be used for the transistor (N3) of constant-current supply and (N4) apply the bias voltage (Vgs) of same potential, thus, even the differential transistor during at no signal to (N1) and bias voltage (N2) be all (Vgs) at transistor that is used for constant-current supply (N3) and bias voltage (N4), the drain current of each transistor (N1)～(N4) of flowing through becomes the electric current of equal value with the reference current (Ir) of bias circuit (10) of flowing through, and still can make the differential amplifier normal running.

Description

Mixer

Technical field

The present invention relates to a kind of mixer (freq converting circuit), for example, be suitable for the doubly balanced type mixer.

Background technology

Fig. 1 is the figure that the configuration example of doubly balanced type mixer in the past is shown.As shown in Figure 1, the doubly balanced type mixer is at pair of input signals V _IN1And V _IN2Input terminal between be equipped with and comprise one group of differential transistor (N1, differential amplifier 51 N2).This differential amplifier 51 is a differential transistor to (N1, the common source structure of the common connection of each source electrode N2) are connected to this common source limit as the transistor N3 of constant-current supply.

And, at a pair of local signal V ₁And V ₂Input terminal between be equipped with comprise two groups of differential transistors to (N5, N6), (N7, N8) } two balancing circuitrys 52.Two balancing circuitrys 52 are as described below particularly to be constituted.

That is, a side differential transistor is to (N5, the differential transistor that reaches the opposing party between drain electrode N6) is to (N7, common connection respectively between drain electrode N8).And the grid of transistor N5 is connected with the grid of transistor N8 is common, a side local signal V ₁Be input to this common grid.And the grid of transistor N6 is connected with the grid of transistor N7 is common, the opposing party's local signal V ₂Be input to this common grid.

And the source electrode of transistor N5 is connected with the source electrode of transistor N7 is common, a side lead-out terminal OUT ₁Be connected to this common source electrode.And the source electrode of transistor N6 is connected with the source electrode of transistor N8 is common, the opposing party's lead-out terminal OUT ₂Be connected to this common source electrode.And the drain electrode of each transistor N5～N8 is connected to power vd D via resistor.

And above-mentioned differential amplifier 51 is as described below particularly to be constituted.That is, about a side transistor N1, its drain electrode is connected to a side differential transistor to (source electrode is connected to transistor N3 for N5, common source electrode N6).One side's input signal V _IN1Be input to grid.And about the opposing party's transistor N2, its drain electrode is connected to the opposing party's differential transistor to (source electrode is connected to transistor N3 for N7, common source electrode N8).The opposing party's input signal V _IN2Be input to grid.

The bias voltage of differential amplifier 51 is supplied with from bias circuit 53.In this bias circuit 53, transistor N21 is connected to a side constant-current supply Ir1.And, the constant-current supply Ir2 that transistor N22 that cascade connects and N23 are connected to the opposing party, transistor N22 is connected with the diode connected mode respectively with drain electrode with N23 grid separately.

And, at differential transistor the bias voltage of the grid of N1 and N2 is supplied with by transistor N22 and the N23 that cascade is connected.And, supply with by transistor N21 at the bias voltage of the grid of the transistor N3 that is used for constant-current supply.

But, under the situation of such structure, set that voltage is Vgs between a transistorized gate-to-source, then, need 2Vgs as the bias voltage of differential amplifier 51 (transistor N1 and N2).It is the reasons are as follows.

That is, the bias voltage of setting transistor N1 and N2 is Vgs, and then drain electrode-voltage between source electrodes of transistor N3 is 0[V], transistor N3 departs from normal operating area (zone of saturation).Thereby the drain current of the transistor N3 that flows through is uncorrelated with the reference current of the transistor N21 that flows through.Therefore, for transistor N3 and transistor N21 as the current mirroring circuit normal running, the bias voltage as transistor N1 and N2 needs 2Vgs.

In the case, the common source current potential of differential amplifier 51 is Vgs, and the drain voltage of differential amplifier 51 normal runnings need be more than about 2Vgs.Correspondingly, two balancing circuitrys 52 are connected with transistor N1 that constitutes differential amplifier 51 and the drain electrode of N2, are input to the local signal V of the differential transistor of the two balancing circuitrys 52 of formation to the grid of N5～N8 ₁And V ₂Mean direct voltage need be more than about 3Vgs.

Therefore, local signal V ₁And V ₂Be signal from the square wave of not shown local oscillator circuit output.For example, suppose Vgs=0.7[V], then as local signal V ₁And V ₂The upside current potential of square wave, need 3Vgs+0.2=2.3[V at least].And because the fluctuation of process, Vgs fluctuates, and therefore, needs surplus to a certain degree.Consequently,, need 2.4[V as the minimum operation supply voltage] degree, be difficult to realize for example 1.8[V] such low voltage operating.Therefore, the present invention seeks to, can reduce the operating power voltage of doubly balanced type mixer.

And, in order to use LVPS, there is the technology (for example, with reference to patent documentation 1) of supplying with differential right bias current separately with minimum bias potential.In the example shown in Figure 5 of this patent documentation 1, use reference current source and buffer circuits to generate differential right bias current with minimum voltage.

Patent documentation 1: the flat 11-513235 communique of special table

But the mixer in the past of above-mentioned patent documentation 1 record is made of bipolar transistor, and the emitter of differential amplifier (differential transistor to) is connected to ground via resistor.Therefore, then can not move the problem that exists the signal of single input not handle if not differential input to the input signal of differential amplifier input.And, there is the problem that needs transformer or the like in order to tackle differential input in input stage.

Summary of the invention

Therefore, the objective of the invention is, not only be merely able to reduce operating power voltage, and need not to use transformer or the like, no matter differential input or single input all can be tackled.

In order to address the above problem, according to the present invention, the transistor that is used for constant-current supply is connected respectively to each the right source side of one group of differential transistor that constitutes differential amplifier.And, for differential transistor to and be used for the transistor of constant-current supply, apply the bias voltage of same potential.Therefore, employed each transistor is a MOS transistor.

According to the present invention who constitutes as mentioned above, for with right each source side of the one group of differential transistor that constitutes differential amplifier transistor that is used for constant-current supply of being connected of cascade respectively, bias voltage is supplied with according to the relation of current mirror from bias circuit respectively, because such form, even the bias voltage of the differential amplifier during at no signal with at the identical size of transistorized bias voltage that is used for constant-current supply (not needing as in the past, to be the size of twice), still can be flow through one group of differential transistor to and a plurality of transistor drain electric currents that are used for constant-current supply of being connected with its cascade be electric current with the reference current equivalence of the bias circuit of flowing through.

Therefore, though the bias voltage of the differential amplifier during at no signal drop to at the identical size of transistorized bias voltage that is used for constant-current supply, still can make the differential amplifier normal running.Thus, the degree that can reduce according to the bias voltage of differential amplifier reduces the size of the whole necessary operations supply voltage of mixer.And mixer of the present invention is made of MOS transistor, and the source electrode point of differential amplifier is earth-free but be connected to constant-current supply, therefore, need not to use transformer or the like, no matter differential input or single input all can be tackled.

Description of drawings

Fig. 1 is the figure that the configuration example of mixer in the past is shown.

Fig. 2 is the figure that illustrates according to the configuration example of the mixer of first embodiment.

Fig. 3 is the figure that illustrates according to the configuration example of the mixer of second embodiment.

Fig. 4 is the figure that the configuration example of the circuit that replaces bias circuit shown in Figure 3 and can be suitable for is shown.

Embodiment

(first embodiment)

Below, based on description of drawings one embodiment of the present of invention.Fig. 2 is the figure that illustrates according to the configuration example of the mixer of first embodiment.In Fig. 2, to giving identical label with the formation element that formation element shown in Figure 1 has an identical function.And the mixer of present embodiment shown in Figure 2 handles by for example CMOS (complementary metal oxide semiconductors (CMOS)) or Bi-CMOS is (bipolar-as CMOS) to handle and be integrated in an IC (integrated circuit) chip.

In Fig. 2, N1 and N2 are that to constitute one group of differential transistor of input differential amplifier of mixer right, and N3 and N4 are a plurality of transistors that are used for constant-current supply that constitute constant-current supply.Be used for the transistor N3 of constant-current supply and N4 respectively cascade be connected to the source side of one group of differential transistor to N1 and N2.Like this, the difference of present embodiment and example in the past shown in Figure 1 be following some, cascade is connected transistor N1 with N3, cascade is connected transistor N2 with N4 simultaneously, differential transistor is connected with the N2 common source N1.

The differential transistor that constitutes the input differential amplifier is supplied with from bias circuit 10 bias voltage of N1 and N2 and transistor N3 that is used for constant-current supply that is connected with its cascade and N4.The bias circuit 10 of present embodiment for differential transistor to N1 and N2 and be used for the transistor N3 of constant-current supply and the bias voltage that N4 applies same potential.The size of the bias voltage that is applied is Vgs.

In the inside of bias circuit 10,4 transistor N11～N14 constitute low-voltage cascade current mirroring circuit.Wherein, two transistor N13 and N14 constitute the input circuit that the reference current Ir of input flows through.All the other two transistor N11 and N12 constitute output and reference current Ir same stream to the output circuit of electric current.

In the above-mentioned input circuit, cascade is connected two transistor N13 with N14, the grid of each transistor N13 and N14 connects with the diode connected mode with the drain electrode of the transistor N13 that is positioned at the upside that cascade is connected, and its drain electrode is connected in the current mirror mode with the grid of the transistor N11 of output circuit.

And in the output circuit, cascade is connected two transistor N11 with N12, and the grid that is positioned at the transistor N12 of the downside (ground connection side) that cascade connects is connected with the diode connected mode with the drain electrode of the transistor N11 that is positioned at upside.And this drain electrode (output point of output circuit) is connected respectively with the grid of transistor N3 that is used for constant-current supply and N4.

Constitute all the other two the transistor N15 of bias circuit 10 and N16 and be the pseudo-input circuit that has with the input circuit same circuits structure of low-voltage cascade current mirroring circuit.In the present embodiment, above-mentioned differential transistor is connected to the input point (drain electrode of transistor N15) of pseudo-input circuit to the bias point Va of N1 and N2, and the bias point Vb that is used for the transistor N3 of constant-current supply and N4 is connected to the output point (drain electrode of transistor N11) of output circuit.

Therefore, for each transistor N11～N14 of the input circuit that constitutes current mirror and output circuit all in the zone of saturation normal running, need make that (overdrive) voltage ratio threshold voltage of overdriving of transistor N11 and N13 is little to being sized to of transistor N12 and N14.That is, suitably select the size of each transistor N11～N14, make each transistor N11～N14 all be in saturation condition, Va=Vb=Vgs.And the size that constitutes the transistor N15 of pseudo-input circuit and N16 is measure-alike with transistor N13 that constitutes input circuit and N14's.

For example, constitute the transistor size of the transistor N11 of output circuit and N12 and the ratio of the transistor size of the transistor N13～N16 that constitutes input circuit and pseudo-input circuit, the former be (L=0.5, W=10), the latter be (L=1, W=10).L is a channel length, and W is a channel width.And transistor size shown here is an example than only, and is not to be defined in this size ratio.

Transistor N11～N14 constitutes current mirroring circuit, therefore identical with the reference current Ir of the transistor N13 of the input circuit of flowing through and N14 electric current also flow through the transistor N11 and the N12 of output circuit.And pseudo-input circuit has the circuit structure identical with input circuit, therefore, and identical electric current I r also flow through the transistor N15 and the N16 of pseudo-input circuit.That is, identical electric current I r supplies to each transistor N11～N16 of bias circuit 10.

By the transistor N11～N14 that constitutes bias circuit 10 shown in Figure 2, by setting each transistorized size as mentioned above, the transistor N11～N14 of bias circuit 10 and the transistor N1～N4 of mixer can be the relation of current mirror.In the case, the drain electrode of each transistor N1～N4-voltage between source electrodes Von is Vgs-Vt (Vt is a threshold voltage), can not be 0[V].Therefore, each transistor N1～N4 is all in the zone of saturation normal running.

Under the situation that constitutes above-mentioned mixer, be used for the transistor N3 of constant-current supply and the bias voltage of N4 and be about Vgs, the differential transistor of formation input differential amplifier also is about Vgs to the bias potential of N1 and N2, and drain voltage is Vgs.Therefore, be input to the local signal V of the differential transistor of the two balancing circuitrys of formation to the grid of N5～N8 ₁And V ₂The about 2Vgs of mean direct voltage.

Therefore, local signal V ₁And V ₂Be signal from the square wave of not shown local oscillator circuit output.For example, suppose Vgs=0.7[V], then as local signal V ₁And V ₂The upside current potential of square wave need 2Vgs+0.2=1.6[V at least].Therefore, even consider the fluctuation of process, the minimum operation supply voltage of mixer is 1.7[V only] degree.Therefore, can provide with than the low 0.7[V that reaches of example in the past] the doubly balanced type mixer operated of supply voltage.

Mixer according to present embodiment, be used for the transistor N3 of constant-current supply and N4 respectively cascade be connected to differential transistor each source side to N1 and N2, for two transistor N3 and N4 that are used for constant-current supply, apply bias voltage Vgs from bias circuit 10 according to the current mirror relation respectively, because such form, when the signal that is input to differential amplifier does not exist, even be all Vgs to the bias voltage of N1 and N2 with at transistor N3 that is used for constant-current supply and the bias voltage of N4 at differential transistor, transistor N1 that the cascade of flowing through connects and the drain current of N3 or N2 and N4 can for the electric current of the reference current Ir equivalence of the bias circuit 10 of flowing through.

Therefore, even the differential transistor during at no signal drops to Vgs to the bias voltage of N1 and N2, still can make the differential amplifier normal running.And, the mixer of present embodiment is made of MOS transistor, and the source electrode point of differential amplifier is earth-free but be connected to transistor N3 and the N4 that is used for constant-current supply, therefore, differential input or single input need not to use transformer or the like, no matter all can be tackled.

(second embodiment)

Below, based on the description of drawings second embodiment of the present invention.Fig. 3 is the figure that illustrates according to the configuration example of the mixer of second embodiment.Mixer shown in Figure 3 also handles by for example CMOS or the Bi-CMOS processing is integrated in an IC chip.Be that with the difference of first embodiment shown in Figure 2 the structure of bias circuit 20 and the differential transistor that constitutes the input differential amplifier are followed the example of the bias point Va's of N1 and N2.

Second embodiment is not equipped with the transistor N15 and the N16 of pseudo-input circuit shown in Figure 2.That is, the bias circuit 20 of second embodiment is equipped with low-voltage cascade current mirroring circuit, this low-voltage cascade current mirroring circuit comprise input circuit that the reference current Ir of input flows through and output and reference current Ir same stream to the output circuit of electric current.Differential transistor is connected to the input point (drain electrode of transistor N13) of input circuit to the bias point Va of N1 and N2.

Therefore, apply differential transistor is connected to the transistor N11 of output circuit to the input point of the input circuit of the bias voltage of N1 and N2 grid.Owing to generated the transistor N3 that is used for constant-current supply and the bias voltage of N4 in the output circuit, if therefore the input point of input circuit is not changed to the interchange Low ESR, then input signal overlaps the transistor N3 that is used for constant-current supply and the bias point Vb of N4.Therefore, wish by-pass capacitor C is connected between the input point and ground of input circuit.

Though be illustrated about first embodiment and second embodiment hereinbefore, the structure of

bias circuit

10,20 shown here illustrate as an example, and be not to be defined in this.Fig. 4 illustrates replacement bias circuit for example shown in Figure 3 20 and the figure of the configuration example of the circuit that can be suitable for.And, in this Fig. 4, to giving identical label with the formation element that formation element shown in Figure 3 has an identical function.

In the example of Fig. 4 (a), only constitute the input circuit of current mirroring circuit by a transistor N13.In the example of this Fig. 4 (a), with the example of Fig. 3 similarly, differential transistor is connected to the input point of input circuit to the bias point Va of N1 and N2, the bias point Vb that is used for the transistor N3 of constant-current supply and N4 is connected to the output point of output circuit.

In the example of Fig. 4 (b), do not adopt the structure of current mirroring circuit, but two transistor N11 that connected by cascade and N12 constitute bias circuit.In the example of this Fig. 4 (b), differential transistor is connected to the grid of the transistor N11 of upside to the bias point Va of N1 and N2, and the bias point Vb that is used for the transistor N3 of constant-current supply and N4 is connected to the grid of the transistor N12 of downside.And, connect with resistor R between two bias point Va and the Vb.

In the example of Fig. 4 (c), the structure that does not adopt cascade to connect, but by the transistor N13 that N1 and N2 is connected in the current mirror mode with differential transistor, constitute bias circuit with N4 with the transistor N11 that the current mirror mode is connected with the transistor N3 that is used for constant-current supply.In the example of this Fig. 4 (c), differential transistor is connected to the drain electrode of transistor N13 to the bias point Va of N1 and N2, and the bias point Vb that is used for the transistor N3 of constant-current supply and N4 is connected to the drain electrode of transistor N11.

And the bias circuit of structure shown in Figure 4 (still, being the part of removing by-pass capacitor C) also can be applicable to the bias circuit 10 of first embodiment shown in Figure 2.Under the situation of the bias circuit 10 that is applicable to Fig. 2, be provided with Fig. 4 (a) situation under transistor N13, Fig. 4 (b) situation of input circuit under the transistor N11 that is connected of cascade and the pseudo-input circuit of the transistor N13 same structure under N12, Fig. 4 (c) situation, differential transistor is connected to the input point of corresponding pseudo-input circuit to the bias point Va of N1 and N2.

And, be example although lift the doubly balanced type mixer in the above-described embodiments, yet be not limited thereto.

In addition, any one of the foregoing description only is to illustrate to be suitable for implementing specific example of the present invention, but not comes in view of the above technical scope of the present invention is carried out determinate explanation.That is, under the situation that does not break away from spirit of the present invention or purport, the present invention can implement with various forms.

The following describes the practicality on the industry.

The present invention can be used in the mixer of middle frequency being carried out frequency inverted.

Claims

1. a mixer is characterized in that, comprising:

Differential amplifier, it is right to comprise one group of differential transistor;

A plurality of transistors that are used for constant-current supply, cascade is connected to described one group of source side that differential transistor is right respectively; And

Bias circuit to reaching the described transistor that is used for constant-current supply, applies the bias voltage of same potential for described one group of differential transistor.

2. according to the described mixer of claim 1, it is characterized in that:

Described bias circuit comprises:

Current mirroring circuit, comprise input circuit that the reference current of input flows through, and output and described reference current same stream to the output circuit of electric current; And

Pseudo-input circuit constitutes in the same manner with the input circuit of described current mirroring circuit,

Wherein, described one group of right bias point of differential transistor is connected to the input point of described pseudo-input circuit, and the described transistorized bias point that is used for constant-current supply is connected to the output point of described output circuit.

3. according to the described mixer of claim 1, it is characterized in that:

Described bias circuit comprises current mirroring circuit, this current mirroring circuit comprise input circuit that the reference current of input flows through, and output and described reference current same stream to the output circuit of electric current,

Wherein, described one group of right bias point of differential transistor is connected to the input point of described input circuit, and the described transistorized bias point that is used for constant-current supply is connected to the output point of described output circuit.

4. according to the described mixer of claim 3, it is characterized in that:

The input point of described input circuit connects by-pass capacitor.

5. according to the described mixer of claim 1, it is characterized in that:

Described bias circuit comprises two transistors that cascade connects, and transistorized grid of the side is connected with the diode connected mode with the opposing party's transistor drain,

Described one group of right bias point of differential transistor is connected to the input point that described cascade connects, and the described transistorized bias point that is used for constant-current supply is connected to the output point that described cascade connects.