CN101610229A - The recurrence MSK modulation demodulation system and the method for joint LDPC encoding - Google Patents
The recurrence MSK modulation demodulation system and the method for joint LDPC encoding Download PDFInfo
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Abstract
The present invention proposes the modulation demodulation system of a kind of joint LDPC encoding and recurrence MSK, comprises transmitting terminal and receiving terminal.Described transmitting terminal comprises LDPC outer encoder and recurrence MSK modulator, and described receiving terminal comprises quadrature frequency conversion and low pass filter, thick Nonlinear Transformation in Frequency Offset Estimation module, buffer, demodulation selector, MSK differential ference spiral device, a N road frame synchronization correlation detector, MSK coherent demodulator, carrier wave and timing synchronous processing module, parallel/serial conversion module and ldpc decoder.The present invention is fused in the LDPC sign indicating number fully by the differential coding part with recurrence MSK, eliminated the performance loss that the MSK differential coding brings fully, and make full use of the characteristics that recurrence MSK can carry out differential ference spiral, need not under the prerequisite of accurate carrier synchronization, realize the detection of LDPC sign indicating number frame synchronization header sequence fast, switch to MSK coherent demodulation again, carry out synchronously and LDPC decoding, realized the function of fast demodulation and decoding.
Description
Technical field
The present invention relates to digital communication technology field, particularly a kind of combined coding modulation demodulation system and method.
Background technology
When in digital communication, adopting nonlinear power amplifier,, can adopt the permanent envelope modulation of continuous phase in order to improve the receptivity of signal.Wherein, MSK (Minimum Shift Keying, minimum phase shift keying) modulation has good spectral characteristic, can be operated in the most effective operate in saturation district of nonlinear power amplifier, and realize simple, therefore error performance is good, has obtained extensive use in wireless, satellite and deep space communication.
MSK modulation is as Continuous Phase Modulation, and it is binary system continuous phase encoder (CPE) and a memoryless modulator of 1/2 that its modulator can resolve into a code check.According to CPE is recurrence or onrecurrent form, and the MSK modulation can be divided into recurrence MSK and onrecurrent MSK.In comprising the combined coding modulating system of onrecurrent MSK, eliminated the influence of CPE differential coding among the MSK by the mode of precoding, the optimal design when wherein the design of chnnel coding is adopted binary phase shift keying (BPSK) modulation with it under additive white Gaussian noise (AWGN) channel is identical.And the CPE differential coding in the recurrence MSK modulation partly can be introduced correlation between the adjacent-symbol after the modulation, design combined coding recurrence MSK modulating system had considerable influence, make the optimum channel coding that under awgn channel, designs modulate the optimum performance that the system that carries out obtaining after the simple cascade can not reach this chnnel coding with recurrence MSK, therefore, in order further to improve the performance of the association system that adopts recurrence MSK modulation, part of the CPE differential coding among the MSK and chnnel coding need be carried out the combined optimization design.
The method that the combined coding modulation design is carried out in existing and MSK modulation comprises: the integrated processes of the integrated processes of the integrated processes of MSK and convolution code, MSK and Turbo code and MSK and LDPC (Low DensityParity Check, low-density checksum) sign indicating number.Wherein, the thought of MSK and convolution code integrated processes is that the CPE with MSK regards a special convolution code as, and itself and external convolution coder are carried out simple cascade, constitutes a compound convolution coder jointly.Be subject to the performance of convolution code itself, the poor-performing of this method, but realize simply being applicable to the occasion not high to performance requirement.The integrated processes of MSK and Turbo code comprises the integrated processes of MSK and serial Turbo code and the integrated processes of MSK and parallel Turbo code.The integrated processes of MSK and Turbo code improves a lot on performance compared to the integrated processes with convolution code, but because the implementation complexity of Turbo decoding is very high, and have the flat effect of error code, make this method on using, be restricted.The main thought of MSK and LDPC sign indicating number integrated processes is to increase pilotaxitic texture between the structured LDPC code of low encoder complexity and MSK, to eliminate the influence of CPE difference part to LDPC decoding.This method coding and decoding complexity is lower, and better performances has bigger Practical significance.Shortcoming is, increased pilotaxitic texture between LDPC sign indicating number and MSK, makes that the implementation complexity of whole system is higher, nor can eliminate the influence of differential coding among the MSK fully, influenced the practicality of this method.Therefore, need a kind of method to address the above problem.
Summary of the invention
Purpose of the present invention is intended to solve at least one of above-mentioned technological deficiency, particularly solves recurrence MSK differential coding brings loss to the performance of association system problem.
In order to achieve the above object, the present invention proposes the modulation demodulation system of a kind of joint LDPC encoding and recurrence MSK, comprises coded modulation end and demodulation coding end.Wherein, described coded modulation end is used for the input data are carried out the combined coding modulation treatment of joint LDPC encoding and recurrence MSK, comprises LDPC outer encoder and recurrence MSK modulator; Described demodulation coding end is used for carrying out to received signal the demodulation coding processing of combining LDPC decoding and recurrence MSK, comprises quadrature frequency conversion and low pass filter, thick Nonlinear Transformation in Frequency Offset Estimation module, buffer, demodulation selector, MSK differential ference spiral device, a N road frame synchronization correlation detector, MSK coherent demodulator, carrier wave and timing synchronous processing module, parallel/serial conversion module and ldpc decoder.
The present invention also proposes the code modulating method of a kind of joint LDPC encoding and recurrence MSK on the other hand, may further comprise the steps: the information data to input is carried out differential decoding and uniform enconding respectively; The result of described differential decoding and uniform enconding is carried out quadrature modulation respectively, obtain the coded modulation result.
The present invention also proposes the demodulation coding method of a kind of combining LDPC decoding and recurrence MSK again on the other hand, may further comprise the steps: after carrying out quadrature frequency conversion, low-pass filtering, thick Nonlinear Transformation in Frequency Offset Estimation and compensation to received signal successively, result is stored in the buffer memory; The described baseband signal data that are stored in the buffer memory are carried out differential ference spiral; Data after the described differential ference spiral are carried out coherent detection; If detect the frame synchronization head in the described coherent detection, then control described buffer memory and demodulation selector, make demodulation mode switch to MSK coherent demodulation, and locate the frame synchronization position of described LDPC decoding with the signal data of detected frame synchronization head, otherwise, proceed described coherent detection; The described signal data of having finished frame synchronization is carried out MSK coherent demodulation, obtain demodulating data; Described demodulating data is carried out carrier wave and regularly carries out LDPC decoding after the Synchronous Processing, with decode results judgement output.
The present invention is fused in the LDPC sign indicating number fully by the differential coding part with recurrence MSK, eliminated the performance loss that the MSK differential coding brings fully, and make full use of the characteristics that recurrence MSK can carry out differential ference spiral, need not under the prerequisite of accurate carrier synchronization, realize the detection of LDPC sign indicating number frame synchronization header sequence fast, switch to MSK coherent demodulation again, carry out synchronously and LDPC decoding, realized the function of fast demodulation and decoding.
Aspect that the present invention adds and advantage part in the following description provide, and part will become obviously from the following description, or recognize by practice of the present invention.
Description of drawings
Above-mentioned and/or additional aspect of the present invention and advantage are from obviously and easily understanding becoming the description of embodiment below in conjunction with accompanying drawing, wherein:
Fig. 1 is the general-purpose system structure chart of combined coding modulation and joint demodulation decoding;
Fig. 2 is the structure chart of the modulation demodulation system of the joint LDPC encoding of the embodiment of the invention and recurrence MSK;
Fig. 3 is the homophase-quadrature equivalence implementation structure figure of the recurrence MSK modulator of the embodiment of the invention;
Fig. 4 is the schematic diagram of the check matrix H of the embodiment of the invention;
Fig. 5 is the structure chart of the associating recurrence MSK demodulation LDPC decoding module of the embodiment of the invention;
Fig. 6 is the structure chart of a N road frame synchronization correlation detector of the embodiment of the invention;
Fig. 7 is under awgn channel, the emulation comparative result figure of the method for the embodiment of the invention and additive method.
Embodiment
Describe embodiments of the invention below in detail, the example of described embodiment is shown in the drawings, and wherein identical from start to finish or similar label is represented identical or similar elements or the element with identical or similar functions.Below by the embodiment that is described with reference to the drawings is exemplary, only is used to explain the present invention, and can not be interpreted as limitation of the present invention.
The present invention mainly is the differential coding part of recurrence MSK is fused in the LDPC sign indicating number fully, eliminate the performance loss that the MSK differential coding brings fully, and make full use of the characteristics that recurrence MSK can carry out differential ference spiral, need not under the prerequisite of accurate carrier synchronization, realize the detection of LDPC sign indicating number frame synchronization header sequence fast, switch to MSK coherent demodulation again, carry out synchronously and LDPC decoding, realize the function of fast demodulation and decoding.
As shown in Figure 1, the general-purpose system structure chart of deciphering for combined coding modulation and joint demodulation.At the coded modulation end of association system, behind the signal process LDPC outer encoder, be input to the MSK modulator by optional interleaver.Usually, adopt the LDPC sign indicating number of the complicated completely random structure of coding to have interleave function, interleaver is just optional for association system, but, LDPC sign indicating number for easy coding structures such as eIRA, also have correlation between the adjacent variable node of part in its structurized check matrix, this moment, association system need adopt interleaver to overcome correlation between the adjacent modulation signal that causes because of the MSK memory effect.Demodulation coding end at association system, for the joint demodulation decoding of not adopting the interleaving/deinterleaving structure, received signal obtains soft demodulating information behind the memoryless demodulator in MSK, and carry out joint decoding: at first with message delivery method, behind the differential decoderl among this soft demodulating information process MSK, message is passed to ldpc decoder to be handled, and the message feedback after the processing is returned the differential decoderl among the MSK, then, message will be between these two differential decoderls iteration, fully after the iteration, obtain decode results output.Scheme for adopting pilotaxitic texture needs additionally to increase the interleaving/deinterleaving device between these two decoders, so that randomization is carried out in the message transmission, and eliminate the correlation of message between adjacent-symbol.
As shown in Figure 2, be the structure chart of the joint LDPC encoding recurrence MSK modulation demodulation system of the embodiment of the invention.This system comprises transmitting terminal and receiving terminal.Transmitting terminal is made of LDPC outer encoder and recurrence MSK modulator.Receiving terminal comprises quadrature frequency conversion and low pass filter, thick Nonlinear Transformation in Frequency Offset Estimation module, buffer, demodulation selector, MSK differential ference spiral device, a N road frame synchronization correlation detector, MSK coherent demodulator, carrier wave and timing synchronous processing module, parallel/serial modular converter and ldpc decoder.
As shown in Figure 3, be homophase-quadrature equivalence implementation structure figure of the recurrence MSK modulator of the embodiment of the invention.This MSK modulator comprises CPE and memoryless modulator two parts of homophase-quadrature of differential coding structure, and wherein, the CPE of differential coding structure brings memory effect to modulation signal, and produces correlation between the adjacent-symbol that MSK is modulated; The memoryless modulator of homophase-quadrature is realized quadrature modulation, finishes the moulding of signal and the function of up-conversion, and different with traditional quadrature modulation is that the quadrature-phase in the memoryless modulators modulate of this homophase-quadrature need postpone a symbol time.
In embodiments of the present invention, the differential coding in the recurrence MSK modulator is partly merged to the LDPC encoder that the LDPC outer encoder constitutes equivalent eIRA structure.As shown in Figure 2, the LDPC encoder of equivalence eIRA structure is made of two parts independent of each other, first is in series by first differential encoder of differential decoderl and recurrence MSK modulator, and second portion is in series by second differential encoder of uniform enconding module and recurrence MSK modulator.
At the transmitting terminal of the modulation demodulation system of joint LDPC encoding and recurrence MSK, the input data are carried out the combined coding modulation treatment that LDPC coding and recurrence MSK modulate, may further comprise the steps:
At first, the code length of establishing the LDPC sign indicating number is n, and code check is R, and information bit length is k, and check bit length is m, and wherein, n, k and m are respectively natural number, and satisfies: 0＜R＜1, R=k/n and n=k+m.M * n check matrix that to define an element be " 0 " or " 1 "
As shown in Figure 4, be the schematic diagram of the check matrix H of the embodiment of the invention, wherein, H
uBe the matrix of a m * k random configuration, H
pIt is the matrix that a m * m has right side double diagonal line fixed structure.If establishing the number of every row " 1 " in the matrix is column weight, then H
pHave m-1 column weight and be 2 row and 1 column weight and be 1 row.
Then, the LDPC encoder with the eIRA structure divides two-way to carry out differential decoding and uniform enconding respectively to the prime information data of the k bit of each input:
The processing procedure of one tunnel information data is as follows: earlier the information data of k bit is carried out differential decoding, obtain the differential decoding result of k bit, then, this result is input to first differential encoder of recurrence MSK modulator.
The processing procedure of another road information data is as follows: the information data with the k bit is input to a uniform enconding structure earlier, obtains the intermediate object program of LDPC code check bit, then, this intermediate object program is input to first differential encoder of recurrence MSK modulator.Wherein, the uniform enconding structure realizes the input information data matrix H corresponding with this structure
uThe function that multiplies each other in mould-2 territory.
At last, the result of above-mentioned two-way information data is imported respectively in the memoryless modulator of homophase-quadrature of recurrence MSK modulator, obtained the combined coding modulation result of LDPC coding and recurrence MSK.
As shown in Figure 3, the memoryless modulator of the homophase-quadrature of recurrence MSK modulator comprises rectangular pulse forming module and modulation module, and modulation module also comprises serial/parallel modular converter, first multiplier, second multiplier, delay cell, the 3rd multiplier, the 4th multiplier and adder.The result of above-mentioned two-way information data is input to after through the rectangular pulse forming module and is divided into two paths of signals behind the serial/parallel modular converter: first output signal and second output signal.First output signal is input in first multiplier and cos (π t/2T) signal multiplication, and the result after multiplying each other is input in second multiplier and cos (2 π f again
cT) signal multiplication; Second output signal is input in the 3rd multiplier and sin (π t/2T) signal multiplication after the delay of T time, and the result after multiplying each other is input in the 4th multiplier and sin (2 π f again
cT) signal multiplication.Then, output signal addition in adder of the output signal of second multiplier and the 3rd multiplier obtains modulation signal.Wherein, T is the information sequence symbol period, f
cBe modulated carrier frequencies.
At the receiving terminal of the modulation demodulation system of joint LDPC encoding and recurrence MSK, carry out the demodulation coding processing of combining LDPC decoding and recurrence MSK to received signal.As shown in Figure 5, be the structure chart of the associating recurrence MSK demodulation LDPC decoding module of the embodiment of the invention.The method of this associating recurrence MSK demodulation LDPC decoding comprises a quick LDPC frame synchronization related detecting method of employing MSK differential ference spiral and the LDPC interpretation method of cascade MSK coherent demodulation, and concrete steps are as follows:
At first, the MSK received signal is carried out result being stored in the buffer memory after down-conversion, low pass filtered involve carrier wave rough estimate and compensation.
In the low-pass filtering treatment process of the embodiment of the invention, data are carried out 4 times of up-samplings.
Then, adopt a quick LDPC frame synchronization related detecting method of MSK differential ference spiral: at first, adopt MSK differential ference spiral device that the baseband signal data that are kept in the buffer memory are carried out differential ference spiral, the data after the demodulation are carried out coherent detection with 4 road LDPC frame synchronization correlation detector.After detecting the frame synchronization head, control buffer memory and demodulation selector make demodulation mode switch to MSK coherent demodulation, and with a detected frame synchronization data sequence number, the frame synchronization position of location LDPC decoding, otherwise, continue to carry out the coherent detection processing of a frame synchronization correlation detector.
As shown in Figure 6, be the structure chart of 4 road LDPC frame synchronization correlation detector of the embodiment of the invention.This correlation detector comprises 1:4 serial-parallel converter, 4 correlation modules, maximum determining device and comparators.The data of outside input are exported 4 circuit-switched data after being input to the 1:4 serial-parallel converter, then this 4 circuit-switched data is input to 4 correlation modules respectively and known synchronous head data sequence is carried out related operation, obtain 4 correlated results, then with the maximum in 4 correlated results of maximum determining device judgement, and obtain the position n of first data in whole input data sequence of the data segment of this maximum correspondence, wherein, n is a natural number, the expression data sequence number.At last, whether judge this maximum greater than dependent threshold, be detected as function signal if this maximum, is then exported the original position sequence number n and the frame synchronization of LDPC sign indicating number greater than dependent threshold with comparator.Wherein, correlation module comprises shift register, a L multiplier, memory and accumulator.The input data shift is deposited with long in the shift register of L, multiply each other with the data of L multiplier respectively then corresponding sequence number in the local data in the data of the L in the shift register and the memory, and this L multiplied result added up with accumulator, obtain correlated results, wherein, L is a natural number, the length of expression related operation.
By in the foregoing description as can be seen, can select the different low-pass filtering up-sampling multiples and a frame synchronization correlation detector of different ways, above embodiment only is schematic embodiment, does not limit the present invention and only can realize by the foregoing description, also can realize by other modes.
At last, adopt the LDPC interpretation method of cascade MSK coherent demodulation: at first, the baseband signal data that are kept in the buffer memory are carried out coherent demodulation with the MSK coherent demodulator, obtain demodulating data.On the basis of coherent demodulation data, adopt carrier wave and time synchronization method to carry out Synchronous Processing after, result is sent to parallel/serial modular converter, parallel/serial conversion is input to ldpc decoder, the decode results of the loss that do not exist differential decoding to cause is exported.
Wherein, or workplace that channel circumstance abominable lower in signal to noise ratio needs to adopt the mode of pilot tone or training sequence to realize can adopting the motor synchronizing mode in other cases synchronously.
As shown in Figure 2, the MSK coherent demodulator comprises complex signal shunt module, delay unit, first multiplier, first integrator, second multiplier and second integral device.Received signal is input to and exports two paths of signals after the complex signal shunt module: solid part signal and imaginary signals.Solid part signal is through behind the delay unit of T time, and with cos (π t/2T) signal multiplication, the output signal after multiplying each other is carried out integral processing through first integrator in first multiplier; Imaginary signals directly second multiplier with sin (π t/2T) signal multiplication, output signal after multiplying each other is carried out integral processing through the second integral device.
Under awgn channel, carry out emulation below by method and additive method with the embodiment of the invention.Described additive method comprises ideal coding (BPSK modulation is the ideal performance of LDPC sign indicating number down), contrast method (joint LDPC encoding that band interweaves and recurrence MSK method) and integrated processes (without the simple cascade LDPC of optimization and the method for recurrence MSK) not.By comparing simulation result, above-mentioned and/or additional aspect of the present invention and advantage will become obvious more and understanding easily.
In embodiments of the present invention, being provided with of simulation parameter is as follows: adopt recurrence MSK modulation and through the LDPC sign indicating number (2048 of the eIRA of optimal design structure, 1024), and the variable and the check-node degree that adopt LDPC degree distribution design method to obtain this yard be distributed as λ (x)=0.5x+0.4286x
3+ 0.0714x
17And ρ (x)=x
7, adopt the method for computer random search then and conjugation distributes and the basic constraint of LDPC sign indicating number (as, " 1 " distribution of 4 length can not appear encircling is) obtain the check matrix of this yard.The input information data generate with random fashion, and channel is an awgn channel, and the signal to noise ratio scope is 0.75 decibel to 4.5 decibels.Monte-Carlo Simulation is adopted in emulation, and joint demodulation decoding iterations is to the maximum 50 times.
As shown in Figure 7, be the method for the embodiment of the invention and the error performance result comparison schematic diagram of additive method.As seen from the figure, under identical simulated conditions, the error rate is 10
-5The time, the performance of the method for the embodiment of the invention is near the ideal performance of this LDPC sign indicating number under the BPSK modulation.With respect to contrast method, i.e. the integrated processes that interweaves of band, the error performance of embodiment of the invention method improves about 2dB, and with respect to integrated processes not, the about 2.7dB of error performance raising of embodiment of the invention method.
The present invention is fused in the LDPC sign indicating number fully by the differential coding part with recurrence MSK, eliminated the performance loss that the MSK differential coding brings fully, and make full use of the characteristics that recurrence MSK can carry out differential ference spiral, need not under the prerequisite of accurate carrier synchronization, realize the detection of LDPC sign indicating number frame synchronization header sequence fast, switch to MSK coherent demodulation again, carry out synchronously and LDPC decoding, realized the function of fast demodulation and decoding.
Although illustrated and described embodiments of the invention, for the ordinary skill in the art, be appreciated that without departing from the principles and spirit of the present invention and can carry out multiple variation, modification, replacement and modification that scope of the present invention is by claims and be equal to and limit to these embodiment.
Claims (10)
1, the modulation demodulation system of a kind of joint LDPC encoding and recurrence MSK comprises transmitting terminal and receiving terminal,
Described transmitting terminal is used for carrying out the combined coding modulation treatment of joint LDPC encoding and recurrence MSK to importing data, comprises LDPC outer encoder and recurrence MSK modulator;
Described receiving terminal, be used for carrying out to received signal the demodulation coding processing of combining LDPC decoding and recurrence MSK, comprise quadrature frequency conversion and low pass filter, thick Nonlinear Transformation in Frequency Offset Estimation module, buffer, demodulation selector, MSK differential ference spiral device, a frame synchronization correlation detector, MSK coherent demodulator, carrier wave and timing synchronous processing module, parallel/serial conversion module and ldpc decoder.
2, the modulation demodulation system of joint LDPC encoding as claimed in claim 1 and recurrence MSK is characterized in that, described recurrence MSK modulator comprises differential encoder and the memoryless modulator of homophase-quadrature,
Described differential encoder is used to merge to described LDPC outer encoder, constitutes the LDPC encoder of eIRA structure, eliminates the differential coding performance loss among the MSK;
The memoryless modulator of described homophase-quadrature is used to realize quadrature modulation, finishes the moulding and the up-conversion of signal.
3, the modulation demodulation system of joint LDPC encoding as claimed in claim 1 and recurrence MSK is characterized in that, the memoryless modulator of described homophase-quadrature comprises rectangular pulse forming module and modulation module.
4, the modulation demodulation system of joint LDPC encoding as claimed in claim 1 and recurrence MSK, it is characterized in that, the modulation module of the memoryless modulator of described homophase-quadrature, comprise serial/parallel modular converter, first multiplier, second multiplier, delay cell, the 3rd multiplier, the 4th multiplier and adder
Described serial/parallel modular converter is used for the output signal of described rectangular pulse forming module is divided into two paths of signals;
Described first multiplier is used for first output signal and cos (π t/2T) signal multiplication with described serial/parallel modular converter, and wherein, described T is the information sequence symbol period;
Described second multiplier is used for output signal and cos (2 π f with described first multiplier
cT) signal multiplication, wherein, described f
cBe modulated carrier frequencies;
Described delay cell is used for second output signal of described serial/parallel modular converter is carried out the delay of T time;
Described the 3rd multiplier is used for second output signal after the described delay and sin (π t/2T) signal multiplication;
Described the 4th multiplier is used for output signal and sin (2 π f with described the 3rd multiplier
cT) signal multiplication;
Described adder is used for the output signal addition with described the 3rd multiplier and the 4th multiplier, gets modulation signal.
5, the modulation demodulation system of joint LDPC encoding as claimed in claim 2 and recurrence MSK is characterized in that, the LDPC encoder of described eIRA structure comprises two parts independent of each other:
First differential encoder of differential decoderl and described recurrence MSK modulator; With
Second differential encoder of uniform enconding module and described recurrence MSK modulator.
6, the modulation demodulation system of joint LDPC encoding as claimed in claim 1 and recurrence MSK is characterized in that, a described N road frame synchronization correlation detector comprises the serial/parallel converter of 1:N, a N correlation module, maximum determining device and comparator,
Described 1:N deserializer is used for the input data transaction is become N road dateout, and wherein, described N is a natural number, and the expression receiver is to the up-sampling multiple of signal;
Described correlation module is used for every road dateout and known synchronous head data sequence are carried out related operation, obtains correlated results;
Described maximum determining device is used to judge the maximum of a described N correlated results, and obtains the position of first data in whole described input data sequence of the data segment of described maximum correspondence;
Whether described comparator is used to judge described maximum greater than dependent threshold, if original position sequence number and the frame synchronization of then exporting the LDPC sign indicating number are detected as function signal.
7, the modulation demodulation system of joint LDPC encoding as claimed in claim 1 and recurrence MSK, it is characterized in that, described MSK coherent demodulator comprises complex signal shunt module, delay unit, first multiplier, first integrator, second multiplier and second integral device
Described complex signal shunt module is used for described received signal is divided into solid part signal and imaginary signals;
Described delay unit is used for described solid part signal is carried out the time-delay of T time;
Described first multiplier is used for solid part signal after the described time-delay and cos (π t/2T) signal multiplication;
Described first integrator is used for the output signal of described first multiplier is carried out integral processing;
Described second multiplier is used for described imaginary signals and sin (π t/2T) signal multiplication;
Described second integral device is used for the output signal of described second multiplier is carried out integral processing.
8, the code modulating method of a kind of joint LDPC encoding and recurrence MSK may further comprise the steps:
Information data to input is carried out differential decoding and uniform enconding respectively;
The result of described differential decoding and uniform enconding is carried out quadrature modulation respectively, obtain the coded modulation result.
9, the demodulation coding method of a kind of combining LDPC decoding and recurrence MSK may further comprise the steps:
After carrying out quadrature frequency conversion, low-pass filtering, thick Nonlinear Transformation in Frequency Offset Estimation and compensation to received signal successively, result is stored in the buffer memory;
The described baseband signal data that are stored in the buffer memory are carried out differential ference spiral;
Data after the described differential ference spiral are carried out coherent detection;
If detect the frame synchronization head in the described coherent detection, then control described buffer memory and demodulation selector, make demodulation mode switch to MSK coherent demodulation, and locate the frame synchronization position of described LDPC decoding with the signal data of detected frame synchronization head, otherwise, proceed described coherent detection;
The described signal data that comprises the frame synchronization head is carried out MSK coherent demodulation, obtain demodulating data;
Described demodulating data is carried out carrying out LDPC decoding after the Synchronous Processing, with decode results judgement output.
10, the demodulation coding method of combining LDPC decoding as claimed in claim 9 and recurrence MSK is characterized in that described Synchronous Processing comprises:
The workplace lower in signal to noise ratio or channel circumstance is abominable adopts the mode of pilot tone or training sequence to realize synchronously;
In other cases, adopt the motor synchronizing mode.
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