CN101609977A - Capacitor bank protection and state monitoring apparatus and method thereof - Google Patents

Capacitor bank protection and state monitoring apparatus and method thereof Download PDF

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Publication number
CN101609977A
CN101609977A CNA2008101152487A CN200810115248A CN101609977A CN 101609977 A CN101609977 A CN 101609977A CN A2008101152487 A CNA2008101152487 A CN A2008101152487A CN 200810115248 A CN200810115248 A CN 200810115248A CN 101609977 A CN101609977 A CN 101609977A
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capacitor
port
value
capacitor group
protection
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杨昌兴
刘翔宇
平孝香
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BEIJING CHANCE ELECTRICITY Co Ltd
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BEIJING CHANCE ELECTRICITY Co Ltd
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Abstract

The present invention is capacitor bank protection and state monitoring apparatus and method.Its device is by capacitor group, circuit breaker, voltage transformer, and current transformer, controller are formed, and controller is according to the break-make of the signal controlling circuit breaker of instrument transformer.Its method is: calculate the capacitive reactance rate of change according to the capacitor value of capacitor group fault phase and specified capacitor value, with it as the protection setting value; Terminal voltage and the every power frequency mutually of electric current power frequency effective value calculable capacitor group capacitor value according to the every phase of capacitor group of real-time detection; Before capacitor group switching, in every phase original measured value and protection setting value input protection device; Behind capacitor group switching, according to the capacitive reactance and the real-time capacitive reactance rate of change of raw calculation of real-time monitoring; More real-time capacitive reactance rate of change and protection setting value satisfy condition and then turn-off circuit breaker, with excision fault capacitor group.The present invention is sensitive reliable, is not subjected to that electric capacity is unbalanced, operating characteristic deviation between the three phase mains unsymmetrical balance, transducer, and extraneous factor influence such as mains by harmonics.

Description

Capacitor bank protection and state monitoring apparatus and method thereof
Technical field
The present invention relates to the protection of a kind of shunt capacitor and Shunt Capacitor Unit and method, especially protection of high-voltage parallel capacitor group and state monitoring apparatus and method thereof.
Background technology
Backup protection of China's high-voltage parallel capacitor internal fault (in adopting or outer fuse as main protection time) or main protection when fuse protected (do not have), the following provisions during long-term foundation and the existing standard GB 50227-95 of enforcement " Code for design of installation of shunt capacitors " dispose about capacitor internal fault protected mode:
6.1.2 the capacitor group should be installed unbalance protection, and should meet the following requirements
6.1.2.1 the capacitor group of single star-star connection can adopt the open delta voltage protection.
6.1.2.2 the series connection hop count is two sections and above single star capacitor group, can adopt the differential voltage protection.
Be connected into single star capacitor group of four brachium pontis 6.1.2.3 whenever be on good terms, can adopt the protection of bridge-type spill current.
6.1.2.4 dual star topology wiring capacitance device group can adopt the protection of neutral point unsymmetrical current.
When inner certain the element generation puncture short of capacitor; or fuse failure isolated fault element (being provided with internal fuse protected) in causing; or cause that the short circuit of capacitor interior section series block becomes whole short circuits (no fuse protected) until fault progression, or the capacitor interior section or all series block puncture short overcurrent cause outer fuse failure excision fault capacitor (being provided with fuse protected outward).Above-mentioned malfunction can cause capacitor three-phase electricity capacity imbalance, and capacitor group neutral point potential drifting.Like this, or be connected into the open delta place at the secondary side of the three-phase discharge coil that is connected with capacitor and residual voltage U can occur 0(when adopting above-mentioned first kind of protection scheme); Or cause certain fault mutually between the different series block capacitance uneven and produce voltage difference delta U (when adopting above-mentioned second kind of protection scheme); Perhaps cause capacitance imbalance between certain fault phase brachium pontis, and produce spill current Δ I (when adopting above-mentioned the third protection scheme); Perhaps cause capacitance imbalance between double star two arms, unsymmetrical current I in the neutral point connecting line, occurs 0(when adopting above-mentioned the 4th kind of protection scheme).When corresponding protection relay detects U 0, Δ U, Δ I, I 0When surpassing the protection setting value, the protection would trip is removed the capacitor group that breaks down, thereby avoids accident to enlarge.Usually can select above-mentioned wiring and protected mode for use according to the capacity and the electric pressure of capacitor group, follow application both at home and abroad so far.
Unbalance protection fiting tuning principle is abideed by the relevant regulations in the GB50227-95 standard, adopts outer fuse protected capacitor group, and wherein unbalance protection should allow overvoltage value to adjust by single capacitor; Adopt internal fuse protected and no fuse protected capacitor group, its unbalance protection should be adjusted by capacitor inner member overvoltage permissible value.
Under capacitor group non-failure conditions; because initial capacitance is unbalanced (or alternate; or between the series block of certain phase; or between each brachium pontis of certain phase; or between bistellate two arms); and owing to three-phase mains voltage unsymmetrical balance, protection sensor performance deviation or the like reason; can cause influence in various degree to various unbalance protections; make open delta voltage protection and phase voltage differential protection produce initial unbalance voltage, make protection of bridge-type spill current and the protection of double star neutral point unsymmetrical current produce initial unsymmetrical current.In order to prevent that protection from misoperation taking place, according to the pertinent regulations among the existing electric power standard DL/T584-95 " 3～110kv electric grid relay protection device moves the rules of adjusting ", the setting value of unbalance protection must be more than or equal to 1.5 times of initial unbalanced value.
There is following subject matter in existing unbalance protection:
1. owing to existing unbalance protection device can only be selected and outer fuse, interior fuse and no fuse protected a kind of mode are wherein carried out fiting tuning, if outer fuse or internal fuse protected inefficacy, then unbalance protection will lose the protective effect of expection, cause the capacitor internal fault to continue development, even cause serious accident;
2. the existence of initial unbalance voltage or initial unsymmetrical current, the protection setting value is strengthened, and may make protection actual act value reduce (when expection protection operating value and initial unbalanced phase place angle are between 90 °～270 ° when the capacitor fault);
3. generation symmetrical fault, unbalance protection is inoperative;
4. existing protective device lacks the real-time monitoring to the capacitor running status; and shortage is to the record wave energy of the switching process and the fault trip process of capacitor group; so that to the capacitor device running state analysis, especially have an accident analysis of causes research lacks basic basis to capacitor device.
Summary of the invention
In view of the foregoing, an object of the present invention is to provide a kind of protective device, this protective device not only can overcome the drawback of existing protective device but also capacitor group running status is implemented monitoring in real time, and reliability service ensures safety.
Another object of the present invention is the principle and the shape system of the unbalance protection of abandoning tradition; a kind of guard method is proposed; the original capacitive reactance that this method is set up with the every phase of capacitor group is a benchmark, will monitor in real time with it and compare, and surpasses permissible value as certain compatible anti-rate of change and then makes the protection would trip.
For achieving the above object, the present invention is by the following technical solutions:
A kind of capacitor bank protection and state monitoring apparatus comprise the series arm of being made up of high-voltage parallel capacitor group, reactor and circuit breaker, it is characterized in that:
Two termination voltage transformers of described high-voltage parallel capacitor group, connect current transformer in the described series arm, the input of a controller is delivered in the output of the output summation current transformer of described voltage transformer, and the break-make of described circuit breaker is controlled in the output of this controller;
Described controller comprises:
Digital signal processor is used for the output signal of described voltage transformer summation current transformer is protected algorithm process, and described circuit breaker is carried out control and treatment;
Analog to digital converter, be used for the output signal of described voltage transformer summation current transformer is carried out analog to digital conversion, the input of this analog to digital converter connects the output signal of described voltage transformer summation current transformer, and the output of this analog to digital converter connects the data input port of described digital signal processor;
CPLD, be used to carry out the control logic of described digital signal processor to described circuit breaker, the input of this CPLD connects the control output end of described digital signal processor, and the break-make of described circuit breaker is controlled in the output of this CPLD.
Further:
The data port of described digital signal processor connects buffer, and this buffer is as metadata cache.
The data port of described digital signal processor connects storage card, and this storage card is as the store sample data.
The data port of described digital signal processor connects microcontroller by dual port buffer, and this microcontroller is used for human-computer dialogue, and the input/output port of this microcontroller connects LCD and keyboard.
The communication port of described microcontroller connects communication module.
A kind of capacitor bank protection and state monitoring method is characterized in that may further comprise the steps:
Step 1
Capacitor value X according to the capacitor group fault phase of protecting the fiting tuning principle to try to achieve CfWith specified capacitor value X Cn, be calculated as follows capacitive reactance rate of change X c%, and with its as the protection setting value:
X c % = X cf - X cn X cn × 100 %
Step 2
Terminal voltage power frequency effective value U according to the real-time every phase of capacitor group that detects of voltage transformer summation current transformer cWith electric current power frequency effective value I c, be calculated as follows the every phase power frequency of capacitor group capacitor value X c:
X c＝U C/I C
Step 3
Before capacitor group switching, with every phase original measured value X CoWith protection setting value X cIn the % input protection device; Behind capacitor group switching, according to the capacitive reactance X of real-time monitoring cWith original value X Co, be calculated as follows real-time capacitive reactance rate of change X ' c%:
X c ′ % = X c - X co X co × 100 %
Step 4
With real-time capacitive reactance rate of change X ' c% and protection setting value X c% compares, if X ' c%＞X c% and adopt inside and outside when fuse protected, perhaps X ' c%＜X c% and not having when fuse protected then turn-offs circuit breaker, with excision fault capacitor group.
Further, continue following steps 5 in step 4 back: three-phase voltage and current waveform in record capacitor group switching process and the fault trip process, record trouble state parameter and time of failure, and store for future reference.
Further, in the capacitor group adopts fuse or outside fuse during as main protection, will not have fuse protected fiting tuning value X Cw% also inserts in the protective device, and with real-time capacitive reactance rate of change X ' c% and its compare, if X ' c%＜X Cw% then turn-offs circuit breaker, to avoid causing the capacitor internal fault to develop into the penetrability short circuit owing to inside and outside fuse protected inefficacy.
Can obtain following beneficial effect after adopting the present invention:
1. protective device is sensitive reliable, is not subjected to that electric capacity is unbalanced, operating characteristic deviation between the three phase mains unsymmetrical balance, transducer, and extraneous factor influence such as mains by harmonics.
Since protective device can implement and fuse be arranged and no fuse is dual cooperates, thereby avoid accidents caused danger owing to inside and outside fuse inefficacy.
3. symmetrical fault is had no effect for the performance and the function of protection.
4. protective device is set up capacitor group switching process and fault trip process record ripple and reference record, helps its running status and analysis on accident cause research.
5. help simplifying the wiring and the protected mode of capacitor group.
Description of drawings
Fig. 1 is a structural representation of the present invention;
Fig. 2 is the composition frame chart of controller;
Fig. 3 is the element circuit connection layout in the controller;
Fig. 4 is the circuit diagram of voltage transformer summation current transformer;
Fig. 5 and Fig. 6 are the circuit diagram of AD;
Fig. 7 is the circuit diagram of CPLD;
Fig. 8 is the peripheral circuit diagram of CPLD;
Fig. 9 is the circuit diagram of DSP;
Figure 10 is the circuit diagram of storage card, communication interface, keyboard;
Figure 11 is the circuit diagram of buffer;
Figure 12 is the circuit diagram of communication interface;
Figure 13 is the DSP main program flow chart;
Figure 14 is DSP sampling interrupt handling routine flow chart;
Figure 15 is DSP monitoring and protection algorithm flow chart;
Figure 16 is the real-time calculation flow chart of capacitive reactance;
Figure 17 is the failure wave-recording flow chart;
Figure 18 is a MCU support processor flow chart.
Embodiment
Be described further below in conjunction with accompanying drawing.
Operation principle of the present invention and essential implementation are as follows:
1. according to existing unbalance protection fiting tuning principle, for following situation: (1) after fuse excises some fault capacitors in succession outside, during the perfecting overvoltage that capacitor bears and surpass permissible value of same series block; (2) after interior fuse excises some fault elements in succession, during the perfecting overvoltage that element bears and surpass permissible value of same series block; (3) in succession behind the puncture short, when the overvoltage that residue series block element is born surpasses permissible value, get the capacitor value X of pairing capacitor group fault phase respectively in the some series block of no fuse protected capacitor Cf, with these capacitor values and specified capacitor value X CnCompare, obtain the capacitive reactance rate of change X of permission respectively c% is as follows:
X c % = X cf - X cn X cn × 100 % - - - ( 1 )
Wherein: X when protection cooperates with inside and outside fuse c% is a positive number, at no X when fuse protected c% is a negative.With the capacitive reactance rate of change permissible value of above-mentioned calculated off-line setting value as protection.
2. the Applied Digital technology every phase terminal voltage power frequency of the capacitor group effective value U that will detect in real time c, divided by the in-phase current power frequency effective value I of synchronous detecting c, try to achieve the every phase power frequency of capacitor group capacitor value X c=U C/ I C, (because of capacitor internal resistance very I is ignored).
3. before the capacitor group puts into operation, with the original measured value X of every phase capacitive reactance CoWith protection setting value X c% input protection apparatus system.After the capacitor group puts into operation, in real time with the capacitive reactance X that monitors cWith original value X CoCalculate real-time capacitive reactance rate of change (X ' c%):
X c ′ % = X c - X co X co × 100 % - - - ( 2 )
4. with X ' c% with corresponding to protection and inside and outside fuse protected and no fuse protected fiting tuning value X c% compares.If X ' c%＞X c% (inside and outside when fuse protected), perhaps X ' when adopting c%＜X c% (when no when fuse protected), then order protection would trip.
5. write down three-phase voltage and current waveform in capacitor group switching process and the fault trip process, record trouble state parameter and time of failure, and store for future reference.
In addition, in the capacitor group adopts fuse or outside fuse during as main protection, be with the setting value X of no fuse protected cooperation Cw% also inserts protection system, and with the X ' that calculates c% and its compare, if X ' c%＜X Cw% then protects would trip, thereby avoids because inside and outside fuse protected inefficacy causes the capacitor internal fault to develop into the penetrability short circuit.
Below, will describe the present invention from hardware configuration and two aspects of software design
Hardware configuration
Capacitor bank protection of the present invention and state monitoring apparatus are as shown in Figure 1; comprise the series arm of forming by high-voltage parallel capacitor group 1, reactor 2 and circuit breaker 4; two termination voltage transformers 6 of high-voltage parallel capacitor group 1; connect current transformer 3 in the series arm; the input of a controller 5 is delivered in the output of the output summation current transformer 3 of voltage transformer 6, the break-make of the output control circuit breaker 4 of this controller 5.Wherein: current transformer is used to detect the three-phase current of capacitor group; Circuit breaker is used for opening-closing capacitor bank and execute protection trip command excision fault capacitor group; Voltage transformer is used to detect capacitor group three-phase voltage.
As shown in Figure 2, controller 5 comprises: digital signal processor DSP, be used for the output signal of voltage transformer summation current transformer is protected algorithm process, and circuit breaker is carried out control and treatment; Analog to digital converter AD is used for the output signal of voltage transformer summation current transformer is carried out analog to digital conversion, and its input connects the output signal of voltage transformer summation current transformer, and its output connects the data input port of DSP; Complex programmable logic device (CPLD) is used to carry out the control logic of DSP to circuit breaker, and its input connects the control output end of DSP, the break-make of its output control circuit breaker.
In addition:
The data port of DSP also connects buffer RAM, and this RAM is as metadata cache.
The data port of DSP also connects storage card SD/CF, and this storage card is as the store sample data.
The data port of DSP also connects microcontroller MCU by dual port buffer, and this MCU is used for human-computer dialogue, and the input/output port of MCU connects LCD and keyboard.
The communication port of MCU connects communication module.
The present invention is directed to high-voltage capacitor protection and state monitoring apparatus protection and the requirement of record ripple in real time; adopt the dual-cpu structure of DSP+MCU; DSP is used to protect algorithm and the action of protection outlet capacitor to handle; MCU is used for man-machine interface and man-machine interface; and the processing of communication, action logic is carried out by CPLD.The data acquisition aspect adopts 14 bipolarity AD uninterruptedly to sample, and external 256KRAM stores the sampled data among the data Buffer on the SD card in the time window after the record ripple triggers as data Buffer, and the process of record ripple is phase 64 points weekly.
The voltage transformer summation current transformer is gathered the voltage U of high-voltage parallel capacitor group incessantly cAnd electric current I c, after 14 bipolarity AD convert digital quantity to, send into DSP.The every phase power frequency of DSP calculable capacitor group capacitor value X c=U C/ I C, according to the capacitive reactance X of real-time monitoring cWith original value X Co, calculate real-time capacitive reactance rate of change X ' c% is with X ' c% with corresponding to protection fiting tuning value X c% compares, and makes logic determines according to comparing result, carries out the corresponding action logic by CPLD again.
Therebetween, the data of sampling are placed in the external 256K buffer.When take place to need turn-offing circuit breaker, during with excision fault capacitor group, then record trouble state parameter and time of failure, and be kept in the SD card three-phase voltage in capacitor group switching process and the fault trip process and current waveform for future reference.The malfunction parameter that is write down comprises electric current, the real available value of voltage before and after the excision fault capacitor group and the three phases active power that calculates, reactive power, and the sampled point of the calculating of real effective by voltage, electric current calculates through root-mean-square value and obtain.System voltage, electric current is obtaining sampled value through PT, CT conversion back by the AD sampling A, and the sampled value during fault is stored in the SD card.
As shown in Figure 3, each element circuit in the controller connects by following relation:
The data/address bus DSP_BUS of DSP links to each other with the data/address bus of CPLD, the data/address bus of AD;
The ADLogic port of DSP links to each other with the ADLogic port of AD;
The reseting port DSP Reset of DSP links to each other with the reseting port of CPLD, the reseting port of AD;
The CPLD reseting port CPLD Reset of DSP links to each other with the CPLD reseting port of CPLD;
The IO Extended Capabilities Port IO Expended of DSP links to each other with the IO Extended Capabilities Port of buffer and storage card;
The logic control port Logic Control of DSP links to each other with the logic control port of buffer and storage card;
The liquid crystal reseting port LCD Reset of CPLD and liquid crystal logic port LCD Logic link to each other with the corresponding port of LCD respectively;
The IO bus IO Bus of CPLD connects keyboard;
The IO logic port IO Logic of CPLD links to each other with the IO logic port of buffer and storage card.
Wherein: dual port buffer and microcontroller are integrated in the chip of CPLD.
The physical circuit of each element circuit such as Fig. 4-shown in Figure 12.
Software design
Software is divided into three parts: be respectively the DSP algorithm processor, MCU handling procedure and CPLD logical program.The CPLD logical program is determined according to concrete outlet logic.Effective value adopts the half period root-mean-square value to calculate, and fft algorithm is adopted in harmonic analysis, finishes by DSP.Now as follows to the program description of DSP and MCU:
1.DSP main program flow chart (Figure 13).
At first initiate equipment on the sheet is carried out self check and initialization after the system start-up, mainly comprise inner RAM by DSP, the FLASH resource, the integrated communication module SPI on the sheet, SCI, CAN etc., whole system is fallen in locking after the discovering device mistake, and the reporting errors code.After device initialize is finished on the sheet to the equipment MCU of periphery; CPLD carries out initialization; it mainly is the initial value that writes important parameter; whether check normally with the external equipment communication; open the AD module after finishing, and receive the sampled value that reads from the AD module, calculate and protect the control of algorithm by DSP; after calculating and finish, one-period carries out the calculating of next cycle, constantly circulation.
2.DSP sampling interrupt handling routine flow chart (Figure 14).
DSP receives after the ready interrupt signal of AD sampled data, enters interrupt handling routine, at first check the state of AD modular converter after, read the AD sampled value of this conversion.The sampled value that is read stores among the data Buffer after by verification, carries out voltage, electric current real effective, active power, and the calculating of reactive power and apparent power is calculated the back that finishes and is removed interrupt identification, waits for next time and interrupting.
3.DSP monitoring and protection algorithm flow chart (Figure 15).
Calculate the real-time appearance value of three phase capacitance according to formula by DSP after the parameters such as sampling, the voltage that calculates system and capacitor, electric current, power; compare with the appearance value limit value that from FLASH, reads; if out-of-limit then trigger protection action module and failure wave-recording; otherwise program will constantly be calculated the real-time appearance value of capacitor, relatively.
4. the real-time calculation flow chart of capacitive reactance (Figure 16).
From data FLASH, read in the original capacitive reactance of every phase capacitor that sets in advance before capacitor puts into operation and adopt in fuse, outer fuse, the permission capacitive reactance rate of change when not having fuse, the three-phase voltage that will calculate by the AD sampling, current effective value is according to formula X CA=U CA/ I CAX CB=U CB/ I CBX CC=U CC/ I CCWith X C · A ′ % = X C · A - X CO · A X CO · A 100 % Calculate capacitive reactance and capacitive reactance rate of change.
5. failure wave-recording flow chart (Figure 17).
The failure wave-recording module triggers sign according to the record ripple and carries out work; at first start the failure wave-recording module after inquiring the triggering flag set; the opening entry sampled value is in the internal RAM of DSP; and start exit relays in 5 cycles and protect control; confirm to protect back 20 cycles that whether put in place to stop the record of sampled value by the return node signal, the data transfer that is stored in the DSP internal RAM is copied on the CF/SD card.
6.MCU support processor flow chart (Figure 18).
After system powered on and moves, MCU carried out self check work to integrated communication, driver module, and liquid crystal, the memory interface to the periphery carries out the communication inspection again, after waiting to obtain the inquiry word of DSP, begin to start the driver module of liquid crystal, and communication port is intercepted, processing is replied in communication.

Claims (9)

1. capacitor bank protection and state monitoring apparatus comprise the series arm of being made up of high-voltage parallel capacitor group, reactor and circuit breaker, it is characterized in that:
Two termination voltage transformers of described high-voltage parallel capacitor group, connect current transformer in the described series arm, the input of a controller is delivered in the output of the output summation current transformer of described voltage transformer, and the break-make of described circuit breaker is controlled in the output of this controller;
Described controller comprises:
Digital signal processor is used for the output signal of described voltage transformer summation current transformer is protected algorithm process, and described circuit breaker is carried out control and treatment;
Analog to digital converter, be used for the output signal of described voltage transformer summation current transformer is carried out analog to digital conversion, the input of this analog to digital converter connects the output signal of described voltage transformer summation current transformer, and the output of this analog to digital converter connects the data input port of described digital signal processor;
CPLD, be used to carry out the control logic of described digital signal processor to described circuit breaker, the input of this CPLD connects the control output end of described digital signal processor, and the break-make of described circuit breaker is controlled in the output of this CPLD.
2. capacitor bank protection as claimed in claim 1 and state monitoring apparatus is characterized in that:
The data port of described digital signal processor connects buffer, and this buffer is as metadata cache.
3. capacitor bank protection as claimed in claim 2 and state monitoring apparatus is characterized in that:
The data port of described digital signal processor connects storage card, and this storage card is as the store sample data.
4. capacitor bank protection as claimed in claim 3 and state monitoring apparatus is characterized in that:
The data port of described digital signal processor connects microcontroller by dual port buffer, and this microcontroller is used for human-computer dialogue, and the input/output port of this microcontroller connects LCD and keyboard.
5. capacitor bank protection as claimed in claim 4 and state monitoring apparatus is characterized in that:
The communication port of described microcontroller connects communication module.
6. capacitor bank protection as claimed in claim 4 and state monitoring apparatus is characterized in that:
Described digital signal processor adopts the DSP56F807FV80 chip;
Described CPLD adopts the EPM3256A-208P chip;
Described dual port buffer and microcontroller are integrated in the chip of described CPLD;
The data/address bus of described digital signal processor links to each other with the data/address bus of the data/address bus of described CPLD, analog to digital converter;
The ADLogic port of described digital signal processor links to each other with the ADLogic port of described analog to digital converter;
The reseting port of described digital signal processor links to each other with the reseting port of the reseting port of described CPLD, analog to digital converter;
The CPLD reseting port of described digital signal processor links to each other with the CPLD reseting port of described CPLD;
The IO Extended Capabilities Port of described digital signal processor links to each other with the IO Extended Capabilities Port of described buffer and storage card;
The logic control port of described digital signal processor links to each other with the logic control port of described buffer and storage card;
The liquid crystal reseting port of described CPLD and liquid crystal logic port link to each other with the corresponding port of described LCD respectively;
The IO bus of described CPLD connects described keyboard;
The IO logic port of described CPLD links to each other with the IO logic port of described buffer and storage card.
7. capacitor bank protection and state monitoring method is characterized in that may further comprise the steps:
Step 1
Capacitor value X according to the capacitor group fault phase of protecting the fiting tuning principle to try to achieve CfWith specified capacitor value X Cn, be calculated as follows capacitive reactance rate of change X c%, and with its as the protection setting value:
X c % = X cf - X cn X cn × 100 %
Step 2
Terminal voltage power frequency effective value U according to the real-time every phase of capacitor group that detects of voltage transformer summation current transformer cWith electric current power frequency effective value I c, be calculated as follows the every phase power frequency of capacitor group capacitor value X c:
X c＝U C/I C
Step 3
Before capacitor group switching, with every phase original measured value X CoWith protection setting value X cIn the % input protection device; Behind capacitor group switching, according to the capacitive reactance X of real-time monitoring cWith original value X Co, be calculated as follows real-time capacitive reactance rate of change X ' c%:
X c ′ % = X c - X co X co × 100 %
Step 4
With real-time capacitive reactance rate of change X ' c% and protection setting value X c% compares, if X ' c%＞X c% and adopt inside and outside when fuse protected, perhaps X ' c%＜X c% and not having when fuse protected then turn-offs circuit breaker, with excision fault capacitor group.
8. capacitor bank protection as claimed in claim 7 and state monitoring method is characterized in that:
Continue following steps 5 in step 4 back:
Three-phase voltage and current waveform in record capacitor group switching process and the fault trip process, record trouble state parameter and time of failure, and store for future reference.
9. as claim 7 or 8 described capacitor bank protection and state monitoring methods, it is characterized in that:
In the capacitor group adopts fuse or outside fuse during as main protection, will not have fuse protected fiting tuning value X Cw% also inserts in the protective device, and with real-time capacitive reactance rate of change X ' c% and its compare, if X ' c%＜X Cw% then turn-offs circuit breaker, to avoid causing the capacitor internal fault to develop into the penetrability short circuit owing to inside and outside fuse protected inefficacy.
CNA2008101152487A 2008-06-19 2008-06-19 Capacitor bank protection and state monitoring apparatus and method thereof Pending CN101609977A (en)

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CN102938556A (en) * 2012-10-24 2013-02-20 上海市电力公司 Protecting, measuring and controlling integrated device with unbalanced current protection function for capacitor
CN102957128A (en) * 2012-11-09 2013-03-06 江苏省电力公司苏州供电公司 Protection method and device for smoke generation and arcing faults of indoor capacitor group
CN103176105A (en) * 2013-03-13 2013-06-26 绍兴电力局 Test circuit and method for capacitor internal fuses based on alternating current phase selection
CN103499754A (en) * 2013-09-25 2014-01-08 南京能迪电气技术有限公司 Method for real time on-line monitoring of operating state of power capacitor bank
CN103983865A (en) * 2014-03-25 2014-08-13 南京能迪电气技术有限公司 Series reactor power capacitor group operating state real-time online monitoring method
CN105098710A (en) * 2014-11-21 2015-11-25 芜湖蓝宙电子科技有限公司 Electric power protection and control device
CN105301492A (en) * 2015-12-04 2016-02-03 华北电力大学（保定） Protection performance verification method for internal fuses of high voltage capacitor unit
CN106771801A (en) * 2016-11-28 2017-05-31 国家电网公司 A kind of capacitor bank on-Line Monitor Device and its application process
CN108206508A (en) * 2016-12-20 2018-06-26 南京南瑞继保电气有限公司 A kind of adaptive shunt capacitor impedance protecting method
CN109449887A (en) * 2018-10-26 2019-03-08 杭州沃伦森电气有限公司 Capacitor group branch impedance performance monitoring systems
CN109491716A (en) * 2018-10-19 2019-03-19 北京行易道科技有限公司 Start method and device, program storage method and device
CN109738706A (en) * 2018-12-29 2019-05-10 浙江南德电气有限公司 A kind of capacitor capacitance decaying detection method
CN109738705A (en) * 2018-12-29 2019-05-10 浙江南德电气有限公司 A kind of capacitor capacitance decaying detection method
CN110672963A (en) * 2019-10-23 2020-01-10 国网四川省电力公司电力科学研究院 Online fault monitoring and handling method for double-Y-shaped parallel capacitor bank
CN110829384A (en) * 2019-10-31 2020-02-21 西安欣东源电气有限公司 Parallel capacitor protection method
CN110994629A (en) * 2019-12-05 2020-04-10 深圳供电局有限公司 Control method for rapid switching of capacitor
CN111638401A (en) * 2020-06-11 2020-09-08 广东电网有限责任公司 Capacitor online monitoring system and method
CN112688278A (en) * 2020-11-20 2021-04-20 中国电力科学研究院有限公司 Unbalanced current protection method and system for high-voltage self-healing capacitor
CN112865023A (en) * 2020-12-31 2021-05-28 中国电力科学研究院有限公司 Effective power protection method and system for high-voltage self-healing capacitor

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CN102215026A (en) * 2010-04-01 2011-10-12 哈尔滨九洲电气股份有限公司 Control device based on neutral point migration technology of high-voltage transducer of DSP (Digital Signal Processor) and FPGA (Field Programmable Gate Array)
CN102215026B (en) * 2010-04-01 2015-04-29 罗克韦尔自动化控制集成(哈尔滨)有限公司 Control device based on neutral point migration technology of high-voltage transducer of DSP (Digital Signal Processor) and FPGA (Field Programmable Gate Array)
WO2012075725A1 (en) * 2010-12-10 2012-06-14 江苏省电力公司常州供电公司 Harmonic wave protecting method for capacitor bank
CN102624324A (en) * 2011-01-28 2012-08-01 洛克威尔自动控制技术股份有限公司 Drive failure protection
US9625519B2 (en) 2011-01-28 2017-04-18 Rockwell Automation Technologies, Inc. Drive failure protection
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CN102447292A (en) * 2012-01-09 2012-05-09 张从峰 Battery/capacitor bank current sharing control circuit
CN102738773A (en) * 2012-06-06 2012-10-17 河南省电力公司信阳供电公司 Adaptive capacitor bank protection device
CN102938556A (en) * 2012-10-24 2013-02-20 上海市电力公司 Protecting, measuring and controlling integrated device with unbalanced current protection function for capacitor
CN102938556B (en) * 2012-10-24 2016-04-20 上海市电力公司 With the capacitor protection measurement and control integration device of unbalanced current protection function
CN102957128A (en) * 2012-11-09 2013-03-06 江苏省电力公司苏州供电公司 Protection method and device for smoke generation and arcing faults of indoor capacitor group
CN102957128B (en) * 2012-11-09 2015-12-02 江苏省电力公司苏州供电公司 Indoor Capacitor banks plays guard method and the device of cigarette arcing fault
CN103176105A (en) * 2013-03-13 2013-06-26 绍兴电力局 Test circuit and method for capacitor internal fuses based on alternating current phase selection
CN103176105B (en) * 2013-03-13 2015-04-01 绍兴电力局 Test circuit and method for capacitor internal fuses based on alternating current phase selection
CN103499754A (en) * 2013-09-25 2014-01-08 南京能迪电气技术有限公司 Method for real time on-line monitoring of operating state of power capacitor bank
CN103499754B (en) * 2013-09-25 2016-01-27 南京能迪电气技术有限公司 For the method for real time on-line monitoring power capacitor bank running status
CN103983865A (en) * 2014-03-25 2014-08-13 南京能迪电气技术有限公司 Series reactor power capacitor group operating state real-time online monitoring method
CN105098710A (en) * 2014-11-21 2015-11-25 芜湖蓝宙电子科技有限公司 Electric power protection and control device
CN105301492B (en) * 2015-12-04 2018-05-04 华北电力大学（保定） A kind of internal fuse protected qualification method in high-voltage capacitor unit
CN105301492A (en) * 2015-12-04 2016-02-03 华北电力大学（保定） Protection performance verification method for internal fuses of high voltage capacitor unit
CN106771801A (en) * 2016-11-28 2017-05-31 国家电网公司 A kind of capacitor bank on-Line Monitor Device and its application process
CN108206508B (en) * 2016-12-20 2019-05-21 南京南瑞继保电气有限公司 A kind of adaptive shunt capacitor impedance protecting method
CN108206508A (en) * 2016-12-20 2018-06-26 南京南瑞继保电气有限公司 A kind of adaptive shunt capacitor impedance protecting method
CN109491716A (en) * 2018-10-19 2019-03-19 北京行易道科技有限公司 Start method and device, program storage method and device
CN109491716B (en) * 2018-10-19 2021-11-16 北京行易道科技有限公司 Starting method and device, program storage method and device
CN109449887A (en) * 2018-10-26 2019-03-08 杭州沃伦森电气有限公司 Capacitor group branch impedance performance monitoring systems
CN109738705A (en) * 2018-12-29 2019-05-10 浙江南德电气有限公司 A kind of capacitor capacitance decaying detection method
CN109738706A (en) * 2018-12-29 2019-05-10 浙江南德电气有限公司 A kind of capacitor capacitance decaying detection method
CN110672963A (en) * 2019-10-23 2020-01-10 国网四川省电力公司电力科学研究院 Online fault monitoring and handling method for double-Y-shaped parallel capacitor bank
CN110672963B (en) * 2019-10-23 2022-02-11 国网四川省电力公司电力科学研究院 Online fault monitoring and handling method for double-Y-shaped parallel capacitor bank
CN110829384A (en) * 2019-10-31 2020-02-21 西安欣东源电气有限公司 Parallel capacitor protection method
CN110994629A (en) * 2019-12-05 2020-04-10 深圳供电局有限公司 Control method for rapid switching of capacitor
CN111638401A (en) * 2020-06-11 2020-09-08 广东电网有限责任公司 Capacitor online monitoring system and method
CN112688278A (en) * 2020-11-20 2021-04-20 中国电力科学研究院有限公司 Unbalanced current protection method and system for high-voltage self-healing capacitor
CN112865023A (en) * 2020-12-31 2021-05-28 中国电力科学研究院有限公司 Effective power protection method and system for high-voltage self-healing capacitor
CN112865023B (en) * 2020-12-31 2023-08-18 中国电力科学研究院有限公司 Effective power protection method and system for high-voltage self-healing capacitor

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Application publication date: 20091223