CN101609544B - Method and device for loading and measuring data of image processing device - Google Patents
Method and device for loading and measuring data of image processing device Download PDFInfo
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- CN101609544B CN101609544B CN2009100632621A CN200910063262A CN101609544B CN 101609544 B CN101609544 B CN 101609544B CN 2009100632621 A CN2009100632621 A CN 2009100632621A CN 200910063262 A CN200910063262 A CN 200910063262A CN 101609544 B CN101609544 B CN 101609544B
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Abstract
The invention discloses a method and a device for loading and measuring data of an image processing device, which is characterized in that loading programs are stored in a first address of a flash; during loading and starting, a DSP transfers a loading program module to a memory; a plurality of image processing programs to be loaded are stored in a successive address of the flash; and the DSP switches between the loading programs and the plurality of image processing programs according to received instruction information so as to finish flash data loading, channel testing and other testing tasks. After the image processing device is encapsulated, the invention updates and maintains the programs, enables different image processing programs according to different target types and is convenient in operation and high in reliability.
Description
Technical field
The invention belongs to the Digital Image Processing application, be specifically related to image processor is carried out the method and apparatus of data load.
Background technology
Image processor is input picture to be carried out operations such as a series of processing, analysis, identification, tracking, thereby draws the equipment of useful information.(Digital Signal Processing DSP) is one of the main carrier of image processor system operation to digital signal processor.DSP is when operation, its program and data generally leave inner DSP or static memory (the Static Random Access Memory that extends out in, SRAM) in, to all lose after the power down, therefore, the program file of DSP and partial document data need be cured in the outside nonvolatile memory, as flash memory (FLASH).
Image processor need adopt different image processing algorithms, different running parameter at different object types and at the template image of special object, its object type may also may be static buildings, transport hub, critical facility etc. for automobile, steamer, the aircraft in the motion.Because the diversity and the complicacy of Flame Image Process have determined image processor to have the characteristics of multiprogram module.Can be accurate with above-mentioned data load in image processor, be that image processor loads the condition that must satisfy with proving installation, if how the data load failure guarantees to load with proving installation and can continue operate as normal, be the technological difficulties in this type of device design.
The dsp software on-line debugging commonly used and the method for loading are that the emulator that utilizes DSP making manufacturer to provide is undertaken by the JTAG on the DSP (Joint Test Action Group) port.This method is very convenient in the debug phase, but in complicated embedded system, image processor may be the part of total system.After finishing system docking, image processor and total system cooperating in case go wrong, just need separate image processor with total system, expose the debugging and the loading that could realize software behind the jtag port.And use JTAG to load, not only need extra instruments such as emulator, development platform, also need the professional person to operate, narrow application range.
In " Global Electronics Components " 2008 the 8th phases, in " based on serial ports of computers DSP program realization of loading " literary composition of people such as the graduate Lee's generation of air-to-air missile outstanding person, mention a kind of method that DSP is loaded based on serial ports of computers, carry out being connected to after the level conversion hyperchannel buffer memory serial ports (the Multi-channel Buffered Serial Port of DSP by a UART chip, McBSP) carry out, but communication protocol is simple, only relate to the situation of the single program module of DSP in the example that provides, can not be applicable to the complex image processing machine.And the reliability of this loading method is not high, if loading error will cause loading and the proving installation paralysis.
In " research and development " 2007 the 26th the 10th phases of volume, in " design and the realization of the outer Flash in-system programming of DSP sheet " literary composition of people such as the Zhang Bing of Nanjing Aero-Space University, also mentioned a kind of method that adopts serial ports of computers that the outer Flash of DSP sheet is loaded, made up the renewal firmware program of a resident Flash, solved loading error and caused loading the problem of paralysing with proving installation, but the given example of this method also only relates to the situation that DSP handles single software, communication protocol is simple, can not be applicable to image processor, and not consider that more effective measures guarantees reliability of data transmission with multiprogram module.
Summary of the invention
The object of the present invention is to provide a kind of image processor data load method and device, after image processor is packed, can upgrades and safeguard program, and can enable different image processing programs according to different target types, easy to operate, the reliability height.
A kind of image processor data load and method of testing, loading procedure is stored in the FLASH first address place of image processor, comprise FLASH load submodule, software switching submodule, path detection sub-module, the first test submodule, the second test submodule ..., n tests submodule, loads that the DSP of image processor calls in internal memory with loading procedure when starting with proving installation; Data to be loaded deposit the subsequent address of FLASH in, comprise image processing program, program parameter and To Template image; Image processing program comprises switching software submodules, path detection sub-module and Flame Image Process submodule;
The current working procedure of DSP receives and loads the command information that sends with proving installation, judges it self is loading procedure or image processing program, if loading procedure is then handled according to mode A: if image processing program is then handled according to mode B;
Mode A:
A1) if command information is the FLASH load instructions, the FLASH that then moves loading procedure loads submodule and finishes the FLASH data loading operations;
The FLASH data loading operations is carried out as follows:
(a11) FLASH loads submodule and detects the FLASH type that DSP connects, and returns the ready for receiving information that includes the FLASH type to loading with proving installation;
(a12) load and to treat loading data with proving installation according to the FLASH type and encode, the packet that coding is obtained sends to FLASH and loads submodule;
(a13) FLASH loads submodule and receives packet, and to decoded packet data and do the correctness verification, check results is returned to load and proving installation, be correct as check results, enter step (a4), otherwise, end;
(a14) FLASH loads the FLASH sector that data that submodule obtains decoding write the appointment of FLASH load instructions;
(a15) FLASH loading submodule carries out the correctness verification to the data that write FLASH, if correct, then return FLASH and loads successful status information, otherwise finish;
A2) if command information is the program switching command, judge then whether self is target program, if, then move loading procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, the changeover program submodule of operation loading procedure with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;
A3) if command information is the i test instruction, i=1,2 ..., n then moves i test submodule of loading procedure and finishes corresponding test, and to loading the status information of returning the expression test result with proving installation;
A4) detect instruction if command information is a path, then move the path that the path detection sub-module of loading procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation;
Mode B:
B1) if command information is the data load instruction, then return the status information that the prompting user switches to loading procedure to loading with proving installation;
B2) if command information is the changeover program instruction, judge then whether self is target program, if, then move the present image handling procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, before the operation changeover program submodule of image processing program with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;
B3) if command information is the i test instruction, i=1,2 ..., n then returns the status information that prompting switches to loading procedure to loading with proving installation;
B4) detect instruction if command information is a path, then move the path that the path detection sub-module of present image handling procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation.
Traditional in the past background technology is compared, and technique effect of the present invention is embodied in:
1. improved the loading reliability.
Designed the loading procedure at the resident FLASH first address place of a cover, generally need not change after consigning to the user, effectively solved the data load failure and caused loading problem with the proving installation collapse.
2. after image processor was packed, convenience was upgraded to program and is safeguarded
The user by the main control computer control chart as the processor operation loading procedure, finishing the data load task, thus the routine data of the image processor of upgrading easily; In addition, can actual needs, the test submodule of expansion loading procedure, for example monitor important devices device on the image processor duty, check and change current operation among the DSP Program Type, check the data content stored among the FLASH etc., realize effective maintenance to program.
3. work out a cover general loading and proving installation and be loaded communication protocol between the image processor.
This agreement can be expanded, easily explain, be not only applicable to based on serial ports of computers, can also revise the loading and the proving installation that are used for based on USB mouth or PCI mouth or network interface slightly, be common to Flame Image Process machine platform, have the strong and reliability advantages of higher of general, extensibility with FPGA+DSP+FLASH structure.
4. improved DSP multiprogram module handoff technique
By introducing the guiding selector switch that software mode is realized, do not need to revise processor hardware, only need the user to import to be switched target program information, main control computer control DSP just can realize any switching between the multiprogram module.
Description of drawings
Fig. 1 is an operation step map of the present invention;
Fig. 2 is an instruction packet format definition synoptic diagram;
Fig. 3 is a literature kit formal definition synoptic diagram;
Fig. 4 is the one-piece construction figure of loading of the present invention and proving installation;
Fig. 5 is loading of the present invention and proving installation and the hierarchical chart that is loaded image processor;
Fig. 6 is main control computer end control program functional module division figure;
Fig. 7 is the serial data format chart;
Fig. 8 is loading of the present invention and proving installation and the connection diagram that is loaded image processor;
Fig. 9 is main DSP and from the McBSP mouth connection diagram between the DSP;
Figure 10 is a data storage synoptic diagram among the FLASH;
Figure 11 is that the submodule of loading procedure is divided synoptic diagram;
Figure 12 is that the submodule of loading procedure embodiment is divided synoptic diagram;
Figure 13 is the loader module process flow diagram that runs among the image processor master DSP;
Figure 14 is the image processing program module process flow diagram that runs among the image processor master DSP;
Figure 15 runs on the loader module process flow diagram of image processor from DSP;
Figure 16 runs on the image processing program module process flow diagram of image processor from DSP.
Embodiment
Be described in further detail below in conjunction with drawings and Examples.
Fig. 1 has provided loading method flow process of the present invention, is specially.
(1) the loading procedure executable file that will be generated by the development platform compiling of DSP converts the clear data file that FLASH supports to, for example will be converted to the .hex file of 16 systems by the .out file of CCS (Code Composer Studio) compiling generation.Loading procedure comprises that FLASH loads submodule, changeover program submodule, path detection sub-module, device detection submodule and FLASH data and checks submodule.
(2) adopt DSP to make emulator and debugging interface that manufacturer provides, for example adopt the USB emulator and the jtag port of TI company, the data file that generates in the step (1) is write the first address place of the outer FLASH of DSP sheet.
(3) start-up loading and proving installation comprise connecting loading and proving installation and being loaded image processor, open main control computer, and operation main control computer control program module starts image processor.The program that each DSP moved in the image processor is the loading procedure of the middle programming of step (2) to FLASH first address place at this moment.
(4) before the FLASH of loading procedure loading submodule carried out data load, whether test earlier was correct from the data path of main control computer → image processor DSP → main control computer, if correct, then enters step (5), otherwise end operation is checked failure cause.
(5) FLASH loads submodule and respectively various data is write the sector position of specifying FLASH in the following manner:
(5.1) user loads submodule to FLASH and sends the FLASH load instructions, and the information that the FLASH load instructions comprises has: size of data to be loaded, write the sector start address of FLASH;
(5.2) after FLASH loading submodule receives the FLASH load instructions, detect the FLASH type that connects, and carry out the preparation that receives data to be loaded;
(5.3) after loading receives the ready message of DSP with proving installation, treat loading data and encode, and the packet that coding obtains is sent to loading procedure; Data to be loaded deposit the subsequent address of FLASH in, comprise image processing program, program parameter and To Template image; Image processing program comprises changeover program submodule, path detection sub-module and Flame Image Process submodule;
(5.4) FLASH loads submodule and receives packet to be loaded, to decoded packet data and do the correctness verification, check results is returned to loads and proving installation, as check results is correct, enters step (5.5), otherwise, finish this operation, the detection failure reason is got back to step (3);
(5.5) FLASH loads the data effective to be loaded that submodule obtains decoding and writes the specified sector position of FLASH load instructions;
(5.6) FLASH loading submodule carries out the correctness verification to the data that write FLASH, if correct, then return and loads successful information to loading and proving installation, and this loaded is got back to step (5); Otherwise finish this operation, detect error reason, get back to step (4);
(6) load all data are all correctly write among the FLASH of image processor with proving installation after, the current working procedure of DSP receives user's command information, judge it self is loading procedure or image processing program, if loading procedure, then handle: if image processing program is then handled according to aforementioned manner B according to aforementioned manner A.
Loading and proving installation and image processor mutual general data have and load three kinds of the status message data that data and image processor return to main control computer that are loaded that the director data, loading and the proving installation that send to image processor with proving installation send to image processor, be specially:
(1) loading detects instruction with proving installation with path and sends to image processor;
(2) loading is instructed to image processor with proving installation transmission changeover program;
(3) loading sends the file data update instruction to image processor with proving installation;
(4) loading sends file data to be loaded to image processor with proving installation;
(5) load with proving installation and send on the test board device instruction word to image processor;
(6) loading sends the FLASH data with proving installation and checks that instruction is to image processor;
(7) information that whether normal the image processor return path is is given and is loaded and proving installation;
(8) image processor returns the changeover program status information and gives loading and proving installation;
(9) image processor returns and loads FLASH information to loading and proving installation;
(10) image processor returns the device test result information and gives loading and proving installation;
(11) image processor returns among the FLASH data information stored and gives and load and proving installation.
In order to guarantee the reliability of loading method, the present invention has mainly taked following measure:
(1) formulated the communication protocol that a cover is followed jointly by loading and proving installation and image processor;
With loading and proving installation and image processor mutual data definition be the fixed size form, each packet size is 32Bytes.Loading is identical with the formal definition that proving installation sends to the instruction bag of image processor and the status message bag that image processor returns to loading and proving installation, as shown in Figure 2, first three field is a header packet information, expression respectively: DSP numbering, program number and classes of instructions, latter two field is 16 cyclic check codes (Cyclic Redundancy Check, CRC), middle field is concrete instruction or status word.
The formal definition of packet to be loaded as shown in Figure 3, the packet header bag tail unanimity of packet header bag tail information and instruction bag, the 3rd, 4 field of literature kit is the data frame numbers.
(2) packet that transmits between loading and proving installation and the image processor is carried out CRC check;
(3) carry out the frame number verification to loading the program module packet that is loaded that sends to image processor with proving installation, the packet of check errors will not allow to write FLASH.
(4) set the loader module of resident FLASH.
It is the loading procedure of being mentioned in the step (1) (2), this program independence and other image processing program, be exclusively used in and realize the data load function, it generally need not upgrade after writing FLASH, has solved the data load failure and has caused loading the problem that can not continue operate as normal with proving installation.
(5) timeout treatment.
Comprise overtime two kinds of overtime and loading of image processor and proving installation.If image processor is overtime, then the main control computer control program provides system message, prompting user " the overtime nothing response of processor ", and the user carries out fault detect according to this prompting.Image processor is provided with watchdog circuit, if DSP surpasses not operation of certain hour, processor will be restarted automatically.
If DSP does not receive next literature kit in the 30s after receiving a literature kit, think that then main control computer is overtime, in DSP, set a clock monitor, in case the clock monitor is triggered, DSP just abandons current operation, gets back to original state.
The present invention not only is used for single DSP image processor, also is applicable to many DSP image processor, and existing is loading and the proving installation that the example explanation realizes said method with many DSP figure camera.As shown in Figure 4, loading comprises a RS232/RS422 serial converter, the main control computer that possesses the RS232 serial ports, electrical specification change-over circuit and loading procedure with proving installation, and being loaded image processor is a kind of structure based on many DSP+FPGA+FLASH.
Loading and proving installation and be loaded the hierarchical structure of image processor with reference to figure 5, are followed successively by from low to high from low to high and are followed successively by: hardware layer, hardware interface layer, supervisory system layer, Windows device drive layer, Windows operating system layer and application layer.
(1) hardware layer: various hardware resources on image processor and the plate thereof.
(2) hardware interface layer: claim the hardware driving layer again, form that these driving functions are directly operated hardware, thereby drive the hardware circuit operate as normal by a series of driving functions through encapsulation.The calling interface that they upwards provide makes the user needn't be concerned about how bottom hardware works.
(3) supervisory system layer: watchdog routine is used to control the operation of entire image processing machine, finishes the task scheduling of total system, resources allocation, the transmission of data, the reception of order, explanation and execution.
(4) Windows device drive layer: between application layer and monitoring software layer, all data communication will have the support of Windows device drive layer between control program and the image processor, device drive layer is transformed into the IRP request package with the data and the order of application layer, calls the data communication that corresponding processing routine is finished control program and DSP.
(5) Windows operating system layer: the running environment of main control computer end control desk control program module.Utilize the various Windows window messages of its message circulation mechanism processing controls program module, the corresponding IRP of invocation facility driver handles is the back-up environment of whole main control computer control program module simultaneously.
(6) application layer: the main control computer control program module just is in this layer, and the good man-machine interaction interface is arranged, and the user is by the operation of this program module control total system and the state of supervisory system.
Wherein, all tasks of (1) (2) (3) layer and the realization of function are positioned on the image processor, and all tasks of (4) (5) (6) layer and the realization of function are positioned on loading and the proving installation.
The digital picture machine data of realizing said method loads and proving installation, comprises main control computer, RS232/RS422 serial converter, opering characteristic of electric apparatus change-over circuit and loading procedure, introduces in detail loading with each assembly of proving installation below.
1, RS232/RS422 serial converter
Serial converter one end connects the RS232 port of main control computer, and the other end connects the electric conversion circuit of image processor.Its effect is that the main control computer output stream is converted to difference modes, is convenient to long Distance Transmission.
2, main control computer
The control program module of main control computer is developed under the environment of Visual C++6.0, makes progress and user interactions, calls Windows API (Application Programming Interface, application programming interface) function downwards.Want and to send the agreement predetermined data to image processor, receive and resolve the information that DSP returns; Build the interface with user interactions,, produce dependent instruction information and send to image processor according to user's operation.After receiving the information that image processor returns, resolve and be notified to the user.The functional module of main control computer control program module is divided as shown in Figure 6, comprises six function sub-modules, is respectively: file layout conversion submodule, coding submodule, transmission submodule, reception submodule, analyzing sub-module and display sub-module.
(1) file layout conversion submodule is used for the data file of user's input is converted to the file layout that FLASH supports, for example the .out file conversion that will be generated by the CCS compiling is the .hex file, and the step of file layout conversion is as follows:
1. the extension name with file changes .hex into by .out;
2. the .hex file header is removed, isolate data file;
3. the .hex after will converting writes under the catalogue of .out file, promptly deposits the main control computer hard disk in.
(2) the coding submodule receives the command information of user's input, reads the data file in the main control computer hard disk, respectively command information and data file information is encoded according to communication protocol, obtains instruction bag and literature kit.For example instruction is wrapped
00c000001ABCDEFGHIJKLMNOPQRSTU (CRC1) (CRC2) represents that this is that a path that sends to DSP0 detects instruction, and what moving among the DSP0 should be No. 0 program, and latter two field CRC1, CRC2 represent the CRC check sign indicating number.
11c000002200000000000000000000 (CRC1) (CRC2) represents that this is a changeover program instruction that sends to DSP1, and what moving among the DSP1 is No. 1 program, requires DSP1 that program is switched to No. 2.
20c000003100064010000000000000 (CRC1) (CRC2) represents that this is a FLASH load instructions that sends to DSP2, and file size to be loaded is 0x1000Bytes, and the start address that is loaded among the FLASH is 0x64010000.
For example literature kit 00dfe00010d24f353dfs5fgg5f3g4f (CRC1) (CRC2) represents that this is a literature kit that sends to DSP0, and frame number is 0xfe (254), and middle 25 fields are the effective document data.When residue file data number deficiency 25Bytes, add 0 polishing.
(3) send submodule configuration main control computer serial ports, and will instruct bag and packet to send to the main control computer serial ports.The serial ports parameter comprises: serial ports title, baud rate, check bit, data bit and position of rest.The baud rate that the present invention adopts is 19200, and check bit is 0, and data bit is 8, and position of rest is 0, and the valid data in the 11bits data are 8bit, and serial data format as shown in Figure 7.
(4) receive the memory block that submodule writes the status information of image processor feedback by the main control computer serial ports main control computer.
(5) analyzing sub-module is used for the status information bag that the dissection process machine returns.
Status information bag for example
02c000001ABCDEFGHIJKLMNOPQRSTU (CRC1) (CRC2) represent that PC is correct to the serial data path between the DSP0, and the program of moving among the DSP0 is No. 2 programs.
12c000002200000000000000000000 (CRC1) (CRC2) represents DSP1 successful switch to 2 program.
20c000003510000000000000000000 (CRC1) (CRC2) represents that the DSP2 number of preparation receives file data to be loaded, and the outer FLASH model of DSP2 sheet is SST28VF016.
If the message bag does not meet the regulation of communication protocol, think that then this packet is error message.
(6) display sub-module analysis result that analyzing sub-module is obtained is shown to the user interface state hurdle.For example: " the serial ports path of PC to 0 DSP is correct, and DSP is moving program No. 0 ", " response of the overtime nothing of processor please check whether data path connects or the reboot process machine ", " DSP writes the FLASH mistake, please check whether FLASH is correct " etc.
3, electrical specification change-over circuit
Because RS-422 works in difference modes, and the FPGA of image processor works in single-ended mode, therefore need be at the peripheral additional electrical specification change-over circuit of FPGA, make the electrical specification coupling of communicating pair, for example the conversion chip MAX3490 of a RS-422 of being exclusively used in, the RS-485 communication of MAXIM company release just can realize this function.
4, loading procedure
Loading procedure mainly is to be used for data to be loaded are write FLASH, and the present invention adopts DSP to make emulator and debugging interface that manufacturer provides, for example adopts the USB emulator and the jtag port of TI company, and it is write the first address place of FLASH.
Being loaded image processor is a kind of structure based on many DSP+FPGA+FLASH, comprise 1～4 FPGA (Field Programmable Gate Array, the zone programmable gate array), 1～9 DSP, and with DSP NOR FLASH one to one, the connected mode of itself and loading and proving installation is seen Fig. 8, will describe the principle of work of each assembly of image processor respectively below:
1、FPGA
FPGA is general with 1～4, is divided into main FPGA and from FPGA, the FPGA that links to each other with the electrical specification change-over circuit is main FPGA, and all the other are from FPGA.The serial data that main FPGA transmits main control computer on the one hand is converted to parallel, flows to according to its header packet information (DSP numbering) judgment data, sends packet to corresponding D SP; The parallel information bag that on the other hand DSP is returned is converted to serial, and feeds back to main control computer.(Universal Asynchronous Receiver and Transmitter UART), realizes the serial/parallel conversion of data to make up UART Universal Asynchronous Receiver Transmitter in main FPGA.Only need decision data to flow to and the forwarding data from FPGA, do not need to carry out serial/parallel conversion.FPGA has played the effect that makes up data path in image processor, realize the data interaction between DSP and the main control computer.
2, DSP and FLASH
DSP is general with 1～9, also is divided into main DSP and from DSP, specifically distribute the appointment by the user, but the DSP one that links to each other with main FPGA is decided to be main DSP.Data path between main DSP and the FPGA is made up by a pair of FIFO buffer memory (input-buffer FIFO and output buffers FIFO), main DSP and the interface realization that carries by DSP from the data path between the DSP, the McBSP mouth of TI C6000DSP for example, the Link mouth of ADI SHARC series DSP, the connected mode of two TI DSP employing McBSP mouths as shown in Figure 9.Separate from the loading passage between DSP.Operation is accordingly carried out in the instruction of DSP response main control computer, is the main executive of data load.
All store two kinds of loader module and image processing program modules with main DSP and the FLASH that links to each other from DSP, as shown in figure 10.Because NOR FLASH needed corresponding sector erasing before programming, therefore programming for convenience, each deposit data is defined as the start address of certain sector to the start address among the FLASH, and, is that it distributes fixing sector position according to the size and the program number of each data.The general variation after typing of each data is less, and the certain surplus of consideration is distributed in the sector, need not change after the distribution.
The whole synoptic diagram of dividing of the loading procedure submodule of main DSP is referring to Figure 11, and an example of this loading procedure comprises six function sub-modules as shown in figure 12:
(1) data flow is judged and is transmitted submodule: be used to judge whether the packet that main DSP receives needs to be transmitted to from DSP.Be specially: the whether corresponding current main DSP numbering of the DSP number information in the decision data bag, if, then it is handled by main DSP, if not, then it is transmitted to corresponding from DSP.
(2) path detection sub-module, whether be used to the data path tested from main control computer → image processor → main control computer correct, be specially: whether the handshake data in the decision instruction bag is consistent with regulation in the communication protocol, if consistent, return path normal messages bag then; If inconsistent, show the error in data that path transmits, the undesired message bag of return path is got back to original state afterwards;
(3) FLASH loads submodule, is used for valid data are write FLASH.Submodule extracts size of data to be loaded from the data load instruction, this document will write information such as the sector start address of FLASH, maximum programming number of times but FLASH loads, calculate the number of packet, detect the FLASH type of DSP institute carry again, the return messages bag shows " DSP0 has been ready to receive file data; the FLASH model of DSP institute carry is: XXXX " to main control computer end control program, opens the clock monitor afterwards.DSP carries out the reliability verification after receiving the file data bag, and the data extract that verification is correct comes out to deposit the programming array in, loses the number of incorrect packet of verification and misregistration packet.If packet receives correctly fully, then can carry out next step and operate, otherwise jump out this module, get back to original state.If surpass 30s the time of arrival of two adjacent file data bags, just think that main control computer is overtime, DSP triggers the clock monitor and jumps out the FLASH load-on module, gets back to initial state.
After DSP reception packet finishes, close the clock monitor, the programming function that calls the FLASH load-on module begins to write FLASH.Whether write among the verification FLASH of back data consistent with the programming file data in the internal memory, if unanimity, return messages bag " the FLASH programming completes successfully " then, and get back to original state; If inconsistent, the FLASH mistake is write in expression, if but there not be maximum times above repetitive operation, then write once again, if but still do not write the FLASH success above the repetitive operation number of times, then the return message bag " is write the FLASH mistake ", get back to original state afterwards, prepare next operation.
(4) changeover program submodule is used for the mutual switching between the image processor multiprogram module.Switching mode is specially: judge earlier whether the program of moving in to be switched target program and the DSP internal memory is consistent, if it is consistent, return messages bag " program successfully starts " then, if it is inconsistent, then the return messages bag " is switching to target program ", DSP resets afterwards, and target program is loaded into the DSP internal memory from FLASH.
(5) device detection submodule is used to test the duty of the outer device of sheet of DSP institute carry, obtains among the FLASH stored data etc.The device commonly used that is mounted to DSP have Synchronous Dynamic Random Access Memory (Synchronous Dynamic Random Access Memory, SDRAM), FLASH, dual port RAM (DualPort Random Access Memory, DPRAM) etc.If method of testing is specially: at first judge the device under test type, write one group of data that increase progressively to device under test again, read out, judge with whether write data identical identical, show that then this device is working properly, otherwise think that this device work is undesired.
(6) the FLASH data are checked submodule: be used for checking the data content that leaves FLASH in.Inspection method is specially: FLASH loads submodule earlier according to storage address information and the size information of waiting to obtain data in the instruction bag, read this segment data among the FLASH, according to coding submodule in the above-mentioned main control computer control program module literature kit being carried out Methods for Coding again encodes to data, results message is checked in generation, returns to main control computer at last.
The image processing program of main DSP comprises path detection sub-module, changeover program submodule, flows to and judge submodule and Flame Image Process submodule.Wherein the function of the path detection sub-module of path detection sub-module and changeover program submodule and aforementioned main DSP loading procedure, changeover program submodule is identical.The flow direction herein judges that the flow direction of submodule and main DSP loading procedure is judged and the identical point of transmitting submodule is: the both needs the DSP number information corresponding current main DSP numbering whether in the decision data bag; Difference is: the former result of determination is then returned the status information that prompting switches to loading procedure for not at once, and latter's result of determination is at once, then directly with data forwarding to target from DSP.The Flame Image Process submodule is used to realize the image processing algorithm of certain particular task.
The workflow of image processor end is as follows:
Main DSP and power on from DSP after all give tacit consent to and start the loading procedure that is stored in the FLASH first address, if exceed schedule time, do not receive the main control computer data, think then that the user is current and do not do the FLASH load operation, Automatic Program is switched to the image processing program of acquiescence, otherwise, continue the operation loading procedure main control computer task data handled accordingly.
Main DSP is in the process of carries out image processing program, if there is the main control computer task data to arrive, then image processing program stops current operation, then the main control computer task data is handled: main DSP calls the flow direction of image processing program and judges whether submodule judgment data bag needs to transmit, if need, then return messages bag prompting user switches to the loading procedure of main DSP, if do not need, then, handle according to following steps with reference to Figure 14:
(101) if the command word in the instruction bag is indicated as detection path instruction, then the path detection sub-module of runs image processing program.
(102) if the command word in the instruction bag is indicated as the data load instruction, then return messages bag prompting user switches to loading procedure.
(103) if the command word in the instruction bag is indicated as changeover program instruction, then the changeover program submodule of runs image processing program.
(104) if the command word in the instruction bag is indicated as the device detection instruction, then return message bag prompting user switches to loading procedure.
(105) check instruction if the command word in the instruction bag is indicated as the FLASH data, then return message bag prompting user switches to loading procedure.
Main DSP is when carrying out loading procedure, if there is the main control computer task data to arrive, then loading procedure serial data that main control computer is transmitted (instruction bag and packet) is resolved, call the data flow of loading procedure and judge and transmit submodule decision data bag whether need to transmit, if need, then transmit packet and give correspondingly,, then handle according to following step with reference to Figure 13 if do not need from DSP:
(201) if the command word in the instruction bag is indicated as the detection path instruction, then move the path detection sub-module of loading procedure.
(202) if the command word in the instruction bag is indicated as the data load instruction, the FLASH that then moves loading procedure loads submodule.
(203) if the command word in the instruction bag is indicated as the changeover program instruction, then move the changeover program submodule of loading procedure.
(204) if the command word in the instruction bag is indicated as the device detection instruction, then move the device detection submodule of loading procedure.
(205) check instruction if the command word in the instruction bag is indicated as the FLASH data, then move the FLASH data of loading procedure and check submodule.
Figure 15 and Figure 16 have provided respectively from the loading procedure treatment scheme of DSP and image processing program treatment scheme, receive instruction bag and the packet that main DSP transmits from DSP, subsequent operation and main DSP to them handle basic identical, difference has two point: a, does not need to transmit the DSP of packet to other from DSP, therefore do not comprise data flow from the loading procedure of DSP and judge and transmit submodule, do not comprise data flow from the image processing program of DSP and judge submodule; B, the packets of information that produces from DSP return to main control computer by main DSP.
Among the present invention, the Bootstrap Loading method of being mentioned in the Chinese patent file " many DSP multiprogram module booting loading method and system thereof " of the Bootstrap Loading process that is loaded image processor DSP and people's applications such as Central China University of Science and Technology's image recognition and the Zheng Wei of artificial intelligence study institute is identical, this patent document has also been mentioned a kind of method that DSP multiprogram module is switched, but need operate and could realize the toggle switch on the circuit board.After processor was packed, the toggle switch on the plate was also simultaneously packed, will cause the program handoff functionality unavailable.If by force button is connected out, the reliability of system will be influenced.The present invention improves this method, and the employing software mode has been realized the switching between the DSP program module.Present embodiment with FPGA that DSP links to each other in a read-write register is set as the guiding selector switch.The value of this guiding selector switch is read in the DSP channeling conduct when loading, be worth according to this to start corresponding program.
Concrete grammar is as follows:
1) after the program of the current operation of DSP is received switching command, judges at first whether the target program numbering is consistent with the program number of moving,, then the target program numbering is write the guiding selector switch, carry out next step operation if inconsistent; If consistent, then do not carry out next step operation.
2) close global interrupt and remove interrupt control register.
3) data in the DSP level cache be set to invalid.
4) jumping to DSP memory address 0 place carries out.
What 5) deposited at DSP memory address 0 place is user's loading code, so DSP carries out user's loading procedure, the routine data that the numbering of depositing among the FLASH is corresponding with guiding selector switch value is written into internal memory, loaded.
Claims (4)
1. image processor data load and method of testing, loading procedure is stored in the FLASH first address place of image processor, comprise that FLASH loads submodule, changeover program submodule, path detection sub-module, the first test submodule, the second test submodule ..., n test submodule, the DSP of image processor calls in internal memory with loading procedure when loading with the proving installation startup; Data to be loaded deposit the subsequent address of FLASH in, comprise image processing program, program parameter and To Template image; Image processing program comprises changeover program submodule, path detection sub-module and Flame Image Process submodule;
The current working procedure of DSP receives and loads the command information that sends with proving installation, judges it self is loading procedure or image processing program, if loading procedure is then handled according to mode A: if image processing program is then handled according to mode B;
Mode A:
A1) if command information is the FLASH load instructions, the FLASH that then moves loading procedure loads submodule and finishes the FLASH data loading operations;
The FLASH data loading operations is carried out as follows:
(a11) FLASH loads submodule and detects the FLASH type that DSP connects, and returns the ready for receiving information that includes the FLASH type to loading with proving installation;
(a12) load and to treat loading data with proving installation according to the FLASH type and encode, the packet that coding is obtained sends to FLASH and loads submodule;
(a13) FLASH loads submodule and receives packet, and to decoded packet data and do the correctness verification, check results is returned to load and proving installation, be correct as check results, enter step (a14), otherwise, end;
(a14) FLASH loads the FLASH sector that data that submodule obtains decoding write the appointment of FLASH load instructions;
(a15) FLASH loading submodule carries out the correctness verification to the data that write FLASH, if correct, then return FLASH and loads successful status information, otherwise finish;
A2) if command information is the program switching command, judge then whether self is target program, if, then move loading procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, the changeover program submodule of operation loading procedure with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;
A3) if command information is the i test instruction, i=1,2 ..., n then moves i test submodule of loading procedure and finishes corresponding test, and to loading the status information of returning the expression test result with proving installation;
A4) detect instruction if command information is a path, then move the path that the path detection sub-module of loading procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation;
Mode B:
B1) if command information is the data load instruction, then return the status information that the prompting user switches to loading procedure to loading with proving installation;
B2) if command information is the changeover program instruction, judge then whether self is target program, if, then move the present image handling procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, before the operation changeover program submodule of image processing program with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;
B3) if command information is the i test instruction, i=1,2 ..., n then returns the status information that prompting switches to loading procedure to loading with proving installation;
B4) detect instruction if command information is a path, then move the path that the path detection sub-module of present image handling procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation.
2. image processor data load according to claim 1 and method of testing is characterized in that, for read-write register of DSP peripheral hardware as the guiding selector switch; When DSP carries out the program switching, earlier the target program numbering is write the guiding selector switch, hot reset reads the numerical value of guiding selector switch storage then again, will be stored in the program that numbering equates with this numerical value among the FLASH at last and be written into internal memory.
3. realize the image processor data load and the proving installation of the described method of claim 1, comprise main control computer, RS232/RS422 serial converter, opering characteristic of electric apparatus change-over circuit and loading procedure;
Main control computer links to each other with image processor based on the FPGA+DSP+FLASH structure by RS232/RS422 serial converter, opering characteristic of electric apparatus change-over circuit; Loading procedure is stored in the FLASH first address place of image processor, comprise that FLASH loads submodule, software switching submodule, path detection sub-module, the first test submodule, the second test submodule ..., n test submodule, DSP calls in internal memory with loader module when loading startup; Data to be loaded deposit the subsequent address of FLASH in, and data to be loaded comprise image processing program, program parameter and To Template image; Image processing program comprises changeover program submodule, path detection sub-module and Flame Image Process submodule;
Main control computer obtains packet and instruction bag to the data to be loaded and the command information coding of user's input, sends it to the DSP of image processor; Receive the status message that DSP returns, to feeding back to the user after its decoding;
RS232/RS422 serial converter one end connects main control computer, and other end connecting circuit characteristic change-over circuit is used to realize the mutual conversion of serial data RS232 form and RS422 form;
Opering characteristic of electric apparatus change-over circuit one end connects the RS232/RS422 serial converter, and the other end connects the FPGA of image processor, is used to realize the mutual conversion of serial data RS422 difference modes and single-ended mode;
The current working procedure of DSP receives and loads the command information that sends with proving installation, judges it self is loading procedure or image processing program, if loading procedure is then handled according to mode A: if image processing program is then handled according to mode B;
Mode A:
A1) if command information is the FLASH load instructions, the FLASH that then moves loading procedure loads submodule and finishes the FLASH data loading operations;
The FLASH data loading operations is carried out as follows:
(a11) FLASH loads submodule and detects the FLASH type that DSP connects, and returns the ready for receiving information that includes the FLASH type to loading with proving installation;
(a12) load and to treat loading data with proving installation according to the FLASH type and encode, the packet that coding is obtained sends to FLASH and loads submodule;
(a13) FLASH loads submodule and receives packet, and to decoded packet data and do the correctness verification, check results is returned to load and proving installation, be correct as check results, enter step (a14), otherwise, end;
(a14) FLASH loads the FLASH sector that data that submodule obtains decoding write the appointment of FLASH load instructions;
(a15) FLASH loading submodule carries out the correctness verification to the data that write FLASH, if correct, then return FLASH and loads successful status information, otherwise finish;
A2) if command information is the program switching command, judge then whether self is target program, if, then move loading procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, the changeover program submodule of operation loading procedure with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;
A3) if command information is the i test instruction, i=1,2 ..., n then moves i test submodule of loading procedure and finishes corresponding test, and to loading the status information of returning the expression test result with proving installation;
A4) detect instruction if command information is a path, then move the path that the path detection sub-module of loading procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation;
Mode B:
B1) if command information is the data load instruction, then return the status information that the prompting user switches to loading procedure to loading with proving installation;
B2) if command information is the changeover program instruction, judge then whether self is target program, if, then move the present image handling procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, before the operation changeover program submodule of image processing program with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;
B3) if command information is the i test instruction, i=1,2 ..., n then returns the status information that prompting switches to loading procedure to loading with proving installation;
B4) detect instruction if command information is a path, then move the path that the path detection sub-module of present image handling procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation.
4. image processor data load according to claim 3 and proving installation is characterized in that, for read-write register of DSP peripheral hardware as the guiding selector switch; When DSP carries out the software switching, earlier the target software numbering is write the guiding selector switch, hot reset carries out the DSP reloading at last again; The reloading process is specially: DSP reads the numerical value of guiding selector switch storage, is written into internal memory with being stored in software corresponding with this numerical value among the FLASH.
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| CN102685396B (en) * | 2011-03-18 | 2017-02-01 | 新奥特（北京）视频技术有限公司 | Method and system for serial communication of controlled equipment in nonlinear edition system |
| CN102495746A (en) * | 2011-11-29 | 2012-06-13 | 中国航空工业集团公司第六三一研究所 | Onboard embedded computer data loading method |
| CN103188306B (en) * | 2011-12-30 | 2016-04-27 | 中国移动通信集团公司 | Distributed preprocess method and system |
| CN102609331A (en) * | 2012-01-19 | 2012-07-25 | 苏州希图视鼎微电子有限公司 | File format of loading code in NAND flash |
| CN103176823A (en) * | 2013-03-04 | 2013-06-26 | 上海古鳌电子科技股份有限公司 | Image module with USB flash disk and internet access upgrading function and operation mode thereof |
| CN103269123B (en) * | 2013-05-03 | 2015-01-21 | 国家电网公司 | Power distribution network line operation monitoring system |
| CN106528203B (en) * | 2016-10-10 | 2019-10-18 | 上海无线电设备研究所 | A kind of automated procedures programming method of multi-DSP chip |
| CN107885523B (en) * | 2017-11-10 | 2021-08-31 | 航宇救生装备有限公司 | Rapid and stable serial port software upgrading method |
| CN108829465B (en) * | 2018-06-27 | 2021-01-08 | 北京计算机技术及应用研究所 | Local dynamic loading system and method based on direct read-write FLASH |
| CN109597777A (en) * | 2018-12-11 | 2019-04-09 | 济南浪潮高新科技投资发展有限公司 | A kind of MCBSP interface inter-link device and method based on FPGA |
| CN111030924B (en) * | 2019-11-26 | 2022-03-08 | 浙江吉城云创科技有限公司 | Gateway equipment, configuration method and working method |
| CN110990086B (en) * | 2019-11-26 | 2021-07-02 | 华中科技大学 | Coprocessor calling method and system for image target detection |
| CN111080637A (en) * | 2019-12-25 | 2020-04-28 | 深圳力维智联技术有限公司 | Cloud service-based advertisement remote method, device, system, product and medium |
| CN112389592B (en) * | 2020-11-12 | 2021-09-03 | 中国人民解放军海军工程大学 | Actuating mechanism of unmanned ship and control method thereof |
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