CN101604342A - A kind of method and device thereof at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor - Google Patents
A kind of method and device thereof at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor Download PDFInfo
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- CN101604342A CN101604342A CNA2008100387466A CN200810038746A CN101604342A CN 101604342 A CN101604342 A CN 101604342A CN A2008100387466 A CNA2008100387466 A CN A2008100387466A CN 200810038746 A CN200810038746 A CN 200810038746A CN 101604342 A CN101604342 A CN 101604342A
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Abstract
The present invention relates to a kind of method and device thereof at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor, its method comprises: first determining step: judge whether historical data base has historical data, when historical data, directly get historical data and send into the placement algorithm step and calculate; Input step, the user imports the metal-oxide-semiconductor terminal point information, and exports with the corresponding endpoint coordinate information; The placement algorithm step to the end points coordinate information of described output, or to the described historical data that obtains, is carried out placement algorithm and is calculated output mos pipe calculated value MOS '; Whether consistent second determining step: with the target MOS pipe MOS of metal-oxide-semiconductor calculated value MOS ' with required mark " carry out judgement, when " inconsistent ", feed back to described input step and replenish input endpoint information; The parameter information that the mark storing step when " unanimity ", carries out metal-oxide-semiconductor MOS " mark, the metal-oxide-semiconductor MOS that storage has marked " is to historical data base.The present invention promotes the metal-oxide-semiconductor marking efficiency.
Description
Technical field
The present invention relates to integrated circuit (IC) electric design automation (EDA) field, refer in particular to a kind of method and device thereof at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor.
Background technology
One, integrated circuit electric design automation (EDA)
Electric design automation (EDA) is to come from the concept development of computer-aided design (CAD) (CAD), computer-aided manufacturing (CAM), computer aided testing (CAT) and computer-aided engineering (CAE).It is an instrument with the computing machine, is platform with the eda software, has greatly improved the efficient of integrated circuit (IC) design.
Eda software has constituted an integrated circuit simulating platform, and on this platform, the various functions that the deviser utilizes software to provide are finished integrated circuit (IC) design.It is the indispensable technological means of modern integrated circuits designing institute, and the circuit engineering teacher relies on it to finish design, emulation, the test of integrated circuit, obtains meeting the chip of target at last.Be embodied at various tool software, as allow the software for editing of user's input circuit figure, domain, higher level lanquage is compiled into the integrated software of basic circuit, check the software of various design specificationss such as electric rule, domain rule, or the like.
On function, every kind of eda software all is that a kind of data-switching is become another kind of data, and every kind of data all are to describe part or entire circuit from certain angle.Such as, the circuit diagram of representation function structure, the domain of description production structure, the net table of description annexation, or the like.Whole integrated circuit (IC) design flow process is exactly by a variety of design tools, will convert manufacturing-oriented data step by step to towards deviser's data.Such as, software for editing converts user's mouse, keyboard input structurized circuit to and describes, the net table generates software structurized circuit is described the net table that is transformed into the description annexation of being convenient to Computer Processing, and placement-and-routing's software is transformed into the domain of being convenient to produce with the net table, or the like.
Two, integrated circuit mark
Integrated circuit mark be a kind of between production form and electronic information between description form, be used to element and the annexation of representing that actual production is come out.It comprises whole join dependency information, as element, interface, line etc.; Also comprise the optionally relevant graphical information of production of part, as range of components, gate patterns, line path, line place layer, lead to the hole site etc.Read for the ease of the user, the subelement figure can adopt simplified way, as with the rectangle of a representation element scope and the whole element of the symbology that rectangle constituted of several representation element ports, omit other figures that are used to produce such as active area, trap of element; And for example replace having the line of width, replace the square hole of fixed size with small sircle hole with the line of refinement.In general, the integrated circuit mark comprises fundamental elements such as element, port, line, through hole, text.
Integrated circuit mark editing machine is the Software tool that user's input is converted to the integrated circuit mark.Software accepts to comprise user's input of keyboard, mousebutton and coordinate, rejects illegal operation wherein, with remaining information translate into various positions of elements, size, towards etc. data.
Three, metal-oxide-semiconductor mark
A distinguishing feature of integrated circuit diagram is exactly that number of elements is many, and mos field effect transistor (MOS FET is hereinafter to be referred as metal-oxide-semiconductor) is the most basic a kind of element in the integrated circuit mark, and its quantity is quite huge.This mark element comprises essential information such as scope, port position, gate length (L), grid width (W), repetition number (M); Can select to comprise that gate figure etc. conveniently is used to the information of reading.
Four, existing metal-oxide-semiconductor mask method
Present existing metal-oxide-semiconductor mask method is divided into two classes.
One class methods be with metal-oxide-semiconductor make with not gate, with class like template, input coordinate can mark a metal-oxide-semiconductor.Its shortcoming is that each template can only have a kind of size (W, L), and different size need be created different templates.Usually, comprise the metal-oxide-semiconductor of multiple different size in mimic channel and the custom circuit, need a plurality of templates of definition, be unfavorable for management and use.
Another kind of method is scope, gate patterns, the port position that metal-oxide-semiconductor of every mark is just imported it.Such as, two point coordinate of first step input metal-oxide-semiconductor scope, two or more point coordinate of gate figure, the 3rd input port position coordinates are represented in the input of second step.Its shortcoming is the coordinate input that each metal-oxide-semiconductor all needs fixed qty, and the input data volume is bigger.Fig. 1 illustrates traditional user that requires and imports the process flow diagram of the metal-oxide-semiconductor mask method of whole metal-oxide-semiconductor parameter informations.
Therefore, existing two kinds of metal-oxide-semiconductor mask methods or needs are created a lot of masterplates now, are difficult to management, perhaps need the user to import the full detail of metal-oxide-semiconductor.Both metal-oxide-semiconductors mark efficient is lower always thus.
Summary of the invention
The object of the present invention is to provide a kind of method and device thereof, to promote the metal-oxide-semiconductor marking efficiency by this method and device at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor.
One of the present invention: a kind of device at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor.Comprise: the historical data judge module, whether be " sky " judge: as " sky " time output " no historical data " result to historical data base if being used for; As non-" sky " time output " historical data is arranged " result; The input data module is output as " no historical data " as a result the time for described historical data judge module, and this input data module is accepted the metal-oxide-semiconductor terminal point information that the user imports, and exports with the corresponding endpoint coordinate information; The placement algorithm module, the historical data that is used for accepting the end points coordinate information of described input data module output or accepts historical data base is carried out placement algorithm and is calculated output mos pipe calculated value MOS '; Judge comparison module, be used for the metal-oxide-semiconductor calculated value MOS ' of described placement algorithm module output and the target MOS pipe MOS of required mark " carry out whether consistent judgement; export " unanimity " or " inconsistent " result; when " inconsistent ", feed back to described input data module and replenish input endpoint information; The mark memory module is used for described judgement comparison module is output as parameter information that " unanimity " result's target MOS pipe MOS " marks, and store the target MOS pipe MOS that this has marked " to historical data base.
In the device of above-mentioned mark metal-oxide-semiconductor, the placement algorithm module comprises connecting successively towards calculating (F1) module, grid calculating (F2) module and port calculates (F3) module.
In the device of above-mentioned mark metal-oxide-semiconductor, the metal-oxide-semiconductor terminal point information that the input data module is accepted user's input is the terminal point information of random length, i.e. the part or all of parameter information of metal-oxide-semiconductor.
In the device of above-mentioned mark metal-oxide-semiconductor, the metal-oxide-semiconductor terminal point information comprises metal-oxide-semiconductor position, active area information, towards, grid information, grid width, long, the port position of grid.
The present invention's two: a kind of method at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor.Comprise: first determining step: judge whether historical data base has historical data, when historical data, directly get historical data and send into the placement algorithm step and calculate; When no historical data, enter input step; Input step, the user imports the metal-oxide-semiconductor terminal point information, and exports with the corresponding endpoint coordinate information; The placement algorithm step to the end points coordinate information of described output, or to the described historical data that obtains, is carried out placement algorithm and is calculated output mos pipe calculated value MOS '; Whether consistent second determining step: with the target MOS pipe MOS of metal-oxide-semiconductor calculated value MOS ' with required mark " carry out judgement, when " inconsistent ", feed back to described input step and replenish input endpoint information; The parameter information that the mark storing step when second determining step is judged as " unanimity ", carries out metal-oxide-semiconductor MOS " mark, the metal-oxide-semiconductor MOS that storage has marked " is to historical data base.
In the method for above-mentioned mark metal-oxide-semiconductor, the placement algorithm step comprise carry out successively towards calculate (F1), grid calculate (F2) and port calculates (F3).
In the method for above-mentioned mark metal-oxide-semiconductor, the user imports the terminal point information that the metal-oxide-semiconductor terminal point information is a random length in the input step, i.e. the part or all of parameter information of metal-oxide-semiconductor.
In the method for above-mentioned mark metal-oxide-semiconductor, comprise towards the content of calculating (F1): two input endpoints of active area, when during to the bottom right, being oriented by upper left; When by the bottom right when upper left, be oriented down; When during to the lower-left, being oriented the right side by upper right; When by the lower-left when upper right, be oriented a left side.
In the method for above-mentioned mark metal-oxide-semiconductor, the content that grid calculate (F2) comprises: grid exceed minimum feature by towards passing active area at direction; In the other direction, exceed half of minimum feature.
In the method for above-mentioned mark metal-oxide-semiconductor, the content that port calculates (F3) comprises: the G port is positioned at the center that active area on the grid exceeds the minimum feature part outward, the grid that calculated by grid calculating (F2) module are divided into two parts with active area, and S port, D port are respectively at this two-part center.
The present invention makes it have following advantage and characteristics owing to adopted above technical scheme:
1, high efficiency.Metal-oxide-semiconductor mask method of the present invention owing to adopted historical data memory, metal-oxide-semiconductor parameter dynamic calculation, makes the user not need to import whole parameter informations of metal-oxide-semiconductor, just can mark and finish a metal-oxide-semiconductor.Promoted the metal-oxide-semiconductor marking efficiency greatly;
2, intellectuality.Metal-oxide-semiconductor mask method of the present invention because the memory historical data, emphasize between each parameter of metal-oxide-semiconductor association, have the placement algorithm between each parameter of metal-oxide-semiconductor, in any moment of mark, all can calculate whole parameter informations of a metal-oxide-semiconductor.The user is in mark, and one or a small amount of several information of input metal-oxide-semiconductor just calculate other parameter information of metal-oxide-semiconductor and conforms to metal-oxide-semiconductor on the domain, directly create a metal-oxide-semiconductor and finish.
Description of drawings
Fig. 1 illustrates traditional user that requires and imports the process flow diagram of the metal-oxide-semiconductor mask method of whole metal-oxide-semiconductor parameter informations;
Fig. 2 illustrates the schematic representation of apparatus of the present invention at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor;
Fig. 3 illustrates the method flow diagram of the present invention at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor;
Fig. 4 (a)～(d) shows the algorithm (F of metal-oxide-semiconductor towards (Dir)
1) synoptic diagram;
Fig. 5 shows the algorithm (F of metal-oxide-semiconductor grid
2) synoptic diagram;
Fig. 6 (a)～(c) illustrates the synoptic diagram of the computing rule of port.
Embodiment
The present invention is described in further detail below in conjunction with drawings and embodiments.
One of the present invention, a kind of device at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor.
Referring to Fig. 2, the present invention, the device that promptly marks metal-oxide-semiconductor comprises:
Historical data judge module 1, whether be " sky " judge: as " sky " time output " no historical data " result to historical data base if being used for; As non-" sky " time output " historical data is arranged " result.
The function of historical data judge module is to have judged whether historical data, and the input of historical data module is a historical data base, and the result is for having historical data or not having historical data in output.When database was " sky ", the result was " a no historical data ", entered input data module 2, generally marked first metal-oxide-semiconductor MOS
1The time be this result; When historical data base had historical data, the result was " historical data is arranged ", directly entered the placement algorithm module, generally marked first later metal-oxide-semiconductor MOS
2, MOS
3... the time be this a kind of result.
Input data module 2, be output as " no historical data " as a result the time for described historical data judge module 1, this data input module 2 is accepted the user input dot information, the metal-oxide-semiconductor terminal point information comprises metal-oxide-semiconductor position, active area information, towards, grid information, grid width, long, the port position of grid, the terminal point information of user's input can be the terminal point information of random length, be the part or all of parameter information of metal-oxide-semiconductor, and export with the corresponding endpoint coordinate information;
Placement algorithm module 3, the historical data that is used for accepting the end points coordinate information of described input data module 2 outputs or accepts historical data base is carried out placement algorithm and is calculated output mos pipe calculated value MOS '.
The input of placement algorithm module 3 has two sources: the output (terminal point information) of input data module 2 and the historical data in the historical data base, these two kinds of coordinate informations that data all are some end points are when beginning to mark a metal-oxide-semiconductor, as first metal-oxide-semiconductor of mark MOS
1The time, the input data are terminal point information; As first later metal-oxide-semiconductor (MOS of mark
2, MOS
3...) time, input be historical data.Be output as the metal-oxide-semiconductor MOS ' that calculates according to placement algorithm.The calculation process of this module is a placement algorithm, and placement algorithm is by constituting towards the calculating F2 module of calculating F1 module, grid and three algorithms of port calculating F3 module.
The parameter information that marks memory module 5, be used for described judgement comparison module 4 is output as " unanimity " result's target MOS pipe MOS " mark, and store the target MOS pipe MOS that has marked " is to historical data base.
The present invention's two, a kind of method at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor.
Referring to Fig. 3,5. method at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor comprises:
First determining step: judge whether historical data base has historical data, when historical data, directly get historical data and send into the placement algorithm step and calculate; When no historical data, enter input step;
Input step, the user imports the metal-oxide-semiconductor terminal point information, this terminal point information is the terminal point information of random length, it is the part or all of parameter information of metal-oxide-semiconductor, and export with the corresponding endpoint coordinate information, the metal-oxide-semiconductor terminal point information comprises metal-oxide-semiconductor position, active area information, towards, grid information, grid width, long, the port position of grid;
The placement algorithm step to the end points coordinate information of described output, or to the described historical data that obtains, is carried out placement algorithm and is calculated output mos pipe calculated value MOS ';
Whether consistent second determining step: with the target MOS pipe MOS of metal-oxide-semiconductor calculated value MOS ' with required mark " carry out judgement, when " inconsistent ", feed back to described input step and replenish input endpoint information;
The parameter information that the mark storing step when second determining step is judged as " unanimity ", carries out metal-oxide-semiconductor MOS " mark, the metal-oxide-semiconductor MOS that storage has marked " is to historical data base.
Promptly mark in the method and device thereof of metal-oxide-semiconductor in above-mentioned invention, placement algorithm comprise carry out successively towards calculate (F1), grid calculate (F2) and port calculates (F3).
In concrete enforcement, to the set omega of historical data
MOSOnly write down the data message of last mark metal-oxide-semiconductor.Bidding is annotated MOS
2(AR
2, Dir
2, L
2, W
2, PS
2, G
2, S
2, D
2) metal-oxide-semiconductor of previous mark is MOS when managing
1(AR
1, Dir
1, L
1, W
1, PS
1, G
1, S
1, D
1), MOS
1Be historical data, the user imports m data.Be Ω
MOS={ MOS
1, D={d
1, d
2..., d
m.M data of input are m point, each some P
iExpression.
If m is 1, adopt the width of a metal-oxide-semiconductor, highly,, and port position long towards, grid width, grid, at P
1New metal-oxide-semiconductor is created at the place.
If m is 2, with P
1, P
2Be the metal-oxide-semiconductor scope, and according to P
1To P
2The direction calculating metal-oxide-semiconductor towards, wide, high, and, height wide with this be key word, searches the grid of the most close metal-oxide-semiconductor in historical data, calculates the port position of MOS according to the shape of the active area scope of metal-oxide-semiconductor and grid, creates new metal-oxide-semiconductor.
If m is 3, with P
1, P
2Be the metal-oxide-semiconductor scope, and according to P
1To P
2The direction calculating metal-oxide-semiconductor towards, wide, high, with P
3Be first limit of the grid of metal-oxide-semiconductor, grid width (L), grid long (W) adopt immediate numerical value in the historical data, calculate the port position of MOS according to the shape of the active area scope of metal-oxide-semiconductor and grid, create new metal-oxide-semiconductor.
If m is 4, with P
1, P
2Be the metal-oxide-semiconductor scope, and according to P
1To P
2The direction calculating metal-oxide-semiconductor towards, wide, high, with P
3, P
4Determine the position and the grid width (L) of metal-oxide-semiconductor.Grid long (W) adopt immediate numerical value in the historical data, calculate the port position of MOS according to the shape of the active area scope of metal-oxide-semiconductor and grid, create new metal-oxide-semiconductor.
If m is 5, with P
1, P
2Be the metal-oxide-semiconductor scope, and according to P0 to the direction calculating metal-oxide-semiconductor of P1 towards, wide, high, with P
3, P
4Determine the position and the grid width (L) of metal-oxide-semiconductor, with P
5Be the grid long (W) of metal-oxide-semiconductor, P5 can determine the partial shape of metal-oxide-semiconductor simultaneously, and doubtful metal-oxide-semiconductor shape adopts in the historical data immediate, calculates the port position of MOS according to the shape of the active area scope of metal-oxide-semiconductor and grid, creates new metal-oxide-semiconductor.
If m is n (n 〉=5), with P
1, P
2Be the metal-oxide-semiconductor scope, and according to P0 to the direction calculating metal-oxide-semiconductor of P1 towards, wide, high, with P
3, P
4Determine the position and the grid width (L) of metal-oxide-semiconductor, with P
5To P
nDetermine the grid long (W) of Mos pipe and the shape of grid, doubtful metal-oxide-semiconductor shape adopts in the historical data immediate, calculates the port position of MOS according to the shape of the active area scope of metal-oxide-semiconductor and grid, creates new metal-oxide-semiconductor.
If m is n (n 〉=5), and d
j(the special data that 5＜j＜n) finishes for the picture grid.d
1To d
J-1In aforementioned identical, determine AR, L, W, the PS of metal-oxide-semiconductor; Data d
J+1To d
nDetermine G, D, the S of metal-oxide-semiconductor.
Calculate F1 towards (Dir): have be the parameter information of MOS active area in the input endpoint at 2, metal-oxide-semiconductor towards also getting by these 2 calculating, Fig. 4 shows the algorithm (F of metal-oxide-semiconductor towards (Dir)
1), D
1(X
1, Y
1), D
2(X
2, Y
2) being the end-point data that active area is gone into, metal-oxide-semiconductor towards definite method of (Dir) is:
Work as X
2＞X
1, Y
2＜Y
1, Dir=Up, promptly metal-oxide-semiconductor is oriented (as Fig. 4 (a));
Work as X
2＜X
1, Y
2＞Y
1, Dir=Down, promptly metal-oxide-semiconductor is oriented down (as Fig. 4 (b));
Work as X
2＜X
1, Y
2＜Y
1, Dir=Right, promptly metal-oxide-semiconductor is oriented the right side (as Fig. 4 (c));
Work as X
2＞X
1, Y
2＞Y
1, Dir=Left, promptly metal-oxide-semiconductor is oriented a left side (as Fig. 4 (d)).
Grid calculate F2: the parameter of grid has grid long (L), grid width (W) etc.When parsing the user when not importing the grid parameter, the long L of grid can obtain from historical data, and placement algorithm calculates grid information (PS) by active area information (AR), grid width (L).Fig. 5 shows the algorithm (F of metal-oxide-semiconductor grid
2), the axis of grid (dotted line) crosses the long L of active area
ARMid point, with the active area width W
ARParallel.If minimum feature is L
Min, grid are L in the length that the metal-oxide-semiconductor direction exceeds active area
T, be L towards the length that opposite direction grows active area at metal-oxide-semiconductor
B, L
T, L
BDefinite method be:
L
T＝L
min
L
B＝L
min/2
When the user imports some terminal point information of grid, as D among the figure
1(X
1, Y
1), D
2(X
2, Y
2) 2 points, then the center line of grid is and D
1, D
2The centre, the long L of grid is:
L＝|X
2-X
1|
Port calculates F3: the calculating of port is mainly the position of G port, D port and the S port of determining metal-oxide-semiconductor, and Fig. 6 illustrates the computing rule of port.In Fig. 6 (a), grid are divided into two parts with active area: regional A and area B, and the two ends of grid are positioned at outside the active area, and wherein metal-oxide-semiconductor is C towards the zone of an end, and the port computing method are:
The G port is positioned at the center of zone C;
The S port is positioned at the center of regional A;
The D port is positioned at the center of area B.
In Fig. 6 (b), the port position of the trend of grid through calculating originally, this moment, the computing method of G port were identical with Fig. 6 (a), and the trend of grid will be divided into two parts by active area: regional A and B, port S, D lay respectively among regional A and the B at this moment.
In sum, the present invention is a kind of variable metal-oxide-semiconductor mask method and annotation equipment based on historical data and placement algorithm, owing to adopted historical data memory, metal-oxide-semiconductor parameter dynamic calculation, make the user not need to import whole parameter informations of metal-oxide-semiconductor, just can mark and finish a metal-oxide-semiconductor, can promote the metal-oxide-semiconductor marking efficiency greatly.
Above embodiment is only for the usefulness that the present invention is described, but not limitation of the present invention, person skilled in the relevant technique, under the situation that does not break away from the spirit and scope of the present invention, can also make various conversion or modification, therefore all technical schemes that are equal to also should belong to category of the present invention, should be limited by each claim.
Claims (10)
1. the device at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor is characterised in that, comprising:
The historical data judge module, whether be " sky " judge: as " sky " time output " no historical data " result to historical data base if being used for; As non-" sky " time output " historical data is arranged " result;
The input data module is output as " no historical data " as a result the time for described historical data judge module, and this input data module is accepted the metal-oxide-semiconductor terminal point information that the user imports, and exports with the corresponding endpoint coordinate information;
The placement algorithm module, the historical data that is used for accepting the end points coordinate information of described input data module output or accepts historical data base is carried out placement algorithm and is calculated output mos pipe calculated value MOS ';
Judge comparison module, be used for the metal-oxide-semiconductor calculated value MOS ' of described placement algorithm module output and the target MOS pipe MOS of required mark " carry out whether consistent judgement; export " unanimity " or " inconsistent " result; when " inconsistent ", feed back to described input data module and replenish input endpoint information;
The mark memory module is used for described judgement comparison module is output as parameter information that " unanimity " result's target MOS pipe MOS " marks, and store the target MOS pipe MOS that this has marked " to historical data base.
2. the device of mark metal-oxide-semiconductor according to claim 1 is characterized in that: described placement algorithm module comprises connecting successively towards calculating (F1) module, grid calculating (F2) module and port calculates (F3) module.
3. the device of mark metal-oxide-semiconductor according to claim 1 and 2 is characterized in that: the metal-oxide-semiconductor terminal point information that described input data module is accepted user's input is the terminal point information of random length, i.e. the part or all of parameter information of metal-oxide-semiconductor.
4. the device of mark metal-oxide-semiconductor according to claim 1 and 2 is characterized in that: described metal-oxide-semiconductor terminal point information comprises metal-oxide-semiconductor position, active area information, towards, grid information, grid width, long, the port position of grid.
5. method at the integrated circuit simulating platform making metal oxide semiconductor (MOS) transistor comprises:
First determining step: judge whether historical data base has historical data, when historical data, directly get historical data and send into the placement algorithm step and calculate; When no historical data, enter input step;
Input step, the user imports the metal-oxide-semiconductor terminal point information, and exports with the corresponding endpoint coordinate information;
The placement algorithm step to the end points coordinate information of described output, or to the described historical data that obtains, is carried out placement algorithm and is calculated output mos pipe calculated value MOS ';
Whether consistent second determining step: with the target MOS pipe MOS of metal-oxide-semiconductor calculated value MOS ' with required mark " carry out judgement, when " inconsistent ", feed back to described input step and replenish input endpoint information;
The parameter information that the mark storing step when second determining step is judged as " unanimity ", carries out metal-oxide-semiconductor MOS " mark, the metal-oxide-semiconductor MOS that storage has marked " is to historical data base.
6. the method for mark metal-oxide-semiconductor according to claim 5 is characterized in that: described placement algorithm step comprise carry out successively towards calculate (F1), grid calculate (F2) and port calculates (F3).
7. according to the method for claim 5 or 6 described mark metal-oxide-semiconductors, it is characterized in that: the user imports the terminal point information that the metal-oxide-semiconductor terminal point information is a random length in the described input step, i.e. the part or all of parameter information of metal-oxide-semiconductor.
8. the method for mark metal-oxide-semiconductor according to claim 6 is characterized in that: describedly comprise towards the content of calculating (F1): two input endpoints of active area, when during to the bottom right, being oriented by upper left; When by the bottom right when upper left, be oriented down; When during to the lower-left, being oriented the right side by upper right; When by the lower-left when upper right, be oriented a left side.
9. the method for mark metal-oxide-semiconductor according to claim 6 is characterized in that: the content that described grid calculate (F2) comprises: grid exceed minimum feature by towards passing active area at direction; In the other direction, exceed half of minimum feature.
10. the method for mark metal-oxide-semiconductor according to claim 6, it is characterized in that: the content that described port calculates (F3) comprises: the G port is positioned at the center that active area on the grid exceeds the minimum feature part outward, the grid that calculated by grid calculating (F2) module are divided into two parts with active area, and S port, D port are respectively at this two-part center.
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| CN106611086A (en) * | 2016-12-26 | 2017-05-03 | 北京华大九天软件有限公司 | Method for wiring between two sets of ports in layout |
| WO2023283956A1 (en) * | 2021-07-16 | 2023-01-19 | 华为技术有限公司 | Layout method and apparatus for integrated circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1521830A (en) * | 2003-02-12 | 2004-08-18 | 上海芯华微电子有限公司 | Technical method for integrated circuit design, test and measurement integration |
-
2008
- 2008-06-10 CN CN2008100387466A patent/CN101604342B/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106611086A (en) * | 2016-12-26 | 2017-05-03 | 北京华大九天软件有限公司 | Method for wiring between two sets of ports in layout |
| CN106611086B (en) * | 2016-12-26 | 2019-09-03 | 北京华大九天软件有限公司 | A kind of method being routed between two groups of ports of domain |
| WO2023283956A1 (en) * | 2021-07-16 | 2023-01-19 | 华为技术有限公司 | Layout method and apparatus for integrated circuit |
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| Publication number | Publication date |
|---|---|
| CN101604342B (en) | 2011-04-20 |
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