CN101593165A - Duplex communication method based on double-port RAM - Google Patents
Duplex communication method based on double-port RAM Download PDFInfo
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- CN101593165A CN101593165A CNA2009100490442A CN200910049044A CN101593165A CN 101593165 A CN101593165 A CN 101593165A CN A2009100490442 A CNA2009100490442 A CN A2009100490442A CN 200910049044 A CN200910049044 A CN 200910049044A CN 101593165 A CN101593165 A CN 101593165A
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Abstract
The present invention discloses a kind of duplex communication method based on double-port RAM, and its storage space is divided into mutually independently first memory block and second memory block, and in two districts domain, length field, data field and verification territory is set all; Wherein said domain and described length field are positioned at head, and described data field is placed in the middle, and described verification territory follows closely after the described data field.The present invention makes two buses can share a double-port RAM, be implemented in the exchanges data between identical or different bus, communicating pair is equal, all can serve as the communication initiator, also but both sides initiate communication simultaneously, can not interfere with each other, and subsidiary check code is reliable and stable with what guarantee to communicate by letter.
Description
Technical field
The present invention relates to Industry Control, data communication field, relate in particular in the high precision litho machine, a kind of duplex communication method based on double-port RAM.
Background technology
In semiconductor fabrication process, the litho machine system is a complication system, it is mutual to relate to lot of data from upper layer software (applications) up to bottom hardware, and each subsystem or hardware environment that integrated circuit board adopted and the control method of data bus are had nothing in common with each other, so need the method for a swap data, realize data communication reliably between each subsystem and the integrated circuit board." a kind of do media with DPRAM realize data soft switch control of communication method " (CN 1758627A) discloses and a kind ofly realized data soft switch control of communication method by double-port RAM, its method is that two kinds of bus systems are shared double-port RAM, which bus system is the access limit that indicates double-port RAM by the Owner territory belong to, reach the purpose of exchanges data, weak point is really to realize independent full-duplex communication, the another one bus system can't be initiated data interaction when a certain bus system is carried out read-write operation to double-port RAM, and whole reciprocal process is used the bus system dominate of double-port RAM by first, all communication uses the bus system of double-port RAM to initiate by first, the another one bus system can't initiatively be initiated communication, can only make response again behind the passive received communication, the application scenario is restricted.
Summary of the invention
It is that media carries out the data full-duplex communication and can't really realize independent full-duplex communication that the present invention is intended to solve in the prior art with the double-port RAM, and the application scenario such as is restricted at technical matters.
In view of this, the invention provides a kind of duplex communication method based on double-port RAM, the storage space of described double-port RAM is divided into mutually independently first memory block and second memory block, and in two districts domain, length field, data field and verification territory is set all; Wherein said domain and described length field are positioned at head, and described data field is placed in the middle, and described verification territory follows closely after the described data field.
The invention provides a kind of duplex communication method based on double-port RAM, wherein corresponding first bus system and second bus system are distinguished in first memory block and second memory block, may further comprise the steps:
First bus system is initiated exchanges data;
First memory block of inquiry double-port RAM when its domain is not a communication control character, then changes following steps over to;
Domain in first memory block writes communication control character, writes data length in its length field, writes data at its data field;
Setting verification rule calculates the length field of first memory block and the verification code value of data field according to this rule, and it is write the verification territory of first memory block;
Send interrupt instruction to second bus system.
Further, described duplex communication method may further comprise the steps:
First bus system is initiated exchanges data;
First memory block of inquiry double-port RAM when its domain is a communication control character, is then put second bus system and is had much to do, the end data exchange.
Further, described duplex communication method also comprises:
Second bus system is accepted the exchanges data that first bus system is initiated;
First memory block of inquiry double-port RAM when its domain is a communication control character, then changes following steps over to;
Read the data length of the length field of first memory block, according to described verification rule, calculate the length field of first memory block and the verification code value of data field, and with following closely verification thresholding relatively, if equate, then change following steps over to, otherwise, put the second bus system check errors, the end data exchange;
Read the data of the data field of first memory block;
The domain of first memory block is revised as the successful character of communication.
Further, described duplex communication method also comprises:
Second bus system is accepted the exchanges data that first bus system is initiated;
First memory block of inquiry double-port RAM, when its domain is not a communication control character, then end data exchange.
Further, described duplex communication method also comprises:
Having no progeny during first bus system sends, it is instantaneous to wait for, the domain when first memory block is the successful character of communication, then end data exchange.
Further, described duplex communication method also comprises:
Having no progeny during first bus system sends, it is instantaneous to wait for, the domain when first memory block is not the successful character of communication, then puts the second bus system check errors.
Further, described duplex communication method, wherein corresponding first bus system and second bus system are distinguished in first memory block and second memory block, may further comprise the steps:
Second bus system is initiated exchanges data;
Second memory block of inquiry double-port RAM when its domain is not a communication control character, then changes following steps over to;
Domain in second memory block writes communication control character, writes data length in its length field, writes data at its data field;
Setting verification rule calculates the length field of second memory block and the verification code value of data field according to this rule, and it is write the verification territory of second memory block;
Send interrupt instruction to first bus system.
Further, described duplex communication method, wherein corresponding first bus system and second bus system are distinguished in first memory block and second memory block, may further comprise the steps:
Second bus system is initiated exchanges data;
Second memory block of inquiry double-port RAM when its domain is a communication control character, is then put first bus system and is had much to do, the end data exchange.
Further, described duplex communication method also comprises:
First bus system is accepted the exchanges data that second bus system is initiated;
Second memory block of inquiry double-port RAM when its domain is a communication control character, then changes following steps over to;
Read the data length of the length field of second memory block, according to described verification rule, calculate the length field of second memory block and the verification code value of data field, and with following closely verification thresholding relatively, if equate, then change following steps over to, otherwise, put the first bus system check errors, the end data exchange;
Read the data of the data field of second memory block;
The domain of second memory block is revised as the successful character of communication.
Further, described duplex communication method also comprises:
First bus system is accepted the exchanges data that second bus system is initiated;
Second memory block of inquiry double-port RAM, when its domain is not a communication control character, then end data exchange.
Further, described duplex communication method also comprises:
Having no progeny during second bus system sends, it is instantaneous to wait for, the domain when first memory block is the successful character of communication, then end data exchange.Otherwise put the second bus system check errors.
Further, described duplex communication method also comprises:
Having no progeny during second bus system sends, it is instantaneous to wait for, the domain when first memory block is not the successful character of communication, then puts the second bus system check errors.
Provided by the present invention is the duplex communication method of media with the double-port RAM, make two buses can share a double-port RAM, be implemented in the exchanges data between identical or different bus, communicating pair is equal, all can serve as the communication initiator, also but both sides initiate communication simultaneously, can not interfere with each other, and subsidiary check code are reliable and stable with what guarantee to communicate by letter.
Description of drawings
Figure 1 shows that the storage space structural representation of the double-port RAM that one embodiment of the invention provides;
Fig. 2 is to the process flow diagram based on the duplex communication method of above-mentioned double-port RAM that Figure 5 shows that one embodiment of the invention provides.
Embodiment
Below in conjunction with the drawings and specific embodiments photoetching method and the system that the embodiment of the invention proposes is described in further detail.
See also Fig. 1, it is depicted as the storage space structural representation of the double-port RAM that one embodiment of the invention provides.
DPRAM (double-port RAM) 100 storage spaces are divided into A memory block 110 and B memory block 120 two parts independently mutually, a bus system 210 corresponding A memory blocks 110, b bus system 220 corresponding B memory blocks 120, two bus systems all can be taken on initiator role, also can hold a concurrent post initiator and take over party simultaneously to realize the full duplex function.
A, B all is provided with domain 101, length field 102, data field 103 and verification territory 104 in two districts; Wherein domain 101 and length field 102 are positioned at head, and data field 103 is placed in the middle, and verification territory 104 follows closely after the data field 103.
Please in conjunction with referring to Fig. 2 to Fig. 5, the process flow diagram that it is depicted as that one embodiment of the invention provides based on the duplex communication method of above-mentioned double-port RAM.
With a control system is example, driver (driver) in the VME cabinet on the master control Power PC plate uses the VME bus, Firmware (firmware program) on the DSP (digital signal processor) uses internal bus, driver comprises a plurality of client process, need parallel control Firmware to go up corresponding a plurality of motion, uncorrelated mutually between each, the technical barrier of the full-duplex data switched communication between the two, this function of realization that the method that the utilization embodiment of the invention provides can be successful.A bus system in the present embodiment is the VME bus, and the b bus system is the DSP internal bus, and double-port RAM (DPRAM) is positioned on the dsp board card, is mapped on the VME bus, and the exchanges data flow process between them is as described below.
One, a bus is initiated the exchanges data flow process to the b bus, and a bus writes process data packet such as Fig. 2 when initiating exchanges data.
May further comprise the steps:
(S11) a bus system is initiated exchanges data;
(S12) the A memory block of inquiry double-port RAM judges whether its domain is communication control character, as adopting character ': ', if not, then changes following steps over to, otherwise, put the b bus system and have much to do, the end data exchange;
(S13) domain in the A memory block writes communication control character, as adopting character ': ', writes data length in its length field, writes data at its data field;
(S14) set the verification rule, calculate the length field of A memory block and the verification code value of data field according to this rule, and it is write the verification territory of A memory block;
(S15) send interrupt instruction to the b bus system, and revise the initial thresholding in A memory block after waiting for b bus system checking data, if the b bus system changes the initial thresholding in A memory block into communication successful character, as adopting character ' 0 ', the then successful end data exchange of expression communication; If the b bus system changes the initial thresholding in A memory block into error code and represents that then verification makes mistakes;
(S16) a bus system judges whether the domain of A memory block is the successful character of communication, as adopting character ' 0 ', if then end data exchanges, otherwise puts b bus system check errors.
Two, the b bus is accepted the process of exchanges data, and the reading of data packet procedures saw also Fig. 3 when the b bus was accepted exchanges data.
May further comprise the steps:
(S21) the b system accepts the exchanges data that a bus system is initiated;
(S22) the A memory block of inquiry double-port RAM judges whether its domain is communication control character, as character ": ", if, then change following steps over to, otherwise, the end data exchange;
(S23) read the data length of the length field of A memory block, the verification rule that sets according to a bus system, calculate the length field of A memory block and the verification code value of data field, and with following closely verification thresholding relatively, if equate, then change following steps over to, otherwise, put B bus system check errors, the end data exchange;
(S24) read the data of the data field of A memory block;
(S25) domain with the A memory block is revised as the successful character of communication, as character " 0 ".
Above-mentioned steps has been described the simplex process.
The full duplex communication method that embodiments of the invention provide can the b bus also can be initiated the exchanges data flow process to a bus when a bus is initiated exchange to the b bus, realize full-duplex communication.
The b bus writes process data packet when initiating exchanges data, sees also Fig. 4 and Fig. 5.
Three, the b bus is initiated the exchanges data flow process to a bus, and the b bus writes process data packet such as Fig. 4 when initiating exchanges data.
May further comprise the steps:
(S31) the b bus system is initiated exchanges data;
(S32) the B memory block of inquiry double-port RAM judges whether its domain is communication control character, as adopting character ': ', if not, then changes following steps over to, otherwise, put a bus system and have much to do, the end data exchange;
(S33) domain in the B memory block writes communication control character, as adopting character ': ', writes data length in its length field, writes data at its data field;
(S34) set the verification rule, calculate the length field of B memory block and the verification code value of data field according to this rule, and it is write the verification territory of B memory block;
(S35) send interrupt instruction to a bus system, and revise the initial thresholding in B district after waiting for a bus system checking data, if a bus system changes the initial thresholding in B district into communication successful character, as adopt character ' 0 ', the then successful end data exchange of expression communication is if a bus system changes the initial thresholding in B district into error code and represents that then verification makes mistakes;
(S36) the b bus system judges whether the domain of B memory block is the successful character of communication, as adopting character ' 0 ', if then end data exchanges, otherwise puts a bus system check errors.
Four, a bus is accepted the process of exchanges data, and the reading of data packet procedures saw also Fig. 5 when a bus was accepted exchanges data.
May further comprise the steps:
(S41) a system accepts the exchanges data that the b bus system is initiated;
(S42) the B memory block of inquiry double-port RAM judges whether its domain is communication control character, as character ": ", if, then change following steps over to, otherwise, the end data exchange;
(S43) read the data length of the length field of B memory block, the verification rule that sets according to the b bus system, calculate the length field of B memory block and the verification code value of data field, and with following closely verification thresholding relatively, if equate, then change following steps over to, otherwise, put A bus system check errors, the end data exchange;
(S44) read the data of the data field of B memory block;
(S45) domain with the B memory block is revised as the successful character of communication, as character " 0 ".
Last step has been described the full-duplex communication process, when a plurality of client process need among the parallel work-flow Firmware a plurality of, can share DPRAM by the mutex amount, send order to firmware, again to different clients return command result, executed in parallel has improved execution efficient greatly after being finished by firmware handle.Then can only be finished among " a kind of do media realize data soft switch control of communication method " (CN 1758627A) and continue to issue the order of another client after firmware returns again at a Client command with DPRAM.
In sum, what the embodiment of the invention provided is the duplex communication method of media with the double-port RAM, make two buses can share a double-port RAM, be implemented in the exchanges data between identical or different bus, communicating pair is equal, all can serve as the communication initiator, but also both sides initiate communication simultaneously, can not interfere with each other, and subsidiary check code is reliable and stable with what guarantee to communicate by letter.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; have in the technical field under any and know the knowledgeable usually; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking claims person of defining.
Claims (13)
1. duplex communication method based on double-port RAM, it is characterized in that, the storage space of described double-port RAM is divided into mutually independently first memory block and second memory block, and in two districts domain, length field, data field and verification territory is set all; Wherein said domain and described length field are positioned at head, and described data field is placed in the middle, and described verification territory follows closely after the described data field.
2. duplex communication method according to claim 1, wherein first memory block and second memory block corresponding first bus system of difference and second bus system is characterized in that, may further comprise the steps:
First bus system is initiated exchanges data;
First memory block of inquiry double-port RAM when its domain is not a communication control character, then changes following steps over to;
Domain in first memory block writes communication control character, writes data length in its length field, writes data at its data field;
Setting verification rule calculates the length field of first memory block and the verification code value of data field according to this rule, and it is write the verification territory of first memory block;
Send interrupt instruction to second bus system.
3. duplex communication method according to claim 1, wherein first memory block and second memory block corresponding first bus system of difference and second bus system is characterized in that, may further comprise the steps:
First bus system is initiated exchanges data;
First memory block of inquiry double-port RAM when its domain is a communication control character, is then put second bus system and is had much to do, the end data exchange.
4. duplex communication method according to claim 2 is characterized in that, also comprises:
Second bus system is accepted the exchanges data that first bus system is initiated;
First memory block of inquiry double-port RAM when its domain is a communication control character, then changes following steps over to;
Read the data length of the length field of first memory block, according to described verification rule, calculate the length field of first memory block and the verification code value of data field, and with following closely verification thresholding relatively, if equate, then change following steps over to, otherwise, put the second bus system check errors, the end data exchange;
Read the data of the data field of first memory block;
The domain of first memory block is revised as the successful character of communication.
5. duplex communication method according to claim 2 is characterized in that, also comprises:
Second bus system is accepted the exchanges data that first bus system is initiated;
First memory block of inquiry double-port RAM, when its domain is not a communication control character, then end data exchange.
6. duplex communication method according to claim 4 is characterized in that, also comprises:
Having no progeny during first bus system sends, it is instantaneous to wait for, the domain when first memory block is the successful character of communication, then end data exchange.
7. duplex communication method according to claim 4 is characterized in that, also comprises:
Having no progeny during first bus system sends, it is instantaneous to wait for, the domain when first memory block is not the successful character of communication, then puts the second bus system check errors.
8. duplex communication method according to claim 1, wherein first memory block and second memory block corresponding first bus system of difference and second bus system is characterized in that, may further comprise the steps:
Second bus system is initiated exchanges data;
Second memory block of inquiry double-port RAM when its domain is not a communication control character, then changes following steps over to;
Domain in second memory block writes communication control character, writes data length in its length field, writes data at its data field;
Setting verification rule calculates the length field of second memory block and the verification code value of data field according to this rule, and it is write the verification territory of second memory block;
Send interrupt instruction to first bus system.
9. duplex communication method according to claim 1, wherein first memory block and second memory block corresponding first bus system of difference and second bus system is characterized in that, may further comprise the steps:
Second bus system is initiated exchanges data;
Second memory block of inquiry double-port RAM when its domain is a communication control character, is then put first bus system and is had much to do, the end data exchange.
10. duplex communication method according to claim 8 is characterized in that, also comprises:
First bus system is accepted the exchanges data that second bus system is initiated;
Second memory block of inquiry double-port RAM when its domain is a communication control character, then changes following steps over to;
Read the data length of the length field of second memory block, according to described verification rule, calculate the length field of second memory block and the verification code value of data field, and with following closely verification thresholding relatively, if equate, then change following steps over to, otherwise, put the first bus system check errors, the end data exchange;
Read the data of the data field of second memory block;
The domain of second memory block is revised as the successful character of communication.
11. duplex communication method according to claim 8 is characterized in that, also comprises:
First bus system is accepted the exchanges data that second bus system is initiated;
Second memory block of inquiry double-port RAM, when its domain is not a communication control character, then end data exchange.
12. duplex communication method according to claim 10 is characterized in that, also comprises:
Having no progeny during second bus system sends, it is instantaneous to wait for, the domain when first memory block is the successful character of communication, then end data exchange.Otherwise put the second bus system check errors.
13. duplex communication method according to claim 10 is characterized in that, also comprises:
Having no progeny during second bus system sends, it is instantaneous to wait for, the domain when first memory block is not the successful character of communication, then puts the second bus system check errors.
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| CNA2009100490442A CN101593165A (en) | 2009-04-09 | 2009-04-09 | Duplex communication method based on double-port RAM |
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| CNA2009100490442A CN101593165A (en) | 2009-04-09 | 2009-04-09 | Duplex communication method based on double-port RAM |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102118311A (en) * | 2011-01-21 | 2011-07-06 | 宁波市胜源技术转移有限公司 | Data transmission method |
| CN103761054A (en) * | 2014-01-06 | 2014-04-30 | 丑武胜 | Double-DPRAM data communication system |
| CN108011704A (en) * | 2016-11-01 | 2018-05-08 | 中芯国际集成电路制造(上海)有限公司 | Half-duplex communications device and its communication means, the device of half-duplex operation |
-
2009
- 2009-04-09 CN CNA2009100490442A patent/CN101593165A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102118311A (en) * | 2011-01-21 | 2011-07-06 | 宁波市胜源技术转移有限公司 | Data transmission method |
| CN103761054A (en) * | 2014-01-06 | 2014-04-30 | 丑武胜 | Double-DPRAM data communication system |
| CN108011704A (en) * | 2016-11-01 | 2018-05-08 | 中芯国际集成电路制造(上海)有限公司 | Half-duplex communications device and its communication means, the device of half-duplex operation |
| CN108011704B (en) * | 2016-11-01 | 2020-10-09 | 中芯国际集成电路制造(上海)有限公司 | Half-duplex communication device, communication method thereof and half-duplex communication device |
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