CN101572060A - Liquid crystal display panel drive circuit and drive method thereof - Google Patents
Liquid crystal display panel drive circuit and drive method thereof Download PDFInfo
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Abstract
The invention relates to a liquid crystal display panel drive circuit which comprises a plurality of scanning beams which are parallel to each other, a plurality of data wires which are insulated and intersected with the scanning beams, a scanning drive circuit, a data drive circuit, a temperature detector and a time schedule controller, wherein the scanning drive circuit is used for driving the scanning beams; the data drive circuit is used for driving the data wires; the temperature detector is used for detecting the current environmental temperature; and the time schedule controller receives an externally transmitted display data signal, and regulates a plurality of binary signals output to the data drive circuit according to current different environmental temperature by a frame rate control algorithm, thereby regulating a great deal of gray scale voltage output by the data drive circuit. The picture display of the liquid crystal display panel drive circuit is relatively accurate. The invention also provides a method for driving the liquid crystal display panel drive circuit.
Description
Technical field
The invention relates to a kind of liquid crystal display panel drive circuit and driving method thereof.
Background technology
Because advantages such as the display panels tool is light, thin, power consumption is little are widely used in modernized information equipments such as TV, mobile phone, personal digital assistant.Along with lcd technology is more and more ripe, people are also more and more higher to the requirement of the color display capabilities of display panels.
The color display capabilities of display panels is that the figure place of the GTG that can show with liquid crystal panel on each color channel is described.Can show 26 powers on each color channel, just the display panels of 64 kinds of GTGs is called the 6bit display panels.And display panels has three color channels of RGB (RGB), then can show 262144 kinds of colors (64 * 64 * 64=262144).By that analogy, the 8bit display panels shows 28 powers, and promptly 256 kinds of GTGs show that 16777216 (16.7M) plant color.From here we as can be seen, the 6bit panel number of colours that can show is less than 2% of 8bit panel in theory.
Understand from the physical arrangement of display panels, 6bit display panels just liquid crystal molecule has only 64 kinds of GTGs from black in display frame to pure white, so be easy to control, therefore now most of response time is that 12 milliseconds, 8 milliseconds display panels generally adopts the 6bit display panels.
And in actual use, the color of 6bit and 8bit display panels looks does not have too big difference.This mainly has been to use frame rate control, and (purpose is to make the 6bit display panels utilize the frame rate control algolithm can show the 16.7M color of 8bit display panels for Frame Rate Control, FRC) algorithm.
See also Fig. 1, it is the principle schematic of frame rate control algolithm.Each little rectangle is represented a pixel among the figure, and per four pixels constitute a unit.When four pixels of a unit all showed GTG n (0≤n≤63), the GTG of this unit was n, and when four pixels of a unit all showed GTG n+1, the GTG of this unit was n+1.As shown in Figure 1, the frame rate control algolithm has realized having inserted n+1/4 between GTG n and n+1, these 3 GTGs of n+2/4 and n+3/4.Because the liquid crystal molecule of 6bit display panels itself can be realized 64 kinds of GTGs, therefore after inserting 3 GTGs between every adjacent 2 kinds of GTGs of 64 kinds of GTGs, the 6bit display panels can show 0,1,2,3, and 4...... is up to 252 GTGs.
See also Fig. 2, it is a kind of circuit diagram of prior art liquid crystal display panel drive circuit.This liquid crystal display panel drive circuit 10 comprises many sweep traces that are parallel to each other 101, many and these sweep trace 101 vertically insulated crossing data lines 102, scan driving circuit 11, a data drive circuit 12 and time schedule controller 13.This scan drive circuit 11 is used to drive these sweep traces 101.This data drive circuit 12 is used to drive these data lines 102.
This sweep trace 101 is a pixel 103 with the Minimum Area that this data line 102 surrounds.This pixel 103 comprises a thin film transistor (TFT) 104, a pixel electrode 105 and a public electrode 106.The grid of this thin film transistor (TFT) 104 (not label) is connected to this sweep trace 104, and source electrode (not label) is connected to this data line 102, and drain electrode (not label) is connected to this pixel electrode 105.This pixel electrode 105, this public electrode 106 and therebetween liquid crystal molecule constitute a liquid crystal capacitance (not label).
The a plurality of display data signal of one external circuit (figure does not show) transmission are to this time schedule controller 13, this display data signal is one 8 binary signals, the above-mentioned 64 kinds of GTGs of high 6 bit representations of these 8 binary signals, 3 kinds of GTGs that insert between adjacent 2 kinds of GTGs in low these 64 kinds of GTGs of 2 bit representations.This time schedule controller 13 utilizes frame rate control algolithm shown in Figure 1 to export a plurality of 6 binary signals to this data drive circuit 12 according to 8 binary signals correspondences of its reception.
This data drive circuit 12 is used for a plurality of 6 binary signals of its reception are converted to a plurality of simulating signals, also according to a plurality of gray scale voltages of these simulating signal corresponding selection, and export this pixel electrode 105 to via these data lines 102, to control the pixel voltage at these liquid crystal capacitance two ends, thereby control the penetrance of this pixel 103, and then show corresponding GTG.
Usually, between the GTG n that 8 binary signals of external circuit transmission are represented and the penetrance of pixel, there is nonlinear corresponding relation, i.e. gamma (Gamma) curve.See also Fig. 3, it is the gamma curve synoptic diagram under the predetermined temperature, and wherein, transverse axis V represents the represented GTG n of 8 binary signals of external circuit transmission, represents the penetrance of this pixel from axle T.Generally, show image more accurately in order to make this liquid crystal display panel drive circuit 10, can be according to 64 kinds of gray scale voltages of the above-mentioned 64 kinds of GTGs of the pre-set realization of gamma curve shown in Figure 3.
Because three GTGs that insert between every adjacent 2 kinds of GTGs of 64 kinds of GTGs are realized by these 64 kinds of gray scale voltages that also after therefore 64 kinds of gray scale voltages were set, 253 kinds of GTGs of this display panels were definite.
Yet, the penetrance of pixel can change along with the variation of environment temperature, therefore under the different environment temperatures, GTG n is different with nonlinear relationship between the penetrance, it is the gamma curve difference, this moment, this liquid crystal display panel drive circuit 10 still drove according to fixed 253 kinds of GTGs, and then there is inaccurate problem in the demonstration of the picture of this liquid crystal display panel drive circuit 10.
Summary of the invention
For the picture that solves the prior art liquid crystal display panel drive circuit shows inaccurate problem, be necessary to provide a kind of picture to show liquid crystal display panel drive circuit more accurately.
Also be necessary to provide a kind of driving method of above-mentioned liquid crystal display panel drive circuit.
A kind of liquid crystal display panel drive circuit, it comprises many sweep traces that are parallel to each other, many data line, scan driving circuit, a data drive circuit, a temperature detecting device and time schedule controllers that intersect with this sweep trace insulation.This scan drive circuit is used to drive these sweep traces.This data drive circuit is used to drive these data lines.This temperature detecting device is used to detect current environmental temperature.This time schedule controller receives the display data signal of external transmission, and utilize the frame rate control algolithm, export a plurality of binary signals of this data drive circuit to according to different current environmental temperature adjustment, thereby adjust a plurality of gray scale voltages of this data drive circuit output.
The driving method of above-mentioned liquid crystal display panel drive circuit, it comprises the steps: that a. one external circuit transmitting and displaying data-signal is to this time schedule controller; B. this temperature detecting device is detected current environmental temperature; C. this time schedule controller utilizes the frame rate control algolithm, and exports a plurality of binary signals of this data drive circuit to according to different current environmental temperature adjustment; D. this data drive circuit is exported a plurality of gray scale voltages according to these binary signals.
Compared to prior art, under this liquid crystal display panel drive circuit and driving method thereof the situation that externally display data signal of circuit transmission is identical, export a plurality of binary signals of this data drive circuit to according to different environment temperature adjustment, thereby adjust a plurality of gray scale voltages of this data drive circuit output, thereby make pixel under different temperatures, realize essentially identical penetrance, so the demonstration of the picture of this liquid crystal display panel drive circuit is more accurate.
Description of drawings
Fig. 1 is the principle schematic of frame rate control algolithm.
Fig. 2 is a kind of circuit diagram of prior art liquid crystal display panel drive circuit.
Fig. 3 is the gamma curve synoptic diagram under the predetermined temperature.
Fig. 4 is the circuit diagram of liquid crystal display panel drive circuit first embodiment of the present invention.
Fig. 5 is the principle schematic of the frame rate control algolithm of liquid crystal display panel drive circuit shown in Figure 4.
Fig. 6 is the synoptic diagram of the question blank of liquid crystal display panel drive circuit shown in Figure 4.
Fig. 7 is the synoptic diagram of the question blank of liquid crystal display panel drive circuit second embodiment of the present invention.
Embodiment
See also Fig. 4, it is the circuit diagram of liquid crystal display panel drive circuit first embodiment of the present invention.This liquid crystal display panel drive circuit 20 comprises many sweep traces that are parallel to each other 201, many and these sweep trace 201 vertically insulated crossing data lines 202, scan driving circuit 21, a data drive circuit 22, a temperature detecting device 23, an analog/digital converter 24, a question blank 26 and time schedule controller 27.This scan drive circuit 21 is used to drive these sweep traces 201.This data drive circuit 22 is used to drive these data lines 202.This temperature detecting device 23 is used to detect current environmental temperature.This analog/digital converter 24 is used for the current environmental temperature of this temperature detecting device 23 detectings is converted to digital signal.
This sweep trace 201 is a pixel 203 with the Minimum Area that this data line 202 surrounds.This pixel 203 comprises a thin film transistor (TFT) 204, a pixel electrode 205 and a public electrode 206.The grid of this thin film transistor (TFT) 204 (not indicating) is connected to this sweep trace 201, and source electrode (not indicating) is connected to this data line 202, and drain electrode (not indicating) is connected to this pixel electrode 205.This pixel electrode 205, this public electrode 206 and therebetween liquid crystal molecule constitute a liquid crystal capacitance.This liquid crystal display panel drive circuit 20 is 6bit liquid crystal display panel drive circuits.
See also Fig. 5, it is the principle schematic of the frame rate control algolithm of this liquid crystal display panel drive circuit 20.Each little rectangle is represented a pixel 203 among the figure, and per 16 pixels 203 constitute a unit.When 16 pixels of a unit all showed GTG n, the GTG of this unit was n, and when 16 pixels of a unit all showed GTG n+1, the GTG of this unit was n+1.When 0≤n≤62, as shown in Figure 5, it is n that nine unit are from left to right represented GTG respectively, n+1/8, n+2/8, n+3/8, n+4/8, n+5/8, n+6/8, n+7/8, n+1.Because this liquid crystal display panel drive circuit 20 is 6bit driving circuits, so when n=63, first left GTG n is as shown in Figure 5 only arranged, no GTG n+1 does not have seven GTGs between GTG n and the n+1 yet.
This time schedule controller 27 comprise 8 frame rate control module mi (i=0,1,2 ... 7).These eight frame rate control module m0 to m7 are respectively applied for a plurality of 6 binary signals of output to this data drive circuit 22.When 0≤n≤62, these frame rate control modules m0 to m7 exports respectively and is used to realize GTG n, n+1/8, n+2/8, n+3/8, n+4/8, n+5/8, a plurality of 6 binary signals that n+6/8 and n+7/8 show.When n=63, only this frame rate control module m0 output is used to realize a plurality of 6 binary signals of GTG 63 demonstrations.
One external circuit (figure does not show) transmits a plurality of display data signal, and this display data signal is one 8 binary signals, and these 8 binary signals are from 00000000 to 11111111, can corresponding expression the 0th to the 256th GTG.These 8 binary signals transfer to this eight frame rate control module mi and this question blank simultaneously, and high 6 of these 8 binary signals is 000000 to 111111, are used for determining GTG n, and low 2 binary signals are respectively 00,01,10,11.
See also Fig. 6, it is the synoptic diagram of this question blank 26.The 1st row of this question blank 26 is used to store high 6 binary signals of two kinds of different range, the 2nd row is used to store the digital signal T1 of a plurality of expressions ambient temperature value commonly used, T2, T3......Tk (k＞1, k is an integer), the 3rd row is used to store above-mentioned 4 kinds low 2 binary signals, 00,01,10,11, the 4 row (figure does not show) and is used to store 8 kinds of control signal c0, c1,4 kinds of control signals among the c2......c7.These 8 kinds of control signal c0 to c7 to should eight frame rate control modules, be used to control this eight frame rate control modules work respectively.
As shown in Figure 6, when high 6 binary signals 000000 between 111110 when (i.e. 0≤n≤62), the digital signal T1 of the corresponding a plurality of expressions of these high 6 binary signals ambient temperature value commonly used, T2, T3......Tk, corresponding 4 kinds low 2 binary signals of each digital signal, these 4 kinds low respectively corresponding 4 kinds of control signals of 2 binary signals, these 4 kinds of control signals can be selected from above-mentioned 8 kinds of control signals as required, thereby select the work of 4 frame rate control modules, from GTG n, n+1/8, n+2/8, n+3/8, n+4/8, n+5/8 selects 4 kinds of GTGs and shows among n+6/8 and the n+7/8.For example, when high 6 binary signals 000000 between 111110 the time, 4 kinds low 2 binary signals of digital signal T1 correspondence are corresponding control signal c0 respectively, c1, c2 and c3; 4 kinds low 2 binary signals of digital signal T2 correspondence are corresponding control signal c1 respectively, c2, c3 and c4; 4 kinds low 2 binary signals of digital signal T3 correspondence are corresponding control signal c2, c3, c4 and c5 respectively.4 kinds of control signal differences of different ambient temperature value correspondences commonly used, therefore different 4 in running order frame rate control module differences of using the ambient temperature value correspondences always, promptly different 6 binary signal differences using the ambient temperature value correspondences always, the gray scale voltage of this data drive circuit output is also different under the different ambient temperature value situations commonly used.
When high 6 binary signals are 111111 (they being n=63), the only corresponding control signal c0 of these high 6 binary signals, and this control signal c0 is used to control this frame rate control module m0 work, thereby shows 63 GTGs should frame rate control module m0.
This data drive circuit 22 is used to receive a plurality of 6 binary signals of these frame rate control modules mi output, and these 6 binary signals are converted to a plurality of simulating signals, also according to these simulating signal corresponding selection gray scale voltages, and export this pixel electrode 205 to via each bar data line 202, to control the pixel voltage at these liquid crystal capacitance two ends, thereby control the penetrance of this liquid crystal capacitance, and then show corresponding GTG.
The driving method of this liquid crystal display panel drive circuit 20 comprises the steps:
A. an external circuit transmits a plurality of 8 binary signals, and these 8 binary signals transfer to this eight frame rate control modules and this question blank 26 simultaneously, and high 6 binary signals of these 8 binary signals are represented GTG n;
B. this temperature detecting device 23 is detected current environmental temperature, and transfers to this analog/digital converter 24, and this analog/digital converter 24 should current environment temperature be converted to digital signal, and transferred to this question blank 26;
C. according to high 6 binary signals, represent the digital signal of current environmental temperature and low 2 binary signals from this question blank 26, to find out a control signal ci, this control signal ci transfers to the frame rate control module mi corresponding with it;
D. when high 6 binary signals 000000 between 111110 the time, this frame rate control module mi is according to high 6 binary signals and this control signal ci of its reception, and output is used to realize that a plurality of 6 binary signals of GTG n+i/8 are to this data drive circuit 22; When high 6 binary signals were 111111, this frame rate control module m0 was according to high 6 binary signals 111111 and the control signal c0 of its reception, and output is used to realize that a plurality of 6 binary signals of GTG 63 are to this data drive circuit 22;
E. this data drive circuit 22 is used to receive a plurality of 6 binary signals of this frame rate control module mi output, and these 6 binary signals are converted to a plurality of simulating signals, also according to these simulating signal corresponding selection gray scale voltages, and export this pixel electrode 205 to via each bar data line 202, to control the pixel voltage at these liquid crystal capacitance two ends, thereby control the penetrance of this pixel 203, and then show corresponding GTG.
Compared to prior art, under this liquid crystal display panel drive circuit 20 situation that externally 8 binary signals of circuit transmission are identical, select different control signals according to different environment temperatures, this difference control signal can be controlled different frame rate control module work, thereby make pixel under different temperatures, realize essentially identical penetrance, so the demonstration of the picture of this liquid crystal display panel drive circuit 20 is more accurate.
See also Fig. 7, it is the synoptic diagram of the question blank of liquid crystal display panel drive circuit second embodiment of the present invention.The difference of the liquid crystal display panel drive circuit 20 of this liquid crystal display panel drive circuit and first embodiment is: the 1st row of the question blank 36 of this liquid crystal display panel drive circuit is used to store high 6 binary signals of three kinds of different range.
As shown in Figure 7, when high 6 binary signals 000000 between 111101 the time, the digital signal T1 of the temperature range that the corresponding a plurality of expressions of these high 6 binary signals are different, T2, T3......Tk, corresponding 4 kinds low 2 binary signals of each digital signal, and the corresponding control signal of each low 2 binary signal.Respectively corresponding eight the frame rate control modules of these 8 kinds of control signal c0 to c7 are used to control this eight frame rate control modules work.
When high 6 binary signals are 111110, the control signal of corresponding 4 kinds of low 2 binary signals 00,01,10,11 is respectively c0, c1, c2, c3, this control signal c0, c1, c2, c3 control this frame rate control module m0, m1, m2, m3 work respectively, realize the demonstration of GTG 62,62+1/8,62+2/8,62+3/8.
When high 6 binary signals are 111111, the control signal of corresponding 4 kinds of low 2 binary signals 00,01,10,11 is respectively c4, c5, c6, c7, this control signal c4, c5, c6, c7 control this frame rate control module m4, m5, m6, m7 work respectively, realize the demonstration of GTG 62+4/8,62+5/8,62+6/8,62+7/8.
The driving method of the driving method of this liquid crystal display panel drive circuit and the first embodiment liquid crystal display panel drive circuit 20 is roughly the same, its difference is: steps d. when high 6 binary signals 000000 between 111101 the time, this frame rate control module mi is according to high 6 binary signals and this control signal ci of its reception, and output is used to realize that a plurality of 6 binary signals of GTG n+i/8 are to data drive circuit; When high 6 binary signals are 111110, this frame rate control module m0, m1, m2, m3 are according to high six binary signals 111110 of its reception and control signal c0, c1, c2, c3, and output is used to realize that a plurality of 6 binary signals of GTG 62,62+1/8,62+2/8,62+3/8 are to this data drive circuit; When high 6 binary signals are 111111, this frame rate control module m4, m5, m6, m7 receive control signal c4, c5, c6, c7 according to it, and output is used to realize that a plurality of 6 binary signals of GTG 62+4/8,62+5/8,62+6/8,62+7/8 are to this data drive circuit.
Liquid crystal display panel drive circuit 20 compared to first embodiment, this liquid crystal display panel drive circuit can be 4 GTGs of corresponding demonstration in 11111100 to 11111111 o'clock at these 8 binary signals, and the liquid crystal display panel drive circuit 20 of first embodiment is only to show 63 GTGs at 11111100 to 11111111 o'clock at these 8 binary signals, therefore this liquid crystal display panel drive circuit can be realized 256 kinds of GTGs than the demonstration of 3 GTGs of the first embodiment liquid crystal display panel drive circuit more than 20 realizations.
It is described that liquid crystal display panel drive circuit of the present invention is not limited to above embodiment, as: first row of the question blank 26 of first embodiment also can not stored the digital signal T1 of a plurality of expressions ambient temperature value commonly used, T2, T3......Tk, but store the digital signal of a plurality of expression different temperatures scopes; The question blank 26 of first embodiment also can be arranged in this time schedule controller 27; The corresponding relation of these high 6 binary signals 111110,111111 and control signal also can change as required in the question blank 36 of the 3rd embodiment, makes between these 8 binary signals in 11111000 to 11111111 correspondingly to show 8 GTGs.
Claims (10)
1. liquid crystal display panel drive circuit, it comprises many sweep traces that are parallel to each other, many data line, scan driving circuit, a data drive circuit and the time schedule controllers that intersect with this sweep trace insulation, and this scan drive circuit is used to drive these sweep traces; This data drive circuit is used to drive these data lines, it is characterized in that: this liquid crystal display panel drive circuit further comprises a temperature detecting device, this temperature detecting device detecting current environmental temperature, this time schedule controller receives the display data signal of external transmission, and utilize the frame rate control algolithm, adjustment exports a plurality of binary signals of this data drive circuit to according to current environmental temperature, thereby adjusts a plurality of gray scale voltages of this data drive circuit output.
2. liquid crystal display panel drive circuit as claimed in claim 1 is characterized in that: this display data signal is 8 binary signals, and a plurality of binary signals that this time schedule controller exports this data drive circuit to are 6 binary signals.
3. liquid crystal display panel drive circuit as claimed in claim 2 is characterized in that: these 8 binary signals are from 00000000 to 11111111, can corresponding expression the 0th to the 256th GTG.
4. liquid crystal display panel drive circuit as claimed in claim 3, it is characterized in that: this time schedule controller comprises 8 frame rate control module mi, i=0,1,2, ... 7, these eight frame rate control module m0 to m7 are respectively applied for a plurality of 6 binary signals of output to this data drive circuit, and high 6 of 8 binary signals is 000000 to 111111, be used for determining GTG n, 0≤n≤63, when 0≤n≤62, these frame rate control modules m0 to m7 exports respectively and is used to realize GTG n, n+1/8, n+2/8, n+3/8, n+4/8, n+5/8, a plurality of 6 binary signals that n+6/8 and n+7/8 show, when n=63, only this frame rate control module m0 output is used to realize a plurality of 6 binary signals of GTG 63 demonstrations.
5. liquid crystal display panel drive circuit as claimed in claim 4 is characterized in that: this liquid crystal display panel drive circuit further comprises an analog/digital converter, is used for the current environmental temperature of this temperature detecting device detecting is converted to digital signal.
6. liquid crystal display panel drive circuit as claimed in claim 5, it is characterized in that: this liquid crystal display panel drive circuit further comprises a question blank, the 1st row of this question blank is used to store high 6 binary signals of two kinds of different range, the 2nd row is used to store the digital signal T1 of a plurality of expressions ambient temperature value commonly used, T2, T3......Tk, k＞1, k is an integer, the 3rd row is used to store above-mentioned 4 kinds low 2 binary signals 00,01,10,11, the 4th row is used to store 8 kinds of control signal c0, c1,4 kinds of control signals among the c2......c7, these 8 kinds of control signal c0 to c7 are respectively to should eight frame rate control modules, be used to control this eight frame rate control modules work, when high 6 binary signals 000000 between 111110 the time, the digital signal T1 of the corresponding a plurality of expressions of these high 6 binary signals ambient temperature value commonly used, T2, T3......Tk, corresponding 4 kinds low 2 binary signals of each digital signal, these 4 kinds low respectively corresponding 4 kinds of control signals of 2 binary signals, when high 6 binary signals are 111111, the only corresponding control signal c0 of these high 6 binary signals, this control signal c0 is to should frame rate control module m0, be used to control this frame rate control module m0 work, show 63 GTGs.
7. liquid crystal display panel drive circuit as claimed in claim 5, it is characterized in that: this liquid crystal display panel drive circuit further comprises a question blank, the 1st row of this question blank is used to store high 6 binary signals of three kinds of different range, the 2nd row is used to store the digital signal T1 of a plurality of expressions ambient temperature value commonly used, T2, T3......Tk, k＞1, k is an integer, the 3rd row is used to store above-mentioned 4 kinds low 2 binary signals 00,01,10,11, the 4th row is used to store 8 kinds of control signal c0, c1,4 kinds of control signals among the c2......c7, these 8 kinds of control signal c0 to c7 are respectively to should eight frame rate control modules, be used to control this eight frame rate control modules work, when high 6 binary signals 000000 between 111101 the time, the digital signal T1 of the corresponding a plurality of expressions of these high 6 binary signals ambient temperature value commonly used, T2, T3......Tk, corresponding 4 kinds low 2 binary signals of each digital signal, and the corresponding control signal of each low 2 binary signal, when high 6 binary signals are 111110, corresponding 4 kinds low 2 binary signals 00,01,10,11 control signal is respectively c0, c 1, c2, c3, this control signal c0, c1, c2, c3 controls this frame rate control module m0 respectively, m1, m2, m3 work, when high 6 binary signals are 111111, corresponding 4 kinds low 2 binary signals 00,01,10,11 control signal is respectively c4, c 5, c6, c7, this control signal c4, c5, c6, c7 controls this frame rate control module m4 respectively, m5, m6, m7 work.
8. the driving method of a liquid crystal display panel drive circuit as claimed in claim 1, it comprises the steps: that a. one external circuit transmitting and displaying data-signal is to this time schedule controller; B. this temperature detecting device is detected current environmental temperature; C. this time schedule controller utilizes the frame rate control algolithm, and adjustment exports a plurality of binary signals of this data drive circuit to according to current environmental temperature; D. this data drive circuit is exported a plurality of gray scale voltages according to these binary signals.
9. the driving method of liquid crystal display panel drive circuit as claimed in claim 8, it is characterized in that: this time schedule controller comprises 8 frame rate control module mi, i=0,1,2, ... 7, these eight frame rate control module m0 to m7 are respectively applied for a plurality of 6 binary signals of output to this data drive circuit, this liquid crystal display panel drive circuit further comprises a question blank, the 1st row of this question blank is used to store high 6 binary signals of two kinds of different range, the 2nd row is used to store the digital signal T1 of a plurality of expressions ambient temperature value commonly used, T2, T3......Tk, k＞1, k is an integer, the 3rd row is used to store above-mentioned 4 kinds low 2 binary signals 00,01,10,11, the 4th row is used to store 8 kinds of control signal c0, c1,4 kinds of control signals among the c2......c7, the step a of the driving method of this liquid crystal display panel drive circuit is specific as follows: an external circuit transmits a plurality of 8 binary signals, these 8 binary signals transfer to this eight frame rate control modules and this question blank simultaneously, and high 6 binary signals of these 8 binary signals are represented GTG n; This temperature detecting device further will be detected result transmission to this question blank among the step b; Step c specifically comprises the steps: to find out a control signal ci according to high 6 binary signals, detecting result and low 2 binary signals from this question blank, and this control signal ci is transferred to the frame rate control module mi corresponding with it; When high 6 binary signals 000000 between 111110 the time, this frame rate control module mi is according to high 6 binary signals and this control signal ci of its reception, and output is used to realize that a plurality of 6 binary signals of GTG n+i/8 are to this data drive circuit; When high 6 binary signals were 111111, this frame rate control module m0 was according to high 6 binary signals 111111 and the control signal c0 of its reception, and output is used to realize that a plurality of 6 binary signals of GTG 63 are to this data drive circuit.
10. the driving method of liquid crystal display panel drive circuit as claimed in claim 8, it is characterized in that: this time schedule controller comprises 8 frame rate control module mi, i=0,1,2, ... 7, these eight frame rate control module m0 to m7 are respectively applied for a plurality of 6 binary signals of output to this data drive circuit, this liquid crystal display panel drive circuit further comprises a question blank, the 1st row of this question blank is used to store high 6 binary signals of three kinds of different range, the 2nd row is used to store the digital signal T1 of a plurality of expressions ambient temperature value commonly used, T2, T3......Tk, k＞1, k is an integer, the 3rd row is used to store above-mentioned 4 kinds low 2 binary signals 00,01,10,11, the 4th row is used to store 8 kinds of control signal c0, c1,4 kinds of control signals among the c2......c7, the step a of the driving method of this liquid crystal display panel drive circuit is specific as follows: an external circuit transmits a plurality of 8 binary signals, these 8 binary signals transfer to this eight frame rate control modules and this question blank simultaneously, and high 6 binary signals of these 8 binary signals are represented GTG n; This temperature detecting device further will be detected result transmission to this question blank among the step b; Step c specifically comprises the steps: to find out a control signal ci according to high 6 binary signals, detecting result and low 2 binary signals from this question blank, and this control signal ci transfers to the frame rate control module mi corresponding with it; When high 6 binary signals 000000 between 111101 the time, this frame rate control module mi is according to high 6 binary signals and this control signal ci of its reception, and output is used to realize that a plurality of 6 binary signals of GTG n+i/8 are to this data drive circuit; When high 6 binary signals are 111110, this frame rate control module m0, m1, m2, m3 are according to high six binary signals 111110 of its reception and control signal c0, c1, c2, c3, and output is used to realize that a plurality of 6 binary signals of GTG 62,62+1/8,62+2/8,62+3/8 are to this data drive circuit; When high 6 binary signals are 111111, this frame rate control module m4, m5, m6, m7 receive control signal c4, c5, c6, c7 according to it, and output is used to realize that a plurality of 6 binary signals of GTG 62+4/8,62+5/8,62+6/8,62+7/8 are to this data drive circuit.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102184701A (en) * | 2010-12-30 | 2011-09-14 | 友达光电股份有限公司 | Control circuit device of display panel and control method thereof |
| CN107680549A (en) * | 2017-10-25 | 2018-02-09 | 昆山龙腾光电有限公司 | Frame rate control method |
| TWI633476B (en) * | 2017-12-25 | 2018-08-21 | 英屬開曼群島商敦泰電子有限公司 | Touch display device and control method thereof |
| CN110021268A (en) * | 2019-04-16 | 2019-07-16 | 京东方科技集团股份有限公司 | The display control method and device of OLED |
| WO2020220447A1 (en) * | 2019-04-30 | 2020-11-05 | 深圳市华星光电技术有限公司 | Display panel drive system and display panel drive method |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3361705B2 (en) * | 1996-11-15 | 2003-01-07 | 株式会社日立製作所 | Liquid crystal controller and liquid crystal display |
| JP2004133159A (en) * | 2002-10-10 | 2004-04-30 | Sanyo Electric Co Ltd | Liquid crystal panel driving device |
| JP4390483B2 (en) * | 2003-06-19 | 2009-12-24 | シャープ株式会社 | Liquid crystal halftone display method and liquid crystal display device using the method |
| KR100997978B1 (en) * | 2004-02-25 | 2010-12-02 | 삼성전자주식회사 | Liquid crystal display |
-
2008
- 2008-04-28 CN CN2008100666924A patent/CN101572060B/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102184701A (en) * | 2010-12-30 | 2011-09-14 | 友达光电股份有限公司 | Control circuit device of display panel and control method thereof |
| CN107680549A (en) * | 2017-10-25 | 2018-02-09 | 昆山龙腾光电有限公司 | Frame rate control method |
| TWI633476B (en) * | 2017-12-25 | 2018-08-21 | 英屬開曼群島商敦泰電子有限公司 | Touch display device and control method thereof |
| CN110021268A (en) * | 2019-04-16 | 2019-07-16 | 京东方科技集团股份有限公司 | The display control method and device of OLED |
| CN110021268B (en) * | 2019-04-16 | 2020-12-11 | 京东方科技集团股份有限公司 | Display control method and device of OLED |
| WO2020220447A1 (en) * | 2019-04-30 | 2020-11-05 | 深圳市华星光电技术有限公司 | Display panel drive system and display panel drive method |
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