CN101547157B - Method, device and system for detecting overload - Google Patents

Method, device and system for detecting overload Download PDF

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Publication number
CN101547157B
CN101547157B CN2009101373056A CN200910137305A CN101547157B CN 101547157 B CN101547157 B CN 101547157B CN 2009101373056 A CN2009101373056 A CN 2009101373056A CN 200910137305 A CN200910137305 A CN 200910137305A CN 101547157 B CN101547157 B CN 101547157B
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processor
heartbeat message
response
heartbeat
distribution center
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CN101547157A (en
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王洪雷
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Chengdu Huawei Technology Co Ltd
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Huawei Symantec Technologies Co Ltd
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Abstract

An embodiment of the invention discloses a method, a device and a system for detecting overload. The method disclosed by the embodiment of the invention comprises the following steps: transmitting a heartbeat message; when the response which is returned by a processor according to the heartbeat message is obtained in a preset time, obtaining the load information of processor according to the response; and determining whether overload is generated in the processor according to the load information. Through the embodiment of the invention, whether overload is generated in the processor can be inquired real time. The timeliness of detection is increased thereby reducing the potential safety hazard of device.

Description

Overload detection method, device and system
Technical Field
The present invention relates to the field of electronic communications technologies, and in particular, to a method, an apparatus, and a system for overload detection.
Background
Overload detection of a processor in a device is required for device reliability considerations. When the processor is overloaded, a part of the message is transferred to other processing units for processing.
The existing overload detection for the processor includes two ways, which are described below.
The first mode is as follows: the processor periodically sends an overload detection request to the distribution center, and the distribution center carries out overload detection.
The second way is: the distribution center detects the back pressure signal at regular time, and learns that the processor is overloaded when finding the back pressure of the uplink or downlink channel.
During the research process, the inventor finds that the overload detection of the two modes at least has the following disadvantages: the distribution center easily misses the overload detection opportunity, so that the equipment has potential safety hazards. Specifically, in the first mode, when the downstream channel generates back pressure, the overload detection request sent by the processor cannot reach the distribution center, so that the distribution center misses the opportunity of overload detection. In the second mode, when the processor is overloaded and the back pressure of the upstream or downstream channel is not generated, the distribution center cannot know that the processor is overloaded, so that the overload detection opportunity is missed.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method, an apparatus, and a system for overload detection to reduce the potential safety hazard of a device.
A method of overload detection, the method comprising:
sending a heartbeat message;
when a response returned by the processor according to the heartbeat message is obtained within a preset time, acquiring load information of the processor according to the response;
and judging whether the processor is overloaded or not according to the load information.
An overload detection apparatus, the apparatus comprising:
a sending unit, configured to send a heartbeat message;
the acquisition unit is used for acquiring the load information of the processor according to the response when the response returned by the processor according to the heartbeat message is obtained within the preset time;
and the first judgment unit is used for judging whether the processor is overloaded or not according to the load information.
An overload detection system, the system comprising:
a distribution center, a processor;
the distribution center is used for sending heartbeat messages;
the processor receives the heartbeat message and responds according to the heartbeat message;
and when the distribution center obtains a response returned by the processor according to the heartbeat message within a preset time, acquiring the load information of the processor according to the response, and judging whether the processor is overloaded or not according to the load information.
According to the embodiment of the invention, the heartbeat message is sent to the processor, when the response returned by the processor according to the heartbeat message is obtained within the preset time, whether the processor is overloaded or not is judged according to the load information in the response, whether the processor is overloaded or not can be judged in real time, the timeliness of judgment is improved, and therefore, the potential safety hazard of equipment is reduced.
Drawings
FIG. 1 is a flow chart of a method according to an embodiment of the present invention;
FIG. 2 is a flowchart of a second method of the present invention;
FIG. 3 is a schematic structural diagram of an embodiment of the apparatus of the present invention;
FIG. 4 is a schematic structural diagram of an embodiment of the system of the present invention;
FIG. 5 is a schematic structural diagram of another system embodiment of the present invention.
Detailed Description
In order to make the aforementioned features and advantages of the embodiments of the present invention more comprehensible, embodiments accompanied with figures are described in detail below.
Referring to fig. 1, a flowchart of a method according to an embodiment of the invention may include the following steps:
step 101: sending a heartbeat message;
step 102: when a response returned by the processor according to the heartbeat message is obtained within a preset time, acquiring load information of the processor according to the response;
step 103: and judging whether the processor is overloaded or not according to the load information.
It can be seen that, in the embodiment of the present invention, if a response returned by the processor for the heartbeat message is received within the preset time, whether the processor is overloaded can be determined according to the load information carried in the response. Therefore, whether the processor is overloaded or not can be known under any condition, and the potential safety hazard of equipment is eliminated.
It is noted that step 101 may include two implementations. The first realization mode is as follows: and directly sending heartbeat messages to the processor. The second implementation manner is as follows: and writing the content of the heartbeat message into an intermediate storage medium. The above two modes are explained below.
First, an implementation of directly sending the heartbeat message to the processor is described in an embodiment.
Referring to fig. 2, a flowchart of a second method according to an embodiment of the present invention includes the following steps:
step 201: sending a heartbeat message to a processor;
the step is completed by the distribution center, and the heartbeat message can be understood as some data messages and can be a proprietary protocol for interaction among modules in the equipment, and is used for acquiring load information of the processor. Each data of the heartbeat message is sent at a certain interval (similar to a certain time interval for each heartbeat), in this embodiment, this interval is a fixed value, for example, one data message is sent every 0.5 ms; in other embodiments, the interval between the data packets may also be a non-fixed value, for example, a data packet is sent after a first interval of 0.2ms, a data packet is sent after a second interval of 0.3ms, and a data packet is sent after a third interval of 0.4 ms; then, the periodic repetition is performed at intervals of 0.2ms, 0.3ms, and 0.4ms, or other interval time is used. This interval generally does not exceed a set threshold in practical applications, which may be determined by testing or by empirical or other means depending on the particular application.
The content of the heartbeat packet may at least include: a sequence number and/or a timestamp of the heartbeat packet. For security reasons, the contents of the heartbeat message may also include an authentication code. In addition, for the load of the application, the content of the heartbeat packet may further include other information, such as: the current message has the largest flow, and the like.
Step 202: timing the sent heartbeat message;
the distribution center can perform timing in the following two ways:
the first mode is as follows: starting a timer for each heartbeat message, wherein the timer is used for timing the response time of the processor to the heartbeat message;
in this way, each heartbeat message starts a timer, when the message is sent, the timer starts to time, and whether the processor responds to the heartbeat message within the preset time can be judged through the timer.
The second way is: and inquiring whether the processor responds to the sent heartbeat message at regular intervals.
In this way, the heartbeat messages sent by the processor pairs can be checked at regular intervals; or the time can be divided into several parts, and whether a certain part of messages has response or not can be inquired in the divided time period. In the checking process, in the embodiment, checking is performed in a round robin manner; in other embodiments, other custom rules may be used for viewing. The second way is illustrated below by the following example:
assuming that there are 100 heartbeat messages, it can be adopted to check whether all the sent messages have responses at regular intervals: for example, whether the 100 heartbeat messages are queried once every 1ms is set to respond or not; or dividing 1ms into several parts, for example, into 5 parts, each of which occupies 0.2ms, and querying the first 20 heartbeat messages in 100 heartbeat messages for response in the first 0.2 ms; inquiring whether the next 20 messages in the 100 messages have responses in the second 0.2 ms; by analogy, the query function can also be realized.
In a second way, only one timer may need to be started, or other means such as a timer interrupt may be utilized to implement the query function.
Step 203: judging whether a response returned by the processor to the heartbeat message is received within a preset time, if so, entering a step 204; otherwise, go to step 206;
the preset time threshold can be obtained from empirical values or from passing tests in practical applications. When the heartbeat message sent by the distribution center contains a plurality of data messages, if at least one of the data messages does not return a response, the process proceeds to step 206.
Step 204: acquiring whether the processor is overloaded or not according to the load information;
the response returned by the processor to the heartbeat message may include: a serial number corresponding to the serial number of the received heartbeat message, and a processor utilization rate. The serial number of the response returned by the processor may be the same as the serial number of the heartbeat message, or may correspond to the serial number of the heartbeat message according to a certain calculation rule.
Optionally, the response returned by the processor to the heartbeat packet may further include: memory utilization, critical resource utilization, or First In First Out (FIFO) related information, the FIFO including hardware descriptor resources or memory resources, etc. Wherein the relationship resource utilization may include: buffer usage size or unprocessed queue length, etc. If the contents of the heartbeat message include the verification code, the response returned by the processor also includes the verification code, and the verification code returned by the processor can also be the same as the verification code of the heartbeat message or correspond to the verification code of the heartbeat message according to a certain calculation rule.
The load information of the processor may include: utilization of the processor. When the utilization is above a preset threshold, which may be obtained through testing or empirical values or other means, it is indicated that a process has taken place.
In addition, the load information may also include the number of FIFOs, and the FIFOs may include hardware FIFOs and/or software-implemented FIFOs, in this embodiment, a scheme of using hardware FIFOs in combination with software FIFOs is preferably used, and when the number of used hardware FIFOs or the number of used software FIFOs in the load information exceeds a preset threshold, it indicates that overload has occurred, and the threshold may also be obtained through testing or empirical value or other means.
Step 205: if the processor is not overloaded, the network message to be processed is sent to the processor, and the processor executes the operation; if the load condition indicates that the processor is overloaded, performing overload processing on the network message to be processed, and returning to the step 201;
step 206: determining that the processor is overloaded;
when the preset time threshold is exceeded, the distribution center does not receive the response returned by the processor aiming at the heartbeat message, and the distribution center judges that the processor is overloaded;
when the utilization rate of the processor is too high or the related hardware is disconnected (such as the condition that the hardware FIFO space is full) and the like, the response to the heartbeat message cannot be returned within the preset time threshold, so that the processor can be directly judged to be overloaded.
Step 207: and performing overload processing on the network message to be processed, and returning to the step 201.
It should be noted that the processor will return a response to the distribution center as long as it receives the heartbeat message from the distribution center. When the processor is overloaded, if the upstream or downstream channel has not generated back pressure, the distribution center can judge that the processor is overloaded according to the load information of the processor. When the processor does not respond to the heartbeat message within the preset time threshold, the processor can be directly judged to be overloaded.
In the steps shown in fig. 2, the overload processing performed by the distribution center includes sending to other processors or directly forwarding to other devices.
The above describes an implementation of directly sending a heartbeat packet to a processor, and an implementation of writing the content of the heartbeat packet to an intermediate storage medium is described in the following with an embodiment.
In another embodiment, the heartbeat message may be transmitted by sharing an intermediate storage medium with the processor through the distribution center, that is, the intermediate storage medium is used for receiving the read-write operation of the distribution center and the processor on the content of the heartbeat message.
The specific implementation comprises the following steps: the distribution center firstly reads in the upstream or downstream backpressure information to know whether the backpressure occurs, when the backpressure occurs, the distribution center does not continue to execute the operation, and the process is ended. When the back pressure is not found, the distribution center writes the content of the heartbeat message into the intermediate storage medium, and then starts to time the write operation executed this time. When the time is within the preset time threshold, if the distribution center finds that the processor writes the relevant information in the intermediate storage medium aiming at the content of the heartbeat message, the load information of the processor is obtained according to the relevant information, and whether the processor is overloaded or not is judged according to the load information. And when the preset time threshold is exceeded, if the distribution center does not find that the processor writes the relevant information in the intermediate storage medium for the content of the heartbeat message, judging that the processor is overloaded. At this time, the distribution center sends the network packet to be processed to other processors or forwards the network packet to other devices.
For the processor, the processor reads the intermediate storage medium at regular intervals and writes information corresponding to the content of the heartbeat message into the intermediate storage medium according to the self-load condition. However, when the processor is overloaded, the execution of the writing operation is delayed, so that the distribution center cannot read the information written by the processor within the preset time threshold, and the processor is directly judged to be overloaded.
It can be seen that, in the embodiment of the present invention, if the distribution center receives the response returned by the processor for the heartbeat message within the preset time, it can be determined whether the processor is overloaded according to the load information carried in the response, and if the response from the processor is not received after exceeding the preset time, it is directly determined that the processor is overloaded. By the embodiment of the invention, whether the process of the processor occurs can be inquired in real time, and the timeliness of detection is improved, so that the potential safety hazard of equipment is reduced.
Referring to fig. 3, an embodiment of the present invention further provides an overload detection apparatus 300, which may include:
a sending unit 301, configured to send a heartbeat message;
an obtaining unit 302, configured to, when a response returned by the processor according to the heartbeat message is obtained within a preset time, obtain load information of the processor according to the response;
a first judging unit 303, configured to judge whether the processor is overloaded according to the load information; the load information here may be the utilization of the processor, the number of FIFOs, and the like.
The apparatus 300 further comprises:
a second determining unit 304, configured to determine that the processor is overloaded if a response returned by the processor is not received beyond the preset time.
The transmitting unit 301 includes:
a direct sending unit, configured to directly send the heartbeat packet to the processor;
or;
and the indirect sending unit is used for writing the content of the heartbeat message into an intermediate storage medium.
When the direct sending unit is used to send the heartbeat packet, the obtaining unit 302 further includes:
the direct acquisition unit is used for directly acquiring the response returned by the processor;
or,
when the indirect sending unit is used to write the content of the heartbeat packet into an intermediate storage medium, the obtaining unit 302 further includes:
and the indirect acquisition unit is used for indirectly acquiring the response written in the intermediate storage medium by the processor according to the heartbeat message from the intermediate storage medium.
The apparatus 300 further comprises:
a timing unit 305, configured to start a timer for each heartbeat packet to time a response time of the heartbeat packet by the processor;
or,
and inquiring whether the processor responds to the sent heartbeat message at regular intervals.
The interaction flow of each unit in the apparatus may specifically refer to the flow in the method embodiment, and is not described herein again.
By the embodiment of the invention, whether the process of the processor occurs can be inquired in real time, and the timeliness of detection is improved, so that the potential safety hazard of equipment is reduced.
Referring to fig. 4, an embodiment of the present invention further provides an overload detection system 400, including:
a distribution center 401, a processor 402;
the distribution center 401 is configured to send a heartbeat message;
the processor 402 is configured to receive the heartbeat packet, and respond according to the heartbeat packet;
when the distribution center 401 obtains a response returned by the processor 402 according to the heartbeat message within a preset time, the distribution center obtains load information of the processor 402 according to the response, and determines whether the processor 402 is overloaded according to the load information.
The distribution center 401 is further configured to:
if no response returned by the processor 402 according to the heartbeat message is obtained within the preset time, it is determined that the processor 402 is overloaded.
The distribution center 401 sends the heartbeat message to the processor 402 by a direct sending method; the processor directly returns a response to the distribution center 401 after responding;
or,
referring to fig. 5, the system further includes an intermediate storage medium 403, and the distribution center 401 sends the heartbeat packet to the intermediate storage medium 403; after responding, the processor 402 writes the response to the intermediate storage medium 403 for the distribution center 401 to read.
In the system, the specific interaction flow of the distribution center 401 and the processor 402 may refer to the flow in the method embodiment, and details are not described here.
By the embodiment of the invention, whether the process of the processor occurs can be inquired in real time, and the timeliness of detection is improved, so that the potential safety hazard of equipment is reduced.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term "comprising", without further limitation, means that the element so defined is not excluded from the group consisting of additional identical elements in the process, method, article, or apparatus that comprises the element.
Through the above description of the embodiments, those skilled in the art will clearly understand that the present invention may be implemented by software plus a necessary hardware platform, and certainly may be implemented by hardware, but in many cases, the former is a better embodiment. With this understanding in mind, all or part of the technical solutions of the present invention that contribute to the background can be embodied in the form of a software product, which can be stored in a storage medium, such as a ROM/RAM, a magnetic disk, an optical disk, etc., and includes instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods according to the embodiments or some parts of the embodiments of the present invention.
The present invention has been described in detail, and the principle and embodiments of the present invention are explained herein by using specific examples, which are only used to help understand the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (12)

1. An overload detection method, the method comprising:
the distribution center sends a heartbeat message to the processor;
when the distribution center obtains a response returned by the processor according to the heartbeat message within a preset time, acquiring load information of the processor according to the response;
and the distribution center judges whether the processor is overloaded or not according to the load information.
2. The method of claim 1, wherein sending the heartbeat message comprises:
directly sending the heartbeat message to the processor;
or,
and writing the content of the heartbeat message into an intermediate storage medium.
3. The method according to claim 2, wherein if the heartbeat packet is directly sent to the processor, and when a response returned by the processor according to the heartbeat packet is obtained within a preset time, obtaining the load information of the processor according to the response comprises:
receiving a response returned by the processor according to the heartbeat message within a preset time, and acquiring load information of the processor according to the response;
or, if the content of the heartbeat packet is written into an intermediate storage medium, and a response returned by the processor according to the heartbeat packet is obtained within a preset time, obtaining the load information of the processor according to the response includes:
and acquiring related information written by the processor in the intermediate storage medium aiming at the content of the heartbeat message within preset time, and acquiring load information of the processor according to the related information.
4. The method according to any one of claims 1 to 3, wherein after the sending of the heartbeat packet, the method further comprises:
starting a timer for each heartbeat message, wherein the timer is used for timing the response time of the processor to the heartbeat message;
or,
and inquiring whether the processor responds to the sent heartbeat message at regular intervals.
5. The method of claim 1, further comprising:
and if the response returned by the processor is not received within the preset time, judging that the processor is overloaded.
6. An overload detection apparatus, the apparatus comprising:
a sending unit, configured to send a heartbeat message to a processor;
the acquisition unit is used for acquiring the load information of the processor according to the response when the response returned by the processor according to the heartbeat message is obtained within the preset time;
and the first judgment unit is used for judging whether the processor is overloaded or not according to the load information.
7. The apparatus of claim 6, further comprising:
and the second judging unit is used for judging that the processor is overloaded if the response returned by the processor is not received within the preset time.
8. The apparatus of claim 6, wherein the sending unit comprises:
a direct sending unit, configured to directly send the heartbeat packet to the processor;
or;
an indirect sending unit, configured to write the content of the heartbeat packet into an intermediate storage medium;
when the direct sending unit is used to send the heartbeat packet, the obtaining unit further includes:
the direct acquisition unit is used for directly acquiring the response returned by the processor;
or,
when the indirect sending unit is used to write the content of the heartbeat packet into an intermediate storage medium, the obtaining unit further includes:
and the indirect acquisition unit is used for indirectly acquiring the response written in the intermediate storage medium by the processor according to the heartbeat message from the intermediate storage medium.
9. The apparatus of claim 6, further comprising:
a timing unit, configured to start a timer for each heartbeat packet to time a response time of the heartbeat packet by the processor;
or,
and inquiring whether the processor responds to the sent heartbeat message at regular intervals.
10. An overload detection system, the system comprising:
a distribution center, a processor;
the distribution center is used for sending heartbeat messages to the processor;
the processor is used for receiving the heartbeat message and responding according to the heartbeat message;
and when the distribution center obtains a response returned by the processor according to the heartbeat message within a preset time, acquiring the load information of the processor according to the response, and judging whether the processor is overloaded or not according to the load information.
11. The system of claim 10, wherein the distribution center is further configured to:
and if the response returned by the processor according to the heartbeat message is not obtained within the preset time, judging that the processor is overloaded.
12. The system according to claim 10, wherein the distribution center sends the heartbeat message to the processor by a direct sending method, and the processor directly returns a response to the distribution center after responding;
or,
the system also comprises an intermediate storage medium, the distribution center sends the heartbeat message to the intermediate storage medium, and the processor writes a response into the intermediate storage medium after responding so as to be read by the distribution center.
CN2009101373056A 2009-04-22 2009-04-22 Method, device and system for detecting overload Expired - Fee Related CN101547157B (en)

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CN102316497B (en) * 2010-07-02 2015-10-21 中兴通讯股份有限公司 A kind of method and system controlling base station resets based on protocol stack monitoring state
CN104123098B (en) * 2013-04-23 2018-09-21 华为技术有限公司 A kind of method and apparatus of data processing
CN105391773A (en) * 2015-10-16 2016-03-09 广东欧珀移动通信有限公司 Data transmission method and data transmission device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1549528A (en) * 2003-05-12 2004-11-24 华为技术有限公司 Method for managing network equipment application unit
CN1571538A (en) * 2004-05-10 2005-01-26 中兴通讯股份有限公司 A method for performing system load control on mobile switch center
CN101098509A (en) * 2007-07-17 2008-01-02 中兴通讯股份有限公司 Transmission method of interface delivering report message

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1549528A (en) * 2003-05-12 2004-11-24 华为技术有限公司 Method for managing network equipment application unit
CN1571538A (en) * 2004-05-10 2005-01-26 中兴通讯股份有限公司 A method for performing system load control on mobile switch center
CN101098509A (en) * 2007-07-17 2008-01-02 中兴通讯股份有限公司 Transmission method of interface delivering report message

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