CN101533622B - Source driver and drive method for liquid crystal display - Google Patents
Source driver and drive method for liquid crystal display Download PDFInfo
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- CN101533622B CN101533622B CN 200910105816 CN200910105816A CN101533622B CN 101533622 B CN101533622 B CN 101533622B CN 200910105816 CN200910105816 CN 200910105816 CN 200910105816 A CN200910105816 A CN 200910105816A CN 101533622 B CN101533622 B CN 101533622B
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Abstract
This present invention is appropriate for the filed of display, which provides a source driver and drive method for a liquid crystal display, where the source driver includes a shift register, a set data latch and a detector circuit. The shift registers includes plural flip-flops for transmitting a start signal. The set data latch transmits display data according to an output signal of a flip-flop in correspondence. When the start signal is accorded with a black frame insertion signal, the detector circuit resets the shift register and drives the set data latch to output black data to be transmitted to the next source driver.
Description
Technical field
The invention belongs to field of display, relate in particular to the driving method of a kind of source electrode driver and LCD.
Background technology
(Liquid Crystal Display is to utilize the rotation of liquid crystal to control the amount of penetrating of light LCD), to show different intensity gray scale to LCD.Compared to cathode-ray tube (CRT) (Cathode Ray Tube, CRT) display uses the display mode of pulsed (impulse-type), LCD then is to use voltage to keep the type of drive of (hold-type) continuously, because liquid crystal rotates to be continuous variation, LCD make LCD slow than cathode-ray tube display on the reaction velocity of animate, so can produce dynamic fuzzy (motion blur) when showing the object picture that moves.In order to solve the problem of dynamic fuzzy, the LCD utilization adds the black insertion technology of black picture in picture, simulate the display mode of cathode-ray tube display, for example utilizes flicker backlight to add black picture, or utilizes driving circuit to add black picture.
Please refer to Fig. 1, Fig. 1 is the synoptic diagram of the data transmission of LCD.When LCD uses black insertion technology to write data, need alternately write video data (Display Data) and black data (Black Data), so can produce the problem that frame updating frequency (frame rate) rises.As shown in Figure 1, added a black picture respectively after n+2 picture of LCD and n+3 picture, therefore, use the LCD of black insertion technology need in the time of 4 pictures, show 6 pictures, just use the frame updating frequency of the LCD of black insertion technology to improve 1.5 times.
Please refer to Fig. 2 and Fig. 3, Fig. 2 is the oscillogram of the signal of source electrode driver, and Fig. 3 writes the oscillogram of the signal of black data for source electrode driver.STH represents start signal, and DATA represents video data, and TP represents to be written into signal, and Tc represents the minimum duration of charging of panel, and Td1 and Td2 represent the write time of video data.As shown in Figure 2, source electrode driver exports video data DATA on the display panel in time point A, and display panel is finished charging when time point B.As shown in Figure 3, when source electrode driver writes black data, the write time Td2 of video data DATA shortens because of writing black data, shorten to Td2 by write time Td1 originally, though still in minimum allowed band, write time Td2 may arrive the upper limit of the transmittability of source electrode driver to duration of charging Tc.When the write time of video data shortened, the frame updating frequency of LCD rose.When using black insertion technology on large-sized LCD, oversize because of the line footpath of data line possibly, and produce problems such as electromagnetic interference (EMI) or signal degradation.Therefore, the time that writes black data of black insertion technology must shorten, to avoid significantly improving the frame updating frequency of LCD.
Summary of the invention
The object of the present invention is to provide a kind of source electrode driver, be intended to solve prior art when the shortening LCD writes the time of black data, frame updating frequency height, the problem of signal degradation.
The present invention is achieved in that a kind of source electrode driver.Described source electrode driver comprises a shift registor, one first group of data bolt lock device and a circuit for detecting, and described shift registor comprises a plurality of flip-flops, is used to transmit first start signal; Described first group of data bolt lock device is used for the output signal transmitting and displaying data according to corresponding flip-flop; Described circuit for detecting is used for when described first start signal meets a black frame insertion signals, the described shift registor of resetting, and drive described first group of data bolt lock device output black data, and described black frame insertion signals is transferred to next source electrode driver; One second group of data bolt lock device is used for described video data is converted to three-channel numerical digit data; A plurality of numerical digit analogy converters are used for described numerical digit data are converted to an analog date; A plurality of output buffers are used to export described analog date.
Another object of the present invention is to provide a kind of driving method of LCD.Said method comprising the steps of:
Transmit first start signal by a shift registor;
Produce a black frame insertion signals according to described first start signal;
According to the described black frame insertion signals described shift registor of resetting;
Drive one group of data bolt lock device output black data according to described black frame insertion signals; And
Described black frame insertion signals is transferred to next source electrode driver.
In the present invention, proposed a kind of source electrode driver, comprised shift registor, first group of data bolt lock device and circuit for detecting, wherein, offset buffer comprises a plurality of flip-flops, is used to transmit start signal; First group of data bolt lock device is used for the output signal transmitting and displaying data according to corresponding flip-flop; Circuit for detecting is used for when start signal meets a black frame insertion signals, replacement shift registor and drive first group of data bolt lock device output black data, and black frame insertion signals is transferred to next source electrode driver.When this source electrode driver has avoided the shortening LCD to write the time of black data, owing to the too high problem that produces electromagnetic interference (EMI) or signal degradation of frame updating frequency.
Description of drawings
Fig. 1 is the synoptic diagram of the data transmission of the LCD that provides of prior art;
Fig. 2 is the oscillogram of the signal of the source electrode driver that provides of prior art;
Fig. 3 is the oscillogram that source electrode driver that prior art provides writes the signal of black data;
Fig. 4 be first embodiment of the invention provide the synoptic diagram of source electrode driver of LCD;
Fig. 5 is the start signal STH that provides of the embodiment of the invention and the oscillogram of clock pulse signal CLK;
Fig. 6 be the embodiment of the invention provide source electrode driver output black data the time signal truth table;
Fig. 7 be the embodiment of the invention provide source electrode driver output video data the time signal truth table;
Fig. 8 is the source electrode driver output video data that provides of the embodiment of the invention and the oscillogram of black data;
Fig. 9 is that the source electrode driver of the present invention that the embodiment of the invention provides writes black data oscillogram compared with the prior art;
Figure 10 is the synoptic diagram of the source electrode driver of the LCD that provides of second embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
In embodiments of the present invention, proposed a kind of source electrode driver, comprised shift registor, first group of data bolt lock device and circuit for detecting, wherein, offset buffer comprises a plurality of flip-flops, is used to transmit start signal; First group of data bolt lock device is used for the output signal transmitting and displaying data according to corresponding flip-flop; Circuit for detecting is used for when start signal meets a black frame insertion signals, replacement shift registor and drive first group of data bolt lock device output black data, and black frame insertion signals is transferred to next source electrode driver.When this source electrode driver has avoided the shortening LCD to write the time of black data, owing to the too high problem that produces electromagnetic interference (EMI) or signal degradation of frame updating frequency.
In the middle of instructions and follow-up claim, used some vocabulary to censure specific element.The person with usual knowledge in their respective areas should understand, and same element may be called with different nouns by manufacturer.This instructions and follow-up claim are not used as the mode of distinct elements with the difference of title, but the benchmark that is used as distinguishing with the difference of element on function.Be an open term mentioned " comprising " in the middle of instructions and the follow-up claim in the whole text, so should be construed to " including but not limited to ".In addition, " electric connection " speech is to comprise any indirect means that are electrically connected that directly reach at this.Therefore, be electrically connected at one second device, then represent this first device can be directly connected in this second device, or be connected to this second device indirectly through other devices or connection means if describe one first device in the literary composition.
Please refer to Fig. 4, Fig. 4 is the synoptic diagram of first embodiment of the source electrode driver of LCD of the present invention.Source electrode driver 20 comprises a shift registor 22, first group of data bolt lock device 1-1～1-n, second group of data bolt lock device 2-1～2-n, a plurality of numerical digit analogy converter DAC, a plurality of output buffer and circuit for detecting 24.Shift registor 22 comprises a plurality of flip-flop DFF_1～DFF_n, is used to transmit one first start signal STH1.First group of data bolt lock device 1-1～1-n according to the output signal of corresponding flip-flop, be written into signal LD and the first control signal TP1 transfers to second group of data bolt lock device 2-1～2-n with video data DATA or black data.Second group of data bolt lock device is converted to three-channel numerical digit data with video data.A plurality of numerical digit analogy converter DAC are converted to analog date according to gamma signal and polar signal POL with the numerical digit data that second group of data bolt lock device stores, and last, analog date is sent on output data line 1～3n by output buffer.
Circuit for detecting 24 comprises one first and lock (AND gate) 241,1 first flip-flop DFF_A, one second flip-flop DFF_B, one the 3rd flip-flop DFF_C, one second and lock 242 and one or lock (OR gate) 243.First and lock 241 receive the output signal of the first flip-flop DFF_A, the second flip-flop DFF_B and the 3rd flip-flop DFF_C, wherein the output terminal of the first flip-flop DFF_A and the 3rd flip-flop DFF_C is electrically connected at first and two input ends of lock 241 by a phase inverter respectively.Second and lock 242 receive the output signal of the first flip-flop DFF_A and the second flip-flop DFF_B.Source electrode driver 20 of the present invention utilizes circuit for detecting 24 to finish the action that writes black data fast.When the first start signal STH1 meets a black frame insertion signals, the first control signal TP1 that circuit for detecting 24 produces is with replacement shift registor 22, therefore, source electrode driver 20 is according to the circuit for detecting 24 outputs second start signal STH2, and first group of data bolt lock device 1-1～1-n is according to first control signal TP1 output black data.When preceding two working storages in the shift registor 22 are high state (two first wide start signal STH1 of clock signal CLK input to source electrode driver 20), then the data with first group of data bolt lock device 1-1～1-n are made as low level entirely, be black data entirely promptly, and shift registor 22 clear alls are low level, then the second start signal STH2 exports two high levels continuously, provides next source electrode driver that the data bolt lock device is set at black data.
Please refer to Fig. 5, Fig. 5 is the oscillogram of start signal STH and clock pulse signal CLK.Source electrode driver 20 of the present invention is exported video data or black data according to the first start signal STH1.When the high levle of the first start signal STH1 was the pulse width of a clock signal CLK, the first start signal STH1 was a normal operation signal 27, source electrode driver 20 output video datas.When the first start signal STH1 was the pulse width of continuous two clock signal CLK, the first start signal STH1 was a black frame insertion signals 28, source electrode driver 20 output black datas.
Please refer to Fig. 6, the truth table of signal when Fig. 6 is source electrode driver 20 output black datas.When clock pulse t0, the first start signal STH1 imports high levle.When clock pulse t1, shift registor 22 beginning displacements.When clock pulse t2, the first control signal TP1 is a logical one, and then next clock pulse is promptly removed the value of shift registor 22.When clock pulse t3, first group of data bolt lock device 1-1～1-n is set to the output black data, the second start signal STH2 output logic 1.When clock pulse t4, the second start signal STH2 is output logic 1 once more, makes next source electrode driver output black data.When clock pulse t5, source electrode driver 20 is finished the output of black data.When the first start signal STH1 was black frame insertion signals 28, the first start signal STH1 was all logical one in clock pulse t0 and t1.Second and lock 242 be logical one in the first control signal TP1 that clock pulse t2 produces, so will be reset in clock pulse t3 shift registor 22, first group of data bolt lock device 1-1～1-n will export black data.Because shift registor 22 is reset when clock pulse t3, so source electrode driver 20 is according to the circuit for detecting 24 outputs second start signal STH2.The second start signal STH2 is all logical one in clock pulse t3 and t4, will be transferred to next source electrode driver as black frame insertion signals 28.Therefore, source electrode driver 20 utilizes circuit for detecting 24 to finish the output black data in clock pulse t5.
Please refer to Fig. 7, the truth table of signal when Fig. 7 is source electrode driver 20 output video datas.When clock pulse t0, the first start signal STH1 imports high levle.When clock pulse t1, shift registor 22 beginning displacements.When clock pulse t2, the second control signal TP2 output logic 1 is to remove the value of the first flip-flop DFF_A, the second flip-flop DFF_B and the 3rd flip-flop DFF_C.When clock pulse t3, shift registor 22 continues displacement.When clock pulse t240, the second start signal STH2 output logic 1.When clock pulse t241, source electrode driver 20 is finished the output of video data.When the first start signal STH1 was normal operation signal 27, the first start signal STH1 was a logical one in clock pulse t0, forwards by shift registor 22.First and lock 241 be logical one in the second control signal TP2 that clock pulse t2 produces, so will be reset in the clock pulse t3 first flip-flop DFF_A, the second flip-flop DFF_B and the 3rd flip-flop DFF_C.When clock pulse t240, source electrode driver 20 is according to the shift registor 22 outputs second start signal STH2, and therefore, source electrode driver 20 is finished the output video data in clock pulse t241.
Please refer to Fig. 8, Fig. 8 is the oscillogram of source electrode driver output video data and black data.According to the reckoning of the truth table of Fig. 6 and Fig. 7, a source electrode driver needs the triggering of 4 clock signals, just can finish the black data of a source electrode driver and set action, and the signal that wherein comprises once two source electrode drivers overlaps.So, if calculate, finish a sub-level and go out defeated black data setting with 4 source electrode drivers, need the time of 4*3+1=13 clock signal CLK of cost, as shown in Figure 8.
Please refer to Fig. 9, Fig. 9 writes black data oscillogram compared with the prior art for source electrode driver of the present invention.The top of Fig. 9 is the oscillogram that the source electrode driver of prior art writes black data, and the below of Fig. 9 is the oscillogram that source electrode driver of the present invention writes black data.STH represents start signal, and DATA represents video data, and TP represents to be written into signal, and Tc represents the minimum duration of charging of panel, and Td2 and Td3 represent the write time of video data.Source electrode driver of the present invention is exported video data or black data according to start signal STH, and utilizing start signal STH is that the pulse width of continuous two clock signal CLK is as black frame insertion signals, with control data bolt lock device output black data.Clearly, the time that source electrode driver of the present invention writes black data shortens, and the write time of video data is Td3 by the Td2 growth, so the frame updating frequency of LCD just can not rise too many.
Please refer to Figure 10, Figure 10 is the synoptic diagram of second embodiment of the source electrode driver of LCD of the present invention.In a second embodiment, second of circuit for detecting 25 and the connected mode of lock 242 different with first embodiment.Second and lock 242 receive output signal by first flip-flop DFF_1 and second flip-flop DFF_2 of shift registor 22.The all operations of second embodiment is all identical with first embodiment.
According to embodiments of the invention, source electrode driver 20 of the present invention utilizes shift registor 22 to transmit the first start signal STH1, utilizes first group of data bolt lock device 1-1～1-n to export video data DATA according to the first start signal STH1.When source electrode driver 20 will write black data, the start signal STH1 that will have the pulse width of two clock signals is set at black frame insertion signals, according to black frame insertion signals replacement shift registor 22, and drive first group of data bolt lock device 1-1～1-n and export black data, at last, start signal STH1 is transferred to next source electrode driver.
In sum, the source electrode driver of LCD of the present invention comprises a shift registor, one group of data bolt lock device and a circuit for detecting.This shift registor comprises a plurality of flip-flops, is used to transmit an initial signal.This group data bolt lock device is according to the output signal transmitting and displaying data of corresponding flip-flop.When this start signal meets a black frame insertion signals, reset this shift registor and drive this group data bolt lock device output black data of this circuit for detecting, and this black frame insertion signals is transferred to next source electrode driver.
In embodiments of the present invention, by proposing a kind of source electrode driver, comprise shift registor, first group of data bolt lock device and circuit for detecting, when this source electrode driver has avoided the shortening LCD to write the time of black data, owing to the too high problem that produces electromagnetic interference (EMI) or signal degradation of frame updating frequency.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. a source electrode driver is characterized in that, described source electrode driver comprises:
One shift registor comprises a plurality of flip-flops, is used to transmit first start signal;
One first group of data bolt lock device is used for the output signal transmitting and displaying data according to corresponding flip-flop; And
One circuit for detecting is used for when described first start signal meets a black frame insertion signals, the described shift registor and drive described first group of data bolt lock device output black data of resetting, and described black frame insertion signals is transferred to next source electrode driver;
One second group of data bolt lock device is used for described video data is converted to three-channel numerical digit data;
A plurality of numerical digit analogy converters are used for described numerical digit data are converted to an analog date; And
A plurality of output buffers are used to export described analog date.
2. source electrode driver as claimed in claim 1 is characterized in that, described circuit for detecting comprises:
The flip-flop of three serial connections, promptly first flip-flop, second flip-flop and the 3rd flip-flop are used for temporary described first start signal;
One first logic lock is electrically connected at the flip-flop of described three serial connections, is used to produce the flip-flop of a reset signal to reset described three serial connections;
One second logic lock is used for producing a control signal to drive described first group of data bolt lock device output black data according to described first start signal; And
One the 3rd logic lock, its input end are electrically connected at the output terminal and the described shift registor of described the 3rd flip-flop, are used to export second start signal.
3. source electrode driver as claimed in claim 1 is characterized in that, described circuit for detecting comprises:
One first and lock, comprise a first input end, one second input end, one the 3rd input end and an output terminal;
One first flip-flop comprises an input end, is used to receive described first start signal, and an output terminal is electrically connected at described first and the first input end of lock by one first phase inverter, and the end of resetting is electrically connected at described first and the output terminal of lock;
One second flip-flop comprises the output terminal that an input end is electrically connected at described first flip-flop, and an output terminal is electrically connected at described first and second input end of lock, and the end of resetting is electrically connected at described first and the output terminal of lock;
One the 3rd flip-flop comprises the output terminal that an input end is electrically connected at described second flip-flop, and an output terminal is electrically connected at described first and the 3rd input end of lock by one second phase inverter, and the end of resetting is electrically connected at described first and the output terminal of lock;
One second and lock, comprise the output terminal that a first input end is electrically connected at described first flip-flop, one second input end is electrically connected at the output terminal of described second flip-flop, and an output terminal is electrically connected at described shift registor and described first group of data bolt lock device; And
One or lock, comprise the output terminal that a first input end is electrically connected at described the 3rd flip-flop, one second input end is electrically connected at the output terminal of described shift registor, and an output terminal is electrically connected at described next source electrode driver.
4. source electrode driver as claimed in claim 1 is characterized in that, described circuit for detecting comprises:
One first and lock, comprise a first input end, one second input end, one the 3rd input end and an output terminal;
One first flip-flop comprises an input end, is used to receive described first start signal, and an output terminal is electrically connected at described first and the first input end of lock by first phase inverter, and the end of resetting is electrically connected at described first and the output terminal of lock;
One second flip-flop comprises the output terminal that an input end is electrically connected at described first flip-flop, and an output terminal is electrically connected at described first and second input end of lock, and the end of resetting is electrically connected at described first and the output terminal of lock;
One the 3rd flip-flop comprises the output terminal that an input end is electrically connected at described second flip-flop, and an output terminal is electrically connected at described first and the 3rd input end of lock by second phase inverter, and the end of resetting is electrically connected at described first and the output terminal of lock;
One second and lock, comprise the output terminal that a first input end is electrically connected at first flip-flop of described shift registor, one second input end is electrically connected at the output terminal of second flip-flop of described shift registor, and an output terminal is electrically connected at described shift registor and described first group of data bolt lock device; And
One or lock, comprise the output terminal that a first input end is electrically connected at described the 3rd flip-flop, one second input end is electrically connected at the output terminal of described shift registor, and an output terminal is electrically connected at described next source electrode driver.
5. source electrode driver as claimed in claim 1 is characterized in that, when first start signal was the pulse width of continuous two clock signals, first start signal was a black frame insertion signals.
6. the driving method of a LCD is characterized in that, may further comprise the steps:
Utilize a shift registor to transmit first start signal;
Produce a black frame insertion signals according to described first start signal;
According to the described black frame insertion signals described shift registor of resetting;
Drive one group of data bolt lock device output black data according to described black frame insertion signals; And
Described black frame insertion signals is transferred to next source electrode driver.
7. method as claimed in claim 6, it is characterized in that, producing a black frame insertion signals according to described first start signal comprises: when setting described first start signal and having the pulse width of continuous two clock signals, described first start signal is described black frame insertion signals.
8. method as claimed in claim 6 is characterized in that, described method also comprises:
According to described first start signal, utilize described data bolt lock device to export video data.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910105816 CN101533622B (en) | 2009-02-26 | 2009-02-26 | Source driver and drive method for liquid crystal display |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200910105816 CN101533622B (en) | 2009-02-26 | 2009-02-26 | Source driver and drive method for liquid crystal display |
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| CN101533622A CN101533622A (en) | 2009-09-16 |
| CN101533622B true CN101533622B (en) | 2011-03-02 |
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| CN102184699A (en) * | 2010-12-30 | 2011-09-14 | 友达光电股份有限公司 | Reset circuit |
| CN103413537B (en) * | 2013-08-27 | 2015-10-21 | 青岛海信电器股份有限公司 | A kind of LCD drive method of image black plug, device and liquid crystal indicator |
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