CN101527624B - Method for processing data and device thereof - Google Patents
Method for processing data and device thereof Download PDFInfo
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- CN101527624B CN101527624B CN 200910133926 CN200910133926A CN101527624B CN 101527624 B CN101527624 B CN 101527624B CN 200910133926 CN200910133926 CN 200910133926 CN 200910133926 A CN200910133926 A CN 200910133926A CN 101527624 B CN101527624 B CN 101527624B
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Abstract
The embodiment of the invention discloses a method for processing data and a device thereof, belonging to communication field. The method comprises the steps as follows: index information of physical hybrid retransmission indicator channel PHICH data is obtained in a first random access memory; a memory address of the PHICH data at a second random access memory is obtained according to the index information; and the PHICH data is read according to the memory address of the PHICH data at the second random access memory. The device comprises an obtaining module and a reading module. The technical proposal of the embodiment of the invention can reduce occupied RAM resource and improve the utilization rate of the RAM resource.
Description
Technical field
The present invention relates to the communications field, particularly a kind of method and apparatus of deal with data.
Background technology
OFDM (Orthogonal Frequency Division Multiplexing, OFDM) is a kind of multi-carrier modulation technology, owing to the reasons such as its availability of frequency spectrum is high, cost is low more and more receive publicity and pay attention to.Along with the demand to communication data, broadband and mobile, the OFDM technology obtains using more and more widely in the wireless access field.
In actual applications, in the OFDM technology one very part and parcel be subcarrier mapping, the data subcarrier that is about to user's transmission is mapped to RAM (Random Access Memory, random asccess memory), wherein, the data that the user sends comprise PDCCH (Physical Downlink Control Channel, Physical Downlink Control Channel) data and PHICH (Physical Hybrid-ARQ Indicator Channel, physical mixing retransmission indicating chanel) data.When user data being carried out subcarrier when mapping, in RAM, for the PDCCH data are take 8 bits as unit memory allocated unit, for the PHICH data are that product take user's number and 8 bits is as unit memory allocated unit.When user's number is two or more, for the PDCCH data remain product take user's number and 8 bits as unit memory allocated unit, but when the PDCCH data were carried out the subcarrier mapping, the actual part memory space that only takies distribution can cause the waste of storage resources like this.
Summary of the invention
The embodiment of the invention provides a kind of method and apparatus of deal with data.
On the one hand, the embodiment of the invention provides a kind of method of deal with data, comprising:
In the first random asccess memory, read indication information;
When determining that according to the content of described indication information described indication information is when getting physical mixing retransmission indicating chanel PHICH data indication information, in described the first random asccess memory, obtain the index information of described PHICH data, obtain described PHICH data in the memory address of the second random asccess memory according to described index information, read described PHICH data according to described PHICH data in the memory address of the second random asccess memory;
When determining that according to the content of described indication information described indication information is physical downlink control channel PDCCH data indication information, read the PDCCH data that are associated with described PDCCH data indication information.
On the other hand, the embodiment of the invention provides a kind of device of deal with data, comprising:
Acquisition module, be used for reading indication information in the first random asccess memory, when determining that according to the content of described indication information described indication information is when obtaining physical mixing retransmission indicating chanel PHICH data indication information, in described the first random asccess memory, obtain the index information of described PHICH data, obtain described PHICH data in the memory address of the second random asccess memory according to described index information;
Read module is used for reading described PHICH data according to described PHICH data in the memory address of the second random asccess memory;
Wherein, described acquisition module comprises:
Determining unit is used for reading indication information in described the first random asccess memory;
Indicating member, be used for when described determining unit determines that according to the content of described indication information described indication information is PHICH data indication information, obtain the index information that is associated with described PHICH data indication information, and obtain described PHICH data in the memory address of the second random asccess memory according to described index information:
Correspondingly, described read module also is used for, when described determining unit determines that according to the content of described indication information described indication information is physical downlink control channel PDCCH data indication information, read the PDCCH data that are associated with described PDCCH data indication information.
In embodiments of the present invention, by in the first random asccess memory, obtaining the index information of physical mixing retransmission indicating chanel PHICH data; Obtain PHI CH data in the memory address of the second random asccess memory according to index information; Read the PHICH data according to the PHICH data in the memory address of the second random asccess memory, can reduce the RAM resource that takies, improve the utilance of RAM resource.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, the below will do one to the accompanying drawing of required use in embodiment or the description of the Prior Art and simply introduce, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the method flow diagram of the deal with data that provides of one embodiment of the invention;
Fig. 2 is the schematic diagram of the storage data that provide of one embodiment of the invention;
Fig. 3 is the structure chart of the device of the deal with data that provides of another embodiment of the present invention.
Embodiment
For the purpose, technical scheme and the advantage that make embodiment of the present invention is clearer, embodiment of the present invention is described further in detail below in conjunction with accompanying drawing.Obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that obtains under the creative work prerequisite.
One embodiment of the present of invention provide a kind of method of deal with data, as shown in Figure 1, comprising:
101: in the first random asccess memory, obtain the index information of PHICH data, obtain these PHICH data in the memory address of the second random asccess memory according to this index information.
Particularly, can in a RAM, read indication information, after being defined as PHICH data indication information according to the content of this indication information, obtain and index information that this PHICH data indication information is associated, obtain PHICH data memory address in the 2nd RAM according to this index information.
Need to prove that in the present embodiment, indication information can take 1 bit, index information can take 8 bits, but protection range of the present invention is not limited to this concrete bit number.
Wherein, can obtain the indication information of PHICH data and index information in the memory address of a RAM according to user's number, bandwidth and cell ID, concrete acquisition process can with reference to the existing scheme of obtaining, not repeat them here.Wherein, this index information can be the address search sequence, and concrete storage format can be as shown in Figure 2.
Wherein, after the PDCCH data being carried out TBCC (Tail Biting Convolutional Code stings the tail convolutional encoding) processing, obtain the IQ data, each IQ data can represent with 2 bits.When being mapped to the IQ data subcarrier among the one RAM, can be that the unit is IQ data allocations memory space according to 8bit.Simultaneously, increasing the storage of 1bit memory space is PDCCH data or the sign of the index information of PHICH data for distinguishing, and namely each memory cell can be stored the 9bit data.
See also Fig. 2, present embodiment indication information 1 ' b1 represent the 8bit related with 1 ' b1 memory space storage be the address search sequence, this address search sequence is used for the PHICH data that index is stored at the 2nd RAM.In memory address 0,15,40,1,16,41 write respectively since 0 increase progressively the address search sequence, this address search sequence is used for the PHICH data that index is stored at the 2nd RAM.What indication information 1 ' b0 represented the memory space storage related with 1 ' b0 is the PDCCH data, and 1 ' b represents with binary number of 1 bit bit wide storage.
In the present embodiment, referring to Fig. 2, the data of the 1st bit storage of the memory cell of the one RAM of address 0 correspondence are 1 ' b1, can learn the PHICH data that the data 8 ' h0 of the 2-9 bit storage of this memory cell can index stores in the 2nd RAM by data 1 ' b1, in the present embodiment, tentation data 8 ' h0 is illustrated in address 0,1,2 among the 2nd RAM, 3 storage PHICH data.The data of the 1st bit storage of the first ram memory cell of address 15 correspondences are 1 ' b1, can learn the PHICH data that the data 8 ' h1 of the 2-9 bit storage of this memory cell can index stores in the 2nd RAM by data 1 ' b1, in the present embodiment, tentation data 8 ' h1 is illustrated in address 4,5,6 among the 2nd RAM, 7 storage PHICH data; The data of the 1st bit storage of the memory cell of the one RAM of address 40 correspondences are 1 ' b1, can learn the PHICH data that the data 8 ' h2 of the 2-9 bit storage of this memory cell can index stores in the 2nd RAM by data 1 ' b1, in the present embodiment, tentation data 8 ' h2 is illustrated in address 8,9,10 among the 2nd RAM, 11 storage PHICH data; The data of the 1st bit storage of the first ram memory cell of address 1 correspondence are 1 ' b1, can learn the PHICH data that the data 8 ' h3 of the 2-9 bit storage of this memory cell can index stores in the 2nd RAM by data 1 ' b1, in the present embodiment, tentation data 8 ' h3 is illustrated in address 12,13,14 among the 2nd RAM, 15 storage PHICH data; The data of the 1st bit storage of the memory cell of the one RAM of address 16 correspondences are 1 ' b1, can learn the PHICH data that the data 8 ' h4 of the 2-9 bit storage of this memory cell can index stores in the 2nd RAM by data 1 ' b1, in the present embodiment, tentation data 8 ' h4 is illustrated in address 16,17,18 among the 2nd RAM, 19 storage PHICH data; The data of the 1st bit storage of the memory cell of the one RAM of address 41 correspondences are 1 ' b1, can learn the PHICH data that the data 8 ' h5 of the 2-9 bit storage of this memory cell can index stores in the 2nd RAM by data 1 ' b1, in the present embodiment, tentation data 8 ' h5 is illustrated in address 20,21,22 among the 2nd RAM, 23 storage PHICH data.The data of the 1st bit storage of the memory cell of the one RAM of address 2 correspondences are 1 ' b0, can learn that by data 1 ' b0 the data 8 ' hFF of the 2-9 bit storage of this memory cell is the PDCCH data; The data of the 1st bit storage of the memory cell of the one RAM of address 3 correspondences are 1 ' b0, can learn that by data 1 ' b0 the data 8 ' hFE of the 2-9 bit storage of this memory cell is the PDCCH data.Wherein, 8 ' h represents that with hexadecimal number of 8 bit bit wides storage, 1 ' b represents with binary number of 1 bit bit wide storage.
Wherein, receive PHICH data message and PDCCH data message that the user sends, obtain the user from the heading of PHICH data message and/or PDCCH data message and organize number, for every group, user's number can for one, two or more.For convenience, present embodiment is organized number as two groups take the user, in each user group user's number be two for example describes, but not as limit.Two users are respectively first user and the second user in every group, and the PHICH data of supposing first user are X, and the second user's PHICH data are Y, and wherein, X, Y can be 1 ' b0 or 1 ' b1.
First user's of first group of user PHICH data X and second user's PHICH data Y are carried out 3 times of reprocessings, BPSK (Binary Phase Shift Keying, binary phase shift keying) after modulation, 4 times of spread processing, summation processing and power controls are processed, obtain 12 IQ data, these 12 IQ data are written to successively the memory cell of address 0 to 11 correspondence among the 2nd RAM, wherein, per 4 IQ data can be used as one group of data cell.First user's of second group of user PHICH data X and second user's PHICH data Y is carried out that 3 times of reprocessings, BPSK modulation, 4 times of spread processing, summations are processed and after power controls process, obtain 12 IQ data, 12 IQ data that obtain are written to successively the memory cell of address 12 to 23 correspondences among the 2nd RAM, wherein, per 4 IQ data can be used as one group of data cell.
In the present embodiment, the address search sequence also can be the increasing sequence from other value beginning, in actual applications, first address and the corresponding address arithmetic rule that only need to know the memory address of PHICH data in the 2nd RAM get final product, be the PHICH data at the first address of the memory address of a RAM not necessarily since 0, the incidence relation that the PCICH data that only need to store among the address search sequence of storing among the RAM and the 2nd RAM are set up gets final product.
102: from the second random asccess memory, read these PHICH data according to these PHICH data in the memory address of the second random asccess memory.
Particularly, referring to Fig. 2, read a RAM, the data of the 1st bit storage that read the memory cell of address 0 correspondence are 1 ' b1, and what learn the storage of this memory cell 2-9 bit according to 1 ' b1 is the address search sequence, and its value is 0, read address 0 among the 2nd RAM according to this address search sequence, the IQ data of 1,2,3 correspondences; The data of the 1st bit storage that read the memory cell of address 1 correspondence are 1 ' b1, and what learn the storage of this memory cell 2-9 bit according to 1 ' b1 is the address search sequence, and its value is 1, read address 4 among the 2nd RAM according to this address search sequence, the IQ data of 5,6,7 correspondences; The data of the 1st bit storage that read the memory cell of address 2 correspondences are 1 ' b0, and what learn the storage of this memory cell 2-9 bit according to 1 ' b0 is the PDCCH data, and reading the PDCCH data is 8 ' hFF, then is modulated into 4 IQ data.Reading other PHICH data and PDCCH data can with reference to said method, not repeat them here.
Need to prove that a RAM and the 2nd RAM can be integrated among the RAM.
In embodiments of the present invention, by in the first random asccess memory, obtaining the index information of physical mixing retransmission indicating chanel PHICH data; Obtain the PHICH data in the memory address of the second random asccess memory according to index information; Read the PHICH data according to the PHICH data in the memory address of the second random asccess memory, can reduce the RAM resource that takies, improve the utilance of RAM resource.
An alternative embodiment of the invention provides a kind of device of deal with data, as shown in Figure 3, comprising:
Read module 202 is used for reading the PHICH data according to the PHICH data in the memory address of the second random asccess memory.
Wherein, acquisition module 201 specifically can comprise: determining unit, be used for reading indication information in the first random asccess memory, and determine that according to the content of indication information indication information is PHICH data indication informations; And indicating member, be used for obtaining the index information that is associated with PHICH data indication information, and obtain the PHICH data in the memory address of the second random asccess memory according to index information.
In addition, described determining unit also is used for reading indication information in the first random asccess memory, determines that according to the content of indication information indication information is physical downlink control channel PDCCH data indication informations; Correspondingly, read module 202 also is used for reading the PDCCH data that are associated with PDCCH data indication information.
Wherein, indication information can take 1 bit, and index information can take 8 bits, but protection range of the present invention is not limited to this concrete bit number.
Wherein, index information can be the address search sequence.
Wherein, the first random asccess memory and the second random asccess memory can be integrated in a random asccess memory.
In embodiments of the present invention, by in the first random asccess memory, obtaining the index information of physical mixing retransmission indicating chanel PHICH data; Obtain the PHICH data in the memory address of the second random asccess memory according to index information; Read the PHICH data according to the PHICH data in the memory address of the second random asccess memory, can reduce the RAM resource that takies, improve the utilance of RAM resource.
One of ordinary skill in the art will appreciate that all or part of step that realizes in above-described embodiment method is to come the relevant hardware of instruction to finish by program, described program can be stored in the computer read/write memory medium, and described storage medium is floppy disk, hard disk or the CD etc. of computer.
The above only is preferred embodiment of the present invention, and is in order to limit the present invention, within the spirit and principles in the present invention not all, any modification of doing, is equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1. the method for a deal with data is characterized in that, comprising:
In the first random asccess memory, read indication information;
When determining that according to the content of described indication information described indication information is when obtaining physical mixing retransmission indicating chanel PHICH data indication information, in described the first random asccess memory, obtain the index information of described PHICH data, obtain described PHICH data in the memory address of the second random asccess memory according to described index information, read described PHICH data according to described PHICH data in the memory address of the second random asccess memory;
When determining that according to the content of described indication information described indication information is physical downlink control channel PDCCH data indication information, read the PDCCH data that are associated with described PDCCH data indication information.
2. the method for claim 1 is characterized in that, described indication information takies 1 bit, and described index information takies 8 bits.
3. such as the described method of claim 1-2 any one, it is characterized in that described index information is the address search sequence.
4. the device of a deal with data is characterized in that, comprising:
Acquisition module, be used for reading indication information in the first random asccess memory, when determining that according to the content of described indication information described indication information is when obtaining physical mixing retransmission indicating chanel PHICH data indication information, in described the first random asccess memory, obtain the index information of described PHICH data, obtain described PHICH data in the memory address of the second random asccess memory according to described index information;
Read module is used for reading described PHICH data according to described PHICH data in the memory address of the second random asccess memory;
Wherein, described acquisition module comprises:
Determining unit is used for reading indication information in described the first random asccess memory;
Indicating member, be used for when described determining unit determines that according to the content of described indication information described indication information is described PHICH data indication information, obtain the index information that is associated with described PHICH data indication information, and obtain described PHICH data in the memory address of described the second random asccess memory according to described index information;
Correspondingly, described read module also is used for, when described determining unit determines that according to the content of described indication information described indication information is physical downlink control channel PDCCH data indication information, read the PDCCH data that are associated with described PDCCH data indication information.
5. device as claimed in claim 4 is characterized in that, described index information is the address search sequence.
6. device as claimed in claim 4 is characterized in that, described the first random asccess memory and the second random asccess memory are integrated in a random asccess memory.
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