CN101518014A - Calibrating DC offset and I/Q imbalance of analogue I/Q-modulator of transmitter - Google Patents

Abstract

The invention relates to a method and a system for calibrating DC offset and I/Q imbalance of an analogue l/Q-modulator (2) of a transmitter (3). A calibration signal (s(tk)) of frequency f0 is transmitted and an in-phase signal (si(tk)) and a quadrature-phase signal (sq(tk)) of the calibration signal are adjusted by a predetermined compensation coefficient E for coarse DC offset compensation. The first coarse DC offset measurement result (v1) is measured, the value of E is changed and the second coarse DC offset measurement result (V2) is measured. The two measurement results v1 and V2 are then used to estimate the optimum value of E. The process is repeated with predetermined compensation coefficients C (for I/Q imbalance compensation) and D (for fine DC offset compensation) and their measurement results u1, U2 and w1, W2 respectively. The measurement results v and w are arrived at by detecting the power of the modulator output to give a power detector signal (p(tk)) and correlating this signal with a signal of frequency fo. The measurement results u are arrived at by correlating p(tk) with a signal of frequency 2f0.

Description

Unbalanced and the DC offset calibration of the I/Q of the Simulation with I of transmitter/Q modulator

Technical field

Simulation with I/Q the modulator that the present invention relates to be used for to employed transmitter in the digital communication system carries out Calibration Method and system.

Background technology

Modern communication or emission system are based on Digital Signal Processing.This communication system can send and received signal.Digital communication technology is used in nearly all fields such as radio communication, telecommunications and local area network (LAN) such as radio communication.The signal of communication of the particular category that digital communication is sent by transmitter based on using digital modulation technique and received by receiver.These technology are used the signal modulator of a class execute vector or quadrature modulation.Through the signal of vector modulation or through the signal of quadrature modulation is amplitude and the phase modulated signal of modulating according to the in-phase component that has defined phase vectors and quadrature component.In vector modulation or quadrature modulation, two modulating input signals are in-phase component or signal (I) and the quadrature component or the signal (Q) of modulated carrier signal individually.Common digital transmitter framework comprises that will send signal by tunable or fixing Simulation with I/Q modulator upconverts to RF carrier frequency (=I/Q up-conversion) from base band.

Yet inevitably unbalanced causing suppresses not enough to the image model between I branch road in the simulation part of transmitter and the Q branch road.Because hardware tolerances, balanced fully Simulation with I/Q modulator and unreality are feasible, and this causes the limited inhibition to picture signal.Subject matter during design I/Q modulator is by the quadrature of keeping I channel and Q interchannel (, the amplitude and/or the phase error of I channel and Q interchannel are minimized) and makes direct current (DC) skew minimize (carrier wave leakage is minimized) to compensate I/Q is unbalanced.Distortion occurs in the signal that in these factors each all can cause being sent out, this causes the error rate at receiver place to increase.And these factors change along with temperature, device bias voltage, part aging and frequency, and this makes usually and must readjust during operation.Therefore, for example, must compensate the unbalanced influence of I/Q by using Digital Signal Processing.

Unbalanced digital compensation has extensively been described in different documents Simulation with I/Q.Major part has considered that openly the I/Q at receiver place is unbalanced.Because it is unbalanced simulation to have occurred at this before numerical portion, so can realize direct compensation technology based on adaptive-filtering or blind coefficient estimation.

Other system has used the unbalanced compensation of carrying out to the I/Q at transmitter place.This method is difficulty more.US6298096B1 has described the transmit modulator that uses quadrature modulator, and described quadrature modulator has the predistortion module that produces the predistortion output signal.Predistortion module is carried out precompensation based on one group of pre-distortion coefficients to the error of being introduced by quadrature modulator.Quadrature modulator receives output signal from predistortion module.Quadrature modulator carries out up-conversion to I channel signal and Q channel signal, and combines them.In this was handled, quadrature modulator had been introduced error.Under calibration mode, the sine wave at calibration frequency place is applied to the input of predistortion module, and converter is couple to the output of quadrature modulator.It is the numeral of frequency spectrum of output of the quadrature modulator of base band that converter produces frequency conversion.Produce at the twice place of calibration frequency and calibration frequency by quadra-ture modulator errors produce and the parasitic energy that reduces by the effect of predistortion module.The output of quadratic polynomial minimization calculation device receiving transducer.Based on the secondary relation between existing energy and the pre-distortion coefficients value before in the numeral of the frequency spectrum of the output of the quadrature modulator that is in calibration frequency, the pre-distortion coefficients value after quadratic polynomial minimization calculation device is determined.The compensation method of the prior art is based on the iterative processing that repeats.Make initial determine after, when repeating iterative compensation and handle, pre-distortion coefficients value before just is used as starting point.This processing needs the extra time to converge on optimal value.

In addition, EP04106643.2 has described the other method at LO reveals and the I/Q mismatch is calibrated.This calibration steps is based on the adjustment of calibrating signal being carried out by at least one predetermined backoff coefficient.In three calibration steps, determine this penalty coefficient.This processing also needs the extra time to converge on the optimal compensation value.

Summary of the invention

Therefore, the purpose of this invention is to provide the Simulation with I/Q modulator that is used for to employed transmitter in the digital communication system and carry out Calibration Method and system, described calibration does not consume too much processing time and power.

Solve problem by the calibration steps that comprises the characteristic that claim 1 is given.

Provided advantageous embodiments of the present invention in the dependent claims.

According to the present invention, calibrating signal s (t _k) be sent out, and at least one compensated measurement group, in two calibration steps, adjust calibrating signal s (t with at least one predetermined backoff coefficient _k) in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k).Two calibration steps are subdivided into first calibration steps and second calibration steps.In first calibration steps, adjust calibrating signal with the first compound offset, and make the output signal and the described calibrating signal s (t of detector circuit _k) harmonic wave be associated, to produce the first compound compensated measurement result.In second calibration steps, adjust calibrating signal s (t with the second compound offset _k), and make the output signal and the described calibrating signal s (t of detector circuit _k) described harmonic wave be associated, to produce the second compound compensated measurement result.Next, determine next optimal compensation value of at least one compound penalty coefficient at each compound offset and each compound compensated measurement result.

This calibration steps that reduces to two calibration measurement steps causes obtaining the simple I/Q modulator of handling fast to use in the predetermined backoff coefficient calibration transmitter, and this predetermined backoff coefficient is to amplitude and/or phase place is unbalanced and other signal attenuation of DC skew or hope compensation compensates.Advantageously, this calibration process is based on linear compensation, and described linear compensation allows the quantity in calibration measurement stage is reduced to only surplus two calibration phases describing after a while.

According to an aspect of the present invention, the compound I/Q penalty coefficient of one of penalty coefficient expression I/Q compensation.For complete calibration steps, different predetermined compound I/Q offsets is applied to thick I/Q penalty coefficient and thin I/Q penalty coefficient.Other penalty coefficient is represented thick DC penalty coefficient and thin DC penalty coefficient.In this calibration steps, two offsets are applied to each penalty coefficient.

In other words: one of I/Q compensation or DC compensation are provided or the two all is provided, and in first calibration steps, all adjust calibrating signal with the first compound offset.In this step, the output signal of detector circuit is associated with the harmonic wave of described calibrating signal, for example, be associated with second harmonic, produce the first compound I/Q compensated measurement result thus, perhaps be associated, produce the first compound DC compensated measurement result thus with first harmonic (=fundamental frequency).In second calibration steps, adjust calibrating signal with the second compound offset.In this step, the output signal of detector circuit is associated with the described harmonic wave of calibrating signal, for example, be associated with second harmonic, produce the second compound I/Q compensated measurement result thus, perhaps be associated, produce the second compound DC compensated measurement result thus with first harmonic (=fundamental frequency).Determine next optimal compensation value according to described compound offset that obtains in the following manner and described compound compensated measurement result:

Compensate for the I/Q that carries out with I/Q penalty coefficient C:

C _n＝(u _n，2·C _n，1-u _n，1·C _n，2)/(u _n，2-u _n，1)。

Compensate for the thick DC that carries out with thick DC penalty coefficient E:

E _n＝(v _n，2·E _n，1-v _n，1·E _n，2)/(v _n，2-v _n，1)。

Compensate for the thin DC that carries out with thin DC penalty coefficient D:

D _n＝(w _n，2·D _n，1-w _n，1·D _n，2)/(w _n，2-w _n，1)。

In another embodiment of the present invention, provide one group of calibration measurement to each penalty coefficient.In a complicated embodiment, in thick calibration measurement group and thin calibration measurement group, progressively carry out the compensation of and DC skew unbalanced to I/Q.For example, the thick calibration measurement group being used for thick I/Q compensation is provided with an I/Q offset according to positive predetermined constant, and provides each compound thick I/Q compensated measurement to average in the cycle of predetermined number.And, according to negative predetermined constant the 2nd I/Q offset is set, and provides each compound thick I/Q compensated measurement in the cycle of subscribing.Next, determine next optimum thick I/Q offset with described I/Q offset and described compound thick I/Q measurement result.Be used for the first calibration measurement group that thin I/Q compensates, providing the first compound thin I/Q offset with optimal value before and positive predetermined constant, and provide the second compound thin I/Q offset with optimal value and negative predetermined constant before.

Carry out each calibration measurement group to ask average at identical predetermined period.Optionally or other be to carry out the calibration measurement group to ask average at different predetermined period.These different cycles that are used for the offset of definite each penalty coefficient allow the integral calibration method at thin compensation and coarse compensation.As preferred embodiment, the predetermined period of thick calibration measurement group is less than the predetermined period of thin calibration measurement group.For example, for thick calibration measurement group, the predetermined period that is used to ask average is set to 8 cycles, and for thin calibration measurement group, is used for average predetermined period and is set to 64 cycles.This allows to have in easier mode the integral calibration of the thin calibration and the thick calibration of I/Q modulator.

In another embodiment of the present invention,, has the scheduled justice of value scope of maximum offset and minimum offset for each penalty coefficient.For the retention value scope, observe next optimal value.Under the real part or the situation of imaginary part above the restriction of set-point scope of next optimal value, next optimal value is set to given maximum offset or minimum offset.

And, can determine the offset of penalty coefficient at (for example, under different frequency conditions and/or the temperature conditions and/or under the operating state that is changing) under the different conditions of work.

The configuration compensation deals compensate one or more unbalanced.For example, one of penalty coefficient compensation in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k) in amplitude and phase place unbalanced.Other penalty coefficient compensation in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k) in direct current offset.

About being used for the system of Simulation with I/Q modulator of calibration transmitter, solve problem of the present invention with the following methods:

Baseband processor is used for generation and has in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k) the calibrating signal s (t as input signal _k),

Digital compensation circuit is used for adjusting described in-phase signal s at two calibration steps with at least one compound penalty coefficient _I(t _k) and described orthogonal signalling s _Q(t _k),

The I/Q modulator is used to modulate in-phase signal and the orthogonal signalling through adjusting through adjusting, and produces RF output signal s _RF(t),

The analog detector circuit, its be couple to the I/Q modulator and with described calibrating signal s (t _k) harmonic wave H ₁Or H ₂In at least one be associated, thereby for described two calibration steps provide the duplex measurement result, and

Determine circuit, be used for determining next optimal compensation value of compound penalty coefficient, with to in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k) carry out predistortion.

And this system comprises digital to analog converter, and described digital to analog converter is coupled between compensating circuit and the Simulation with I/Q modulator, and described digital to analog converter is with the in-phase signal s of numeral _I(t _k) and digital orthogonal signalling s _Q(t _k) be converted to the Simulation with I baseband signal and simulate the Q baseband signal.

In a preferred embodiment, described detector circuit is to be used for determining RF output signal s _RFThe power detector of power output (t).Detection and definite circuit comprise makes the RF output signal s that is determined _RF(t) digitized analog to digital converter.Analog to digital converter and described detector circuit couple.Digitized signal is sent to described definite circuit, and described definite circuit for example is the digital signal processor that is couple to described detector circuit, thereby determines the value of correlative compensation coefficient.

Description of drawings

Fig. 1 shows the function diagram of radiating portion of the system of the Simulation with I/Q modulator that is used for calibration transmitter, and transmitter comprises compensating circuit and I/Q modulator,

Fig. 2 shows the detection of the system that is used to calibrate described Simulation with I/Q modulator and the function diagram of determining section, comprises detector circuit and definite circuit in this part.

Embodiment

The present invention will be described in more detail.Particularly, will describe the present invention with the example model that is used for detector circuit, described detector circuit comprises power detector.

Fig. 1 shows and is used to calibrate for example function diagram of the system of the Simulation with I/Q modulator 2 of direct upconversion transmitter 3 with compensating circuit 4.Transmitter 3 can be used in the radio communication equipment such as WLAN transmitter or transceiver, and described radio communication equipment can be integrated in several electronic equipments, for example is integrated in the portable computer, in the mobile phone, in the digital camera, or the like.

Radiating circuit 1 comprises baseband processor 5, described compensating circuit 4, a pair of digital to analog converter 6, described I/Q modulator 2 and antenna 7.Baseband processor 5 can be the treatment facility or the logical circuit of for example digital signal processor, central processing unit or some other types.

Baseband processor 5 produces has in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k) digital input signals s (t _k), be used for carrying out RF and send by antenna 7.

In order to following equation in compensating circuit 4 with different penalty coefficient C _I/Q, D _I/QAnd E _I/QAdjust in-phase signal s _I(t _k) and orthogonal signalling s _Q(t _k):

d _I(t _k)＝C _I*s _I(t _k)+s _I(t _k)+D _I

d _Q(t _k)＝C _Q*s _Q(t _k)+s _Q(t _k)+D _Q

Wherein, d _I(t _k) and d _Q(t _k) be to have produced analog output signal a _I(t) and a _QThe digital input signals of digital to analog converter 6 (t); C _IAnd C _QIt is the coefficient that is used for the unbalanced compensation of I/Q; D _IAnd D _QIt is the coefficient that is used for the thin I/Q migration of numeral.

Thereafter, by a pair of digital to analog converter 6 with adjusted figure in-phase signal s _I(t _k) and adjusted figure orthogonal signalling s _Q(t _k) be transformed into analog domain, and they are fed to I/Q modulator 2 are used to carry out direct up-conversion.

Described I/Q modulator 2 comprises analog D C offset compensation circuit 15, and it is described by following equation:

c _I(t)＝a _I(t)+V*E _I

c _Q(t)＝a _Q(t)+V*E _Q

Wherein, E _IAnd E _QBe the coefficient that is used to simulate thick DC migration, and V has described the DC migration characteristic of digital to analog converter 23.

Although thick DC penalty coefficient E _IAnd E _QAnd thin DC penalty coefficient D _IAnd D _QCompensated identical decay, that is, the DC skew advantageously has the two.There is not thick DC penalty coefficient E _IAnd E _QSituation under, thin DC penalty coefficient D _IAnd D _QThereby the dynamic range of the excessive digital to analog converter 6 that becomes will be reduced.

The output signal c of compensating circuit 15 _I(t) and c _Q(t) be fed to frequency mixer 18 and 19, frequency mixer 18 and 19 operates in under the RF carrier frequency of local oscillator 8 and produce RF output signal s by antenna 7 emissions _RF(t).In addition, such as other parts of amplifier, filter etc., for example low pass filter can be included in the radiating circuit 1.

Now penalty coefficient C will be described in more detail _I/Q, D _I/QAnd/or E _I/QDetermine:

Fig. 2 shows the detection of the system that is used to calibrate described Simulation with I/Q modulator 2 and the function diagram of determining section, and it comprises detector circuit 20 and definite circuit 21.

Described analog detector circuit 20 can directly be couple to I/Q modulator 2.In a preferred embodiment, described detector circuit 20 is to be used for determining RF output signal s _RFThe power detector 22 of power output (t).Calibration steps is robusts with respect to the special characteristic of power detector 22,, does not consider that detector is linear envelope detector or logarithmic envelope detector that is.Detection and definite circuit comprise the analog to digital converter 24 that is couple to described detector circuit 20.Analog to digital converter 24 is digital signal p (t with the analog detector conversion of signals _k).Digitized signal p (t _k) be fed to described definite circuit 21, determine that circuit 21 for example is the digital signal processor that is couple to described detector circuit 20, be used for determining one or more correlative compensation coefficient C _{I, Q}, D _{I, Q}And E _{I, Q}Value.

When carrying out the calibration measurement group, baseband processor 5 sends according to following formula has frequency f ₀Calibrating signal s (t _k):

S _I(t _k)＝A·cos(2π·f ₀·t _k)，

s _Q(t _k)＝A·sin(2π·f ₀·t _k).

For the DC offset measurement that is used for determining DC migration coefficient D and E,, determine that circuit 21 is with power detector signal p (t according to following formula _k) with identical frequency f ₀Relevant, especially with first harmonic H ₁(=1f ₀, fundamental frequency) relevant:

$v_I,w_I=\underset{k=0}{\overset{\mathrm{NM}-1}{\mathrm{\Σ}}}p\left(t_k\right)\·\cos (2\mathrm{\π}\·f_0\·t_k),$

$v_Q,w_Q=\underset{k=0}{\overset{\mathrm{NM}-1}{\mathrm{\Σ}}}p\left(t_k\right)\·\sin (2\mathrm{\π}\·f_0\·t_k),$

Wherein, M has frequency f ₀Calibrating signal s (t _k) the number of samples in single cycle, and N is used to the periodicity of asking average; V and w are the measurement results to penalty coefficient E and D.

In possible embodiment of the present invention, sample rate is 20MHz (that is t, _K+1-t _k=50ns), frequency f ₀Be that 312.5kHz and hits M are 64.The periodicity N that is used to ask average can be different.

For the unbalanced compensated measurement of I/Q that is used for determining I/Q penalty coefficient C, determine that circuit 21 is with power detector signal p (t _k) and frequency f ₀Relevant, especially with second harmonic H ₂(=2f ₀) relevant:

$u_I=\underset{k=0}{\overset{\mathrm{NM}-1}{\mathrm{\Σ}}}p\left(t_k\right)\·\cos (4\mathrm{\π}\·f_0\·t_k),$

$u_Q=\underset{k=0}{\overset{\mathrm{NM}-1}{\mathrm{\Σ}}}p\left(t_k\right)\·\sin (4\mathrm{\π}\·f_0\·t_k),$

In order to describe the calculating that next optimal compensation coefficient C, D and/or E are carried out, advantageously introduce composite symbol:

I/Q compensates C=C _I+ j*C _Q,

Thick DC compensation E=E _I+ j*E _Q,

Thin DC compensation D=D _I+ j*D _Q,

I/Q measurement result u=u _I+ j*u _Q,

Thick DC measurement result v=v _I+ j*v _Q,

Thin DC measurement result w=w _I+ j*w _Q

For I/Q compensated measurement n, two compound I/Q offset C _{N, 1}And C _{N, 2}Be employed, and corresponding I/Q compensated measurement result is measured.Advantageously, I/Q offset C _{N, 1}And C _{N, 2}Be set up as follows:

C _n，1＝C _m+ΔC _n

C _n，2＝C _m-ΔC _n

Wherein, C _mBe last optimal value, and Δ C _nIt is predetermined constant.

Thereafter, next optimum I/Q offset C _nBe presented as follows:

C _n＝(u _n，2·C _n，1-u _n，1·C _n，2)/(u _n，2-u _n，1)。

For thick DC compensation, with identical formula, just I/Q penalty coefficient C is substituted by thick DC penalty coefficient E:

E _n＝(v _n，2·E _n，1-v _n，1·E _n，2)/(v _n，2-v _n，1)。

For thin DC compensation, with identical formula, just I/Q penalty coefficient C is substituted by thin DC penalty coefficient D:

D _n＝(w _n，2·D _n，1-w _n，1·D _n，2)/(w _n，2-w _n，1)。

Whole offset C _I/Q, D _I/QAnd/or E _I/QBe the real number in the following specific valid value range:

C _min＜＝C _I，C _Q＜＝C _max，

D _Min＜=D _I, D _Q＜=D _MaxAnd/or

E _min＜＝E _I，E _Q＜＝E _max。

In order to be no more than these restrictions, the real part of next optimal value (for example, C _{N, I}) and imaginary part (for example, C _{N, Q}) by being checked at described restriction, and if surpassed restriction then described real part and imaginary part are saturated, that is, if actual value＞C _Max, then be set to for example C _MaxIf, perhaps actual value＜C _Min, then be set to C _MinIn a possible embodiment, described restriction is presented as follows:

C _min＝-512，C _max＝511，

D _Min=-1024, D _Max=1023 and/or

E _min＝-15，E _max＝15。

And, under calibration mode according to the present invention, be each penalty coefficient C _I/Q, D _I/QAnd E _I/QProvide a plurality of calibration measurement groups-one or more groups; Each group in the described calibration measurement group is all at each coefficient C _I/Q, D _I/QAnd E _I/QComprise out a calibration steps.Particularly:

1. initialization

All penalty coefficient is set to 0:

C is set ₀=0, D ₀=0, E ₀=0.

2. thick DC compensation (=the first calibration measurement group)

E is set _1,1=Δ E ₁, be used to the N that asks average ₁Cycle is measured v _1,1(=the first calibration steps),

E is set _1,2=-Δ E ₁, be used to the N that asks average ₁Cycle is measured v _1,2(=the second calibration steps),

Next optimal value E is set ₁=Sat{[v _1,2E _1,1-v _1,1E _1,2]/(v _1,2-v _1,1)

3. thick I/Q compensation (=the second calibration measurement group)

C is set _2,1=Δ C ₂, be used to the N that asks average ₂Cycle is measured u _2,1(=the first calibration steps),

C is set _1,2=-Δ C ₂, be used to the N that asks average ₂Cycle is measured u _2,2(=the second calibration steps),

Next optimal value C is set ₂=Sat{[u _2,2C _2,1-u _2,1C _2,2]/(u _2,2-u _2,1)

4. thin DC compensation (=the three calibration measurement group)

D is set _3,1=Δ D ₃, be used to the N that asks average ₃Cycle is measured w _3,1(=the first calibration steps),

D is set _3,2=-Δ D ₃, be used to the N that asks average ₃Cycle is measured w _3,2(=the second calibration steps),

Next optimal value D is set ₃=Sat{[w _3,2D _3,1-w _3,1D _1,2]/(w _3,2-w _3,1)

5. thin I/Q compensation (=the four calibration measurement group)

C is set _4,1=C ₂+ Δ C ₄, be used to the N that asks average ₄Cycle is measured u _4,1(=the first calibration steps),

C is set _4,2=C ₂-Δ C ₂, be used to the N that asks average ₄Cycle is measured u _4,2(=the second calibration steps),

Next optimal value C is set ₄=Sat{[u _4,2C _4,1-u _4,1C _4,2]/(u _4,2-u _4,1)

Can carry out each calibration measurement group with the identical predetermined period N that is used to ask average.Preferably, the cycle that is used to ask average for thin be different with coarse compensation.In one embodiment, use following cycle N ₁To N ₄:

N ₁=N ₂=8, be used for thick calibration measurement group, and

N ₃=N ₄=64, be used for thin calibration measurement group.

This linear compensation method with predetermined value reduces to two measurements with the quantity of calibration measurement.Usually, further iteration can not improved this result.

And, can determine and calculating penalty coefficient C at (for example, under different frequency conditions and/or the temperature conditions and/or under the operating state that is changing) under the different conditions of work _I/Q, D _I/QAnd/or E _I/Q

In another alternate embodiment, baseband processor 5 and definite circuit 21 can be same digital signal processing units, such as the processing unit or the logical circuit digital processing element of digital signal processor, central processing unit or some other types.

Claims (22)

1. method that is used for the Simulation with I/Q modulator (2) of calibration transmitter (3), described transmitter (3) comprises compensating circuit (4), detector circuit (20) and definite circuit (21), wherein, calibrating signal (s (t _k)) be sent out, and at least one compensated measurement group (u _n, v _n, w _n) in, (C, D E) adjust calibrating signal (s (t with at least one predetermined backoff coefficient in two calibration steps _k)) in-phase signal (s _I(t _k)) and orthogonal signalling (s _Q(t _k)), wherein:

In first calibration steps, with the first compound offset (C _{N, 1}, D _{N, 1}, E _{N, 1}) adjustment calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) harmonic wave (H ₁, H ₂) be associated, to produce the first compound compensated measurement result (u _{N, 1}, v _{N, 1}, w _{N, 1}),

In second calibration steps, with the second compound offset (C _{N, 2}, D _{N, 2}, E _{N, 2}) adjustment calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) described harmonic wave (H ₁, H ₂) be associated, to produce the second compound compensated measurement result (u _{N, 2}, v _{N, 2}, w _{N, 2}),

According to described compound offset (C _{N, 1}, C _{N, 2}, D _{N, 1}, D _{N, 2}, E _{N, 1}, E _{N, 2}) and described compound compensated measurement result (u _{N, 1}, u _{N, 2}, v _{N, 1}, v _{N, 2}, w _{N, 1}, w _{N, 2}) determine compound penalty coefficient (C, D, next optimal compensation value (C E) _n, D _n, E _n).

2. the method for claim 1, wherein one of described penalty coefficient is represented the compound I/Q penalty coefficient (C) that I/Q compensates.

3. method as claimed in claim 2, wherein,

In first calibration steps, with the first compound I/Q offset (C _{N, 1}) adjust calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) second harmonic (H ₂) be associated, to produce the first compound I/Q compensated measurement result (u _{N, 1}),

In second calibration steps, with the second compound I/Q offset (C _{N, 2}) adjust calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) second harmonic (H ₂) be associated, to produce the second compound I/Q compensated measurement result (u _{N, 2}),

According to through type C _n=(u _{N, 2}C _{N, 1}-u _{N, 1}C _{N, 2})/(u _{N, 2}-u _{N, 1}) the described compound I/Q offset (C that provides _{N, 1}, C _{N, 2}) and described compound I/Q compensated measurement result (u _{N, 1}, u _{N, 2}) determine next optimum I/Q offset (C _n):.

4. as claim 2 or 3 described methods, wherein, be used for the thick calibration measurement group that thick I/Q compensates:

According to positive predetermined constant (Δ C _n) an I/Q offset (C is set _{N, 1}),

According to negative predetermined constant (Δ C _n) the 2nd I/Q offset (C is set _{N, 2}),

At the predetermined period (N that is used to ask average ₂) go up and determine each first compound thick I/Q measurement result (u _{N, 1}, u _{N, 2}),

Determine through type C _n=(u _{N, 2}C _{N, 1}-u _{N, 1}C _{N, 2})/(u _{N, 2}-u _{N, 1}) next optimum thick I/Q offset (C of providing _n).

5. as the described method of one of claim 2 to 4, wherein, be used for the thin calibration measurement group that thin I/Q compensates:

Setting is by formula C _{N, 1}=C _N-1,1+ Δ C _nAn I/Q offset (C who provides _{N, 1}),

Setting is by formula C _{N, 2}=C _N-1,2-Δ C _nThe 2nd I/Q offset (C that provides _{N, 2}),

At the predetermined period (N that is used to ask average ₄) go up and determine each first compound thin I/Q measurement result (u _{N, 1}, u _{N, 2}),

Determine through type C _n=(u _{N, 2}C _{N, 1}-u _{N, 1}C _{N, 2})/(u _{N, 2}-u _{N, 1}) next optimum thin I/Q offset (C of providing _n).

6. as the described method of one of claim 1 to 5, wherein, another expression in the described penalty coefficient is used for the compound thick DC penalty coefficient (E) of thick DC compensation.

7. method as claimed in claim 6, wherein,

In first calibration steps, with the first compound thick DC offset (E _{N, 1}) adjust calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) first harmonic (H ₁) be associated, to produce the first compound thick DC compensated measurement result (v _{N, 1}),

In second calibration steps, with the second compound thick DC offset (E _{N, 2}) adjust calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) first harmonic (H ₁) be associated, to produce the second compound thick DC compensated measurement result (v _{N, 2}),

According to through type E _n=(v _{N, 2}E _{N, 1}-v _{N, 1}E _{N, 2})/(v _{N, 2}-v _{N, 1}) the described compound thick DC offset (E that provides _{N, 1}, E _{N, 2}) and described compound thick DC compensated measurement result (v _{N, 1}, v _{N, 2}) determine next optimum thick DC offset (E _n).

8. as claim 6 or 7 described methods, wherein, be used for the thick calibration measurement group that thick DC compensates:

According to positive predetermined constant (Δ E _n) the first compound thick DC offset (E is set _{N, 1}),

According to negative predetermined constant (Δ E _n) the second compound thick DC offset (E is set _{N, 2}),

At the predetermined period (N that is used to ask average ₁) go up and determine each first compound thick DC compensated measurement result (v _{N, 1}, v _{N, 2}),

Determine through type E _n=(v _{N, 2}E _{N, 1}-v _{N, 1}E _{N, 2})/(v _{N, 2}-v _{N, 1}) next optimum thick DC offset (E of providing _n).

9. as the described method of one of claim 1 to 8, wherein, another expression in the described penalty coefficient is used for the compound thin DC penalty coefficient (D) of thin DC compensation.

10. method as claimed in claim 9, wherein,

In first calibration steps, with the first compound thin DC offset (D _{N, 1}) adjust calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) first harmonic (H ₁) be associated, to produce the first compound thin DC compensated measurement result (w _{N, 1}),

In second calibration steps, with the second compound thin DC offset (D _{N, 2}) adjust calibrating signal (s (t _k)), and make the output signal and the described calibrating signal (s (t of detector circuit (20) _k)) first harmonic (H ₁) be associated, to produce the second compound thin DC compensated measurement result (w _{N, 2}),

According to through type D _n=(w _{N, 2}D _{N, 1}-w _{N, 1}D _{N, 2})/(w _{N, 2}-w _{N, 1}) the described compound thin DC offset (D that provides _{N, 1}, D _{N, 2}) and described compound thin DC compensated measurement result (w _{N, 1}, w _{N, 2}) determine next optimum thin DC offset (D _n).

11., wherein, be used for the thin calibration measurement group that thin DC compensates as claim 9 or 10 described methods:

According to positive predetermined constant (Δ D _n) the first compound thin DC offset (D is set _{N, 1}),

According to negative predetermined constant (Δ D _n) the second compound thin DC offset (D is set _{N, 2}),

At the predetermined period (N that is used to ask average ₃) go up and determine that each first compound DC measures (w _{N, 1}, w _{N, 2}),

Determine through type D _n=(w _{N, 2}D _{N, 1}-w _{N, 1}D _{N, 2})/(w _{N, 2}-w _{N, 1}) next optimum thin DC offset (D of providing _n).

12. the described method of one of claim as described above, wherein, at identical predetermined period (N) or at different predetermined period (N ₁, N ₂, N ₃, N ₄) middle each calibration measurement group (u that carries out _n, v _n, w _n).

13. the described method of one of claim as described above, wherein, (C, D E) are set to 0 with each compound penalty coefficient in initialization step.

14. the described method of one of claim as described above, wherein, described thick calibration measurement group (u _n, v _n) predetermined period (N ₁, N ₂) be lower than described thin calibration measurement group (u _n, w _n) predetermined period (N ₃, N ₄).

15. the described method of one of claim as described above, wherein, for each penalty coefficient (C _I/Q, D _I/Q, E _I/Q) use the maximum offset and the minimum offset that provide by following formula to come predefine value scope:

C _min＜＝C _I，C _Q＜＝C _max，

D _Min＜=D _I, D _Q＜=D _MaxAnd/or

E _min＜＝E _I，E _Q＜＝E _max

Wherein, if described coefficient (C _I/Q, D _I/Q, E _I/Q) one of the real part of next optimal value or the restriction of one of imaginary part be exceeded, then corresponding real part or imaginary part are set to each maximum offset or minimum offset.

16. the described method of one of claim as described above, wherein, under different conditions of work, for example, under different frequency conditions and/or the temperature conditions and/or under the operating state that is changing, determine described penalty coefficient (C, D, E).

17. a system that is used for the Simulation with I/Q modulator (2) of calibration transmitter (3) comprises:

Baseband processor (5) is used for generation and has in-phase signal (s _I(t _k)) and orthogonal signalling (s _Q(t _k)) (s (t of the calibrating signal as input signal _k)),

Digital compensation circuit (4) is used for that (C, D E) adjust described in-phase signal (s with at least one compound penalty coefficient at two calibration steps _I(t _k)) and described orthogonal signalling (s _Q(t _k)),

I/Q modulator (2) is used to modulate the in-phase signal (s through adjusting _I(t _k)) and the orthogonal signalling (s through adjusting _Q(t _k)), and be used to produce RF output signal (s _RF(t)), analog detector circuit (20), its be couple to I/Q modulator (2) and with described calibrating signal (s (t _k)) harmonic wave at least one be associated, thereby provide the duplex measurement result (u for described two calibration steps _n, v _n, w _n), and

Determine circuit (21), be used for determining described compound penalty coefficient (C, D, next optimal compensation value (C E) _n, D _n, E _n), with to described in-phase signal (s _I(t _k)) and described orthogonal signalling (s _Q(t _k)) carry out predistortion.

18. system as claimed in claim 17 wherein, is coupled in digital to analog converter (24) between compensating circuit (4) and Simulation with I/Q modulator (2) with the in-phase signal (s of numeral _I(tk)) and the numeral orthogonal signalling (s _Q(t _k)) be converted to the Simulation with I baseband signal and simulate the Q baseband signal.

19. as claim 17 or 18 described systems, wherein, described detector circuit (20) is to be used for determining RF output signal (s _RFThe power detector of power output (t)) (22).

20. as the described system of one of claim 17 to 19, wherein, described detector circuit (20) is couple to described analog to digital converter (24), the RF output signal (s of described analog to digital converter (24) to determining _RF(t)) power output is carried out digitlization.

21. system as claimed in claim 20, wherein, described definite circuit (21) is the digital signal processor that is couple to described detector circuit (20) by described analog to digital converter (24), and it is used for determining optimal compensation value (C _n, D _n, E _n).

22. as the described system of one of claim 17 to 21, wherein, described definite circuit (21) is couple to described compensating circuit (4).

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