CN101505165B - Audio encoding and decoding module for mobile terminal - Google Patents

Audio encoding and decoding module for mobile terminal Download PDF

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Publication number
CN101505165B
CN101505165B CN2008101882210A CN200810188221A CN101505165B CN 101505165 B CN101505165 B CN 101505165B CN 2008101882210 A CN2008101882210 A CN 2008101882210A CN 200810188221 A CN200810188221 A CN 200810188221A CN 101505165 B CN101505165 B CN 101505165B
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sequence number
pins
channel
pin
path
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CN101505165A (en
Inventor
刘彬
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BEIJING MOBILEXP TECHNOLOGY Co Ltd
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BEIJING MOBILEXP TECHNOLOGY Co Ltd
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  • Telephone Function (AREA)
  • Headphones And Earphones (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)
  • Transceivers (AREA)
  • Noise Elimination (AREA)

Abstract

The invention provides an audio coding and decoding module of a mobile terminal, which aims to solve the problems of electromagnetic interference and electromagnetic compatibility when an audio coding and decoding chip is integrated into a module. The problems of the electromagnetic interference and the electromagnetic compatibility are eliminated or reduced by reasonably arranging pins. The audio coding and decoding module can be widely applied to the mobile terminals.

Description

The audio encoding and decoding module of portable terminal
Technical field
The invention belongs to mobile communication and audio encoding and decoding technology.
Background technology
Mostly the hardware structure of existing portable terminal is each components and parts is directly connected on the mainboard, and the audio encoding and decoding chip that in much novel portable terminal, has also is directly to be arranged on the mainboard of portable terminal.The drawback of this set scheme need be carried out integrated testability after being the audio encoding and decoding chip is connected in mainboard, if the problem of testing out is made amendment, need comprehensively revise mainboard.When on the portable terminal mainboard multiple components and parts being set (this is ubiquitous situation), the test repeatedly of multimode can cause the R&D cycle long, and R&D costs are high.
Audio encoding and decoding chip and interlock circuit are integrated into the module that can be connected in the portable terminal mainboard; Test in the R&D process can be that unit carries out with the module; This has just saved R&D cycle and R&D costs greatly; Upgrading or personalized customization for module is follow-up are also highly beneficial, can be to the big influence of the whole generation of portable terminal.
In portable terminal, the audio encoding and decoding chipset is become module, the problem that needs solve be through to the rational layout of the pin of module to weaken or to eliminate electromagnetic interference (EMI) and the electromagnetic compatibility (EMC) between each circuit.
Summary of the invention
The electromagnetic interference and the electromagnetic compatibility problem that run into when the audio encoding and decoding chipset being become module in order to solve; The invention provides a kind of audio encoding and decoding module of portable terminal, reduce or eliminated the electromagnetic interference between each pin signal of module through reasonable ordering to pin.
Technical scheme of the present invention is following:
The audio encoding and decoding module of portable terminal comprises the package body structure of built-in audio encoding and decoding chip and the pin of packaging body periphery, and the layout of said pin comprises the following sequence of ordering successively:
Sequence number 1 pin, receiver positive output path;
Sequence number 2 pins, receiver negative output path;
Sequence number 3 pins, the analog signal output channel;
Sequence number 4 pins, the analog signal output channel;
Sequence number 5 pins, IIS bus data input channel;
Sequence number 6 pins, IIS bus data output channel;
Sequence number 7 pins, PCM synchronizing signal path;
Sequence number 8 pins, the voice signal input channel;
Sequence number 9 pins, the voice signal input channel;
Sequence number 10 pins, the analog signal input channel;
Sequence number 11 pins, the analog signal input channel;
Sequence number 12 pins, Mike's positive input path;
Sequence number 13 pins, Mike bears input channel;
Sequence number 14 pins, earphone Mike input channel;
Sequence number 15 pins, earphone Mike interrupt signal path;
Sequence number 16 pins, the PCM data output channel;
Sequence number 17 pins, PCM data input channel;
Sequence number 18 pins, the iic bus data path;
Sequence number 19 pins, iic bus clock signal path;
Sequence number 20 pins, IIS bus left and right acoustic channels clock signal path;
Sequence number 21 pins, PCM clock signal path;
Sequence number 22 pins, IIS bus clock signal path;
Sequence number 23 pins, the master clock signal path;
Sequence number 24 pins, OP switching signal path;
Sequence number 25 pins, loud speaker R channel positive output path;
Sequence number 26 pins, loud speaker R channel negative output path;
Sequence number 27 pins, OP gain signal path;
Sequence number 28 pins, receiver switching signal path;
Sequence number 29 pins, loud speaker L channel negative output path;
Sequence number 30 pins, loud speaker L channel positive output path;
Sequence number 31 pins, earphone R channel output channel;
Sequence number 32 pins, earphone L channel output channel.
Said packaging body is rectangle or square tabular body, and rectangle or foursquare four edges are respectively edge a, edge b, edge c, edge d; Said pin is arranged at the edge of rectangle or square packaging body, and sequence number 1 to sequence number 9 pins are arranged at packaging body with one edge a; Sequence number 10 to sequence number 17 pins are arranged at packaging body with one edge b; Sequence number 18 to sequence number 23 pins are arranged at packaging body with one edge c; Sequence number 24 to sequence number 32 pins are arranged at packaging body with one edge d.
Technique effect of the present invention:
Technical scheme of the present invention adopts following Several principles to realize the object of the invention:
1, nearby principle: paired differential signal path pin be set together make interact between the signal (EMI and EMC, as follows) little; The pin that need be connected with the outer same circuit of audio encoding and decoding module is provided with nearby, convenient common (in pairs) cabling.
2, insulation blocking: on the pin next door of transmitting signal ground wire is set and isolates, thereby the mutual electromagnetic that reduces between this pin holding wire and other holding wires is disturbed.
Can carry out detailed explanation to illustrate its technique effect to concrete pin arrangement in following embodiment part.
Description of drawings
Fig. 1 is the pin layout of the audio encoding and decoding module of portable terminal of the present invention.
Fig. 2 is the schematic block circuit diagram of the audio encoding and decoding module of portable terminal of the present invention.
Embodiment
The present invention arranges the problem that can solve electromagnetic interference (EMI) and electromagnetic compatibility (EMC) through rational pin.
Below specify technical scheme of the present invention with embodiment shown in Figure 1.The layout of concrete audio encoding and decoding module pin is the form of face as follows.
Number of pins among Fig. 1 Corresponding pin sequence number in the technical scheme of the present invention Pin is described Remarks
1 Sequence number 1 pin Receiver positive output path; Analog signal output (AnalogueOutput) Receiver positive output
2 Sequence number 2 pins Receiver negative output path; Analog signal output (AnalogueOutput) The receiver negative output
3 Do not have corresponding The ground wire pin
4 Sequence number 3 pins Analog signal output channel (Analogue Output) Monophony simulation output (Monoanalogue Output)
5 Sequence number 4 pins Analog signal output channel (Analogue Output) Monophony simulation output (Monoanalogue Output)
6 Do not have corresponding Power pin Be the master chip power supply
7 Sequence number 5 pins IIS bus data input channel; Numeral input (Digital Input) IIS data input bus (DIB) (IIS-busserial data input)
8 Sequence number 6 pins IIS bus data output channel; Numeral output (Digital Output) IIS data-out bus (IIS-busserial data output)
9 Sequence number 7 pins PCM synchronizing signal path; Numeral input (Digital input) Speech frame is (Voice CodecFrame Sync) synchronously
10 Sequence number 8 pins Voice signal input channel (SoundSignal Input) Audio input signal (SoundSignal Input)
11 Sequence number 9 pins Voice signal input channel (SoundSignal Input) Audio input signal (SoundSignal Input)
12 Sequence number 10 pins The analog signal input channel; Voice signal input channel (AnalogueInput) Transmission forward differential received signal (RX mono differentialinput positive signal)
13 Sequence number 11 pins The analog signal input channel; Voice signal input channel (AnalogueInput) Transmission negative sense differential received signal (RX mono differentialinput negative signal)
14 Do not have corresponding The ground wire pin
15 Sequence number 12 pins Mike's positive input path; Analog signal input (Analogue Input) MIC positive input terminal (MicPre-amp Positive input)
16 Sequence number 13 pins Mike bears input channel; Analog signal input (Analogue Input) MIC negative input end (MicPre-amp Negative input)
17 Do not have corresponding The ground wire pin
18 Sequence number 14 pins Earphone Mike input channel; Analog signal input (Analogue Input) Earphone Mike imports (HP MICPre-amp input)
19 Sequence number 15 pins Earphone Mike interrupt signal path; Digital signal output (Digitaloutput) Earphone keystroke interrupts, high effectively (Answer Phone with MICinterrupt.Active High)
20 Sequence number 16 pins The PCM data output channel; Digital signal output (Digital output) Speech simulation-digital translation output (Voice ADC Output)
21 Sequence number 17 pins PCM data input channel; Digital signal input (Digital Input) Speech digit-analog-converted input (Voice DAC Input)
22 Sequence number 18 pins The iic bus data path; Digital signal I/O (Digital Input/Output) IIC data I/O end (Control interface)
23 Sequence number 19 pins Iic bus clock signal path; Digital signal input (Digital Input) IIC clock signal (Control interface)
24 Do not have corresponding The ground wire pin
25 Sequence number 20 pins IIS bus left and right acoustic channels clock signal path; Digital signal I/O (Digital Input/Output) The IIS bus run is selected clock (IIS-bus channel select clock)
26 Do not have corresponding The ground wire pin
27 Sequence number 21 pins PCM clock signal path; Digital signal input (Digital Input) PCM clock (PCM clock)
28 Sequence number 22 pins IIS bus clock signal path; Digital signal I/O (Digital Input/Output) IIS bus clock (IIS-bus serial clock)
29 Do not have corresponding The ground wire pin
30 Sequence number 23 pins The master clock signal path; Digital signal input (Digital Input) The master clock signal (Master Clock Input for Module) of input audio encoding and decoding module
31 Do not have corresponding The ground wire pin
32 Do not have corresponding Power pin (Power supply) The power supply of OP (Power for OP)
33 Sequence number 24 pins OP switching signal path; Digital signal input (Digital Input) Close OP and enable, low effectively (the module Shut Down Active Low)
34 Sequence number 25 pins Loud speaker R channel positive output path; Analog signal output (Analogue Output) Module R channel output (Module output for right Speaker)
35 Sequence number 26 pins Loud speaker R channel negative output path; Analog signal output (Analogue Output) Module R channel output (Module output for right Speaker)
36 Sequence number 27 pins OP gain signal path; Digital signal input (Digital Input) Gain is selected: Low=6dB; High=12dB
37 Sequence number 28 pins Receiver switching signal path; Digital signal input (Digital input) Receiver control, high effectively (Answer with Receiver control. Active high)
38 Sequence number 29 pins Loud speaker L channel negative output path; Analog signal output (Analogue Output) Loud speaker L channel negative output (SPEAKER output for left Speaker)
39 Sequence number 30 pins Loud speaker L channel positive output path; Analog signal output (Analogue Output) Loud speaker L channel positive output (SPEAKER output for left Speaker)
40 Do not have corresponding The ground wire pin
41 Sequence number 31 pins Earphone R channel output channel; Analog signal output (AnalogueOutput) Earphone right wing output (HeadphoneRight Output)
42 Sequence number 32 pins Earphone L channel output channel; Analog signal output (AnalogueOutput) Earphone left side road output (HeadphoneLeft Output)
43-58 Do not have corresponding The ground wire pin
The abbreviation explanation is as follows in the table:
PCM (Pulse Code Modulation----pulse code modulation).
IIS (Inter-IC Sound bus) claim I2S again, is the serial digital audio-frequency bus agreement that PHILIPS Co. proposes.
Iic bus is the abbreviation of English " Inter Integrated Circuit Bus " internal integrate circuit bus, is a kind of data highway system of serial.
OP (Operation Amplifier) is an operational amplifier.
Visible from Fig. 1; The packaging body of audio encoding and decoding module is rectangle or square tabular body; Rectangle or foursquare four edges are respectively edge a, edge b, edge c, edge d (four limits of packaging body among Fig. 1, corresponding order is left, following, right, last four limits among Fig. 1); Said pin is arranged at the edge of rectangle or square packaging body, and sequence number 1 to sequence number 9 pins are arranged at packaging body with one edge a; Sequence number 10 to sequence number 17 pins are arranged at packaging body with one edge b; Sequence number 18 to sequence number 23 pins are arranged at packaging body with one edge c; Sequence number 24 to sequence number 32 pins are arranged at packaging body with one edge d.
Below technical meaning that each pin in the last table is arranged describe (sequence number that institute's foundation be described is a number of pins among Fig. 1).
Pin one and pin two transmit a pair of differential signal, are provided with to meet above-mentioned nearby principle.
Pin 4 and a pair of differential signal of pin 5 transmission, setting meets above-mentioned nearby principle.
Pin 7 is set together with pin 8 and makes things convenient for common cabling, meets above-mentioned nearby principle.
Pin one 0 is set together with pin one 1 and makes things convenient for common cabling.
Pin one 2 and a pair of differential signal of pin one 3 transmission, setting meets above-mentioned nearby principle.
Pin one 5 and a pair of differential signal of pin one 6 transmission, setting meets above-mentioned nearby principle.
Pin one 4 is the ground wire pin with pin one 7, and pin one 5 and pin one 6 are formed above-mentioned insulation blocking.
Pin two 0 closes on pin two 1 convenient common cabling is set.
Between pin two 3, pin two 5, the pin two 7 effect that the ground wire pin plays above-mentioned insulation blocking is set respectively.
Pin 32 is the pins that connect power supply, and for fear of the influence to signal in the pin 33, two edges that both are separately positioned on packaging body are also separated by a distance, reduced influence degree between the two.
Pin 38 and a pair of differential signal of pin 39 transmission, setting meets above-mentioned nearby principle.
Pin 34 and a pair of differential signal of pin 35 transmission, setting meets above-mentioned nearby principle.
Pin 41 and a pair of audio signal of pin 42 transmission, setting meets above-mentioned nearby principle.
Pin 43 is a ground wire to pin 58, and one side is ground connection fully, can increase the bonding strength of module of the present invention and mainboard on the other hand.
Fig. 2 is the schematic block circuit diagram of audio encoding and decoding module of the present invention, and label is the number of pins (number of pins in the corresponding diagram 1) of drawing, and the audio encoding and decoding chip of employing (CODEC among Fig. 2) model is WM8753, and Ou Sheng (WOLFSON) produces.The OP model is LM4674, and state produces half a lifetime.
The layout of the pin among the present invention meets nearby principle and insulation blocking principle, effectively weakens or has eliminated electromagnetic interference (EMI) and the electromagnetic compatibility (EMC) between each circuit through experiment showed.

Claims (1)

1. the audio encoding and decoding module of portable terminal comprises the package body structure of built-in audio encoding and decoding chip and the pin of packaging body periphery, it is characterized in that the layout of said pin comprises the following sequence of ordering successively:
Sequence number 1 pin, receiver positive output path;
Sequence number 2 pins, receiver negative output path;
Sequence number 3 pins, the analog signal output channel;
Sequence number 4 pins, the analog signal output channel;
Sequence number 5 pins, IIS bus data input channel;
Sequence number 6 pins, IIS bus data output channel;
Sequence number 7 pins, PCM synchronizing signal path;
Sequence number 8 pins, the voice signal input channel;
Sequence number 9 pins, the voice signal input channel;
Sequence number 10 pins, the analog signal input channel;
Sequence number 11 pins, the analog signal input channel;
Sequence number 12 pins, Mike's positive input path;
Sequence number 13 pins, Mike bears input channel;
Sequence number 14 pins, earphone Mike input channel;
Sequence number 15 pins, earphone Mike interrupt signal path;
Sequence number 16 pins, the PCM data output channel;
Sequence number 17 pins, PCM data input channel;
Sequence number 18 pins, the iic bus data path;
Sequence number 19 pins, iic bus clock signal path;
Sequence number 20 pins, IIS bus left and right acoustic channels clock signal path;
Sequence number 21 pins, PCM clock signal path;
Sequence number 22 pins, IIS bus clock signal path;
Sequence number 23 pins, the master clock signal path;
Sequence number 24 pins, OP switching signal path;
Sequence number 25 pins, loud speaker R channel positive output path;
Sequence number 26 pins, loud speaker R channel negative output path;
Sequence number 27 pins, OP gain signal path;
Sequence number 28 pins, receiver switching signal path;
Sequence number 29 pins, loud speaker L channel negative output path;
Sequence number 30 pins, loud speaker L channel positive output path;
Sequence number 31 pins, earphone R channel output channel;
Sequence number 32 pins, earphone L channel output channel;
Said packaging body is rectangle or square tabular body, and rectangle or foursquare four edges are respectively edge a, edge b, edge c, edge d; Said pin is arranged at the edge of rectangle or square packaging body, and sequence number 1 to sequence number 9 pins are arranged at packaging body with one edge a; Sequence number 10 to sequence number 17 pins are arranged at packaging body with one edge b; Sequence number 18 to sequence number 23 pins are arranged at packaging body with one edge c; Sequence number 24 to sequence number 32 pins are arranged at packaging body with one edge d;
The layout of said pin is followed the insulation blocking principle: isolate through on the pin next door of transmitting signal ground wire being set, thereby the mutual electromagnetic that reduces between this pin holding wire and other holding wires is disturbed; And two edges through OP power pin and OP switching signal path pin being separately positioned on packaging body are also separated by a distance, reduced influence degree between the two.
CN2008101882210A 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal Expired - Fee Related CN101505165B (en)

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CN200720187364 2007-12-21
CN2008101882210A CN101505165B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal

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CN2008101882225A Expired - Fee Related CN101505166B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal
CN2008101882189A Expired - Fee Related CN101505176B (en) 2007-12-21 2008-12-19 Bluetooth module for mobile terminal
CN200810188223XA Expired - Fee Related CN101505167B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal
CNA2008101882193A Pending CN101505531A (en) 2007-12-21 2008-12-19 Satellite positioning navigation module for mobile terminal
CN2008101882206A Expired - Fee Related CN101505164B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal
CN2008101882210A Expired - Fee Related CN101505165B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal
CN2008101882174A Expired - Fee Related CN101505163B (en) 2007-12-21 2008-12-19 Telephone functional module for mobile terminal
CNA200810188216XA Pending CN101505162A (en) 2007-12-21 2008-12-19 Wireless local area network module for mobile terminal

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CN2008101882225A Expired - Fee Related CN101505166B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal
CN2008101882189A Expired - Fee Related CN101505176B (en) 2007-12-21 2008-12-19 Bluetooth module for mobile terminal
CN200810188223XA Expired - Fee Related CN101505167B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal
CNA2008101882193A Pending CN101505531A (en) 2007-12-21 2008-12-19 Satellite positioning navigation module for mobile terminal
CN2008101882206A Expired - Fee Related CN101505164B (en) 2007-12-21 2008-12-19 Audio encoding and decoding module for mobile terminal

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CNA200810188216XA Pending CN101505162A (en) 2007-12-21 2008-12-19 Wireless local area network module for mobile terminal

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CN102143677B (en) * 2010-01-29 2014-01-22 上海卫星工程研究所 Ground system capable of reducing electromagnetic interference
CN101984725A (en) * 2010-11-17 2011-03-09 广州杰赛科技股份有限公司 Wireless access device and method
TWI727898B (en) * 2019-11-05 2021-05-11 瑞昱半導體股份有限公司 Multi-member bluetooth device be capable of synchronizing audio playback between different bluetooth circuits
CN116936562B (en) * 2023-09-14 2023-12-05 成都爱旗科技有限公司 Chip packaging structure, wiFi6 chip and Internet of things equipment

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CN2888779Y (en) * 2005-07-06 2007-04-11 深圳市融进科技有限公司 GSM mobile phone with GPS

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0382948A1 (en) * 1989-02-14 1990-08-22 Koninklijke Philips Electronics N.V. Supply pin rearrangement for an integrated circuit
CN2171953Y (en) * 1993-06-28 1994-07-13 上海裕利电信有限公司 Numeral subscriber interface device
CN1633228A (en) * 2003-12-24 2005-06-29 上海贝岭股份有限公司 An electromagnetic interference suppressive ground wiring method
CN2888779Y (en) * 2005-07-06 2007-04-11 深圳市融进科技有限公司 GSM mobile phone with GPS

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CN101505162A (en) 2009-08-12
CN101505165A (en) 2009-08-12
CN101505166B (en) 2012-09-05
CN101505166A (en) 2009-08-12
CN101505167A (en) 2009-08-12
CN101505163B (en) 2013-02-20
CN101505167B (en) 2013-05-08
CN101505164A (en) 2009-08-12
CN101505164B (en) 2013-02-20
CN101505176B (en) 2012-09-05
CN101505531A (en) 2009-08-12
CN101505176A (en) 2009-08-12

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