CN101499126A - Image processing apparatus - Google Patents
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- CN101499126A CN101499126A CNA2008100064116A CN200810006411A CN101499126A CN 101499126 A CN101499126 A CN 101499126A CN A2008100064116 A CNA2008100064116 A CN A2008100064116A CN 200810006411 A CN200810006411 A CN 200810006411A CN 101499126 A CN101499126 A CN 101499126A
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Abstract
The invention provides an image processing device which can increase processing ability in condition of CUP or image storage composing with low cost. The device shoots to an electronic part (30), and the image is stored in two image storages (8, 9). A CPU (10) processes image of the area containing a lead wire line (30a) stored in the image storage (8), detects each lead wire end position, CPU (17) and image processing of CPU are parallel, processes the image of a lead wire line (30b) located on the image storage (19) of the area different from the image storage (8) for detecting the lead wire terminal. The image processing device structure can store image in various area in each image storage, processes parallel process by using various CPU decentralization for realizing image processing with high speed and reducing time to identify part.
Description
Technical field
The present invention relates to a kind of image processing apparatus, it implements Flame Image Process by this electronic unit is made a video recording to the electronic unit of being made a video recording in order to detect or discern the position of electronic unit.
Background technology
Current, known with the electronic component mounting apparatus of electro part carrying on substrate.In this electronic component mounting apparatus, for electronic unit is carried assigned position on the substrate with higher precision, to being made a video recording by the electronic unit of the adsorption head of electronic components mounting machine absorption, image to electronic unit is handled, the position probing (detection part center and parts skew) of carrying out electronic unit is a component identification, and, the installation site is proofreaied and correct and carry out component mounting according to its recognition result.
Figure 23 is the block diagram of structure of the image input part of the existing image processing apparatus of expression, (a) is the figure that the structure of a CPU has been used in expression, (b) is the figure that the structure of 2 CPU has been used in expression.
The image input part has with the lower part and constitutes: input circuit 7, and it will be a digital picture by the image transformation of the electronic unit of standard camera 4 or 5 shootings of high-res camera; Video memory 8, its memory mapping are the image of digital picture; And CPU (arithmetic unit) 10,11, its view data to video memory 8 is carried out calculation process.
Current, generally be to adopt the structure of handling by 10 pairs of Flame Image Process computings of a CPU (Figure 23 (a)), in the case, for example exist can parallel processing processing A and these two of treatments B when handling, also be to handle this processing A and treatments B one by one by a CPU.
For increasing and the high precision int of positioning result of the number of electrodes of the high-res of the image after realizing electronic unit made a video recording and electronic unit, it is heavy that the task of this Flame Image Process becomes yet on the other hand.Be that the electronic unit of ball shape is in the spheric electrode parts at electrode for example, spheric electrode number even can surpass 10,000 with existing CPU processing speed, can not satisfy the seeking time of wanting of device.
The structure of the existing image input part shown in Figure 23 (a) needs very high performance CPU, has following problem: can not exist by corresponding CPU, perhaps price is too high.
Therefore, in order to make the Flame Image Process high speed, consider the parallelization of Flame Image Process, shown in Figure 23 (b), propose following structure: CPU 17 also is set except CPU 10, and it is a plurality of making CPU, realize parallel processing (about the dispersion treatment of Flame Image Process, with reference to patent documentation 1, patent documentation 2).
Patent documentation 1: the spy opens flat 8-44678 communique
Patent documentation 2: No. 3646420 communique of patent
Summary of the invention
Yet under the situation of the structure that a plurality of CPU are set, video memory need adopt the structure of the video memory of the high price of having used broader bandwidth in order to bear the visit from CPU.That is to say, consider continually and visit, can not produce conflict, need fast, the higher video memory of Action clock frequency of access time in order to visit by each CPU.If like this, then have following problems: the video memory that satisfies this requirement does not exist, and perhaps price is very high.
Particularly, in the image processing apparatus that adopts in electronic component mounting apparatus, the Flame Image Process load that is used for component identification of not all electronic unit of handling is all very big, and such parts are very limited minorities.For with the bigger processing of infrequently load coupling, prepare the hardware resource of high price, might become the high price device and waste.
The present invention puts in view of the above problems and proposes, and its objective is provides a kind of image processing apparatus, even under its situation with the structure of the CPU of cheapness or image processor, also can improve image-capable.
The present invention's (technical scheme 1) to achieve these goals,
Be a kind of image processing apparatus, its image to the electronic unit that quilt is made a video recording is handled, and carries out the identification of electronic unit, it is characterized in that, is provided with:
The the 1st and the 2nd video memory, the image of the electronic unit that its storage is made a video recording;
1CPU, it is handled the image that is stored in aforementioned the 1st video memory; And
2CPU, it is handled the image that is stored in aforementioned the 2nd video memory,
Aforementioned 1CPU, the image that is positioned at the image-region that is set in the image to the 1st video memory is handled, in addition, 2CPU and the Flame Image Process of being undertaken by 1CPU are positioned in the image to the 2nd video memory and are handled by the image of the different image-region of the image-region of the 1st video memory setting concurrently.
The 1st handles the image comprise different separately lead terminal row with 2CPU or comprises the image at different separately limits or angle or be positioned at the image of the spheric electrode of zones of different separately, discerns the profile or the spheric electrode at lead terminal position, limit or angle respectively.
In addition, the present invention's (technical scheme 5) is a kind of image processing apparatus, and its image to the electronic unit that quilt is made a video recording is handled, and carries out the identification of electronic unit, it is characterized in that, is provided with:
The the 1st and the 2nd video memory, the image of the electronic unit that its storage is made a video recording;
1CPU, it is handled the image that is stored in aforementioned the 1st video memory; And
2CPU, it is handled the image that is stored in aforementioned the 2nd video memory,
Aforementioned 1CPU, utilize the identification parameter value of regulation that the image that is stored in the 1st video memory is handled, in addition, 2CPU and the Flame Image Process of being undertaken by 1CPU are concurrently, utilize the identification parameter value different, the image that is stored in the 2nd video memory is handled with the identification parameter value of aforementioned regulation.
The technical program (technical scheme 6) is a kind of image processing apparatus, and its image to the electronic unit that quilt is made a video recording is handled, and carries out the inspection of electronic unit, it is characterized in that, is provided with:
The the 1st and the 2nd video memory, the image of the electronic unit that its storage is made a video recording;
1CPU, it is handled the image that is stored in aforementioned the 1st video memory; And
2CPU, it is handled the image that is stored in aforementioned the 2nd video memory, aforementioned 1CPU, utilize the regulation algorithm that the image that is stored in the 1st video memory is checked, in addition, 2CPU and the Flame Image Process of being undertaken by 1CPU are utilized the algorithm different with the algorithm of aforementioned regulation concurrently, and the image that is stored in the 2nd video memory is checked.
At this moment, following unit can be set: its any in utilizing aforementioned 1CPU and aforementioned 2CPU, judge that check result is under the situation of NG, if another CPU then sends the interrupt request that makes its Interrupt Process to another CPU also being carried out by different algorithms in the process of checking.
The effect of invention
According to the technical program, the image of electronic unit is stored in the different video memories, the image that is positioned at zones of different of the image in each video memory will be stored in, decentralized and carry out parallel processing by different CPU respectively, thereby can make the Flame Image Process high speed, shorten the component identification time, do not use the hardware resource (CPU, video memory) of high price, can structure at a low price carry out component identification at a high speed.
Description of drawings
Fig. 1 is the image processing apparatus of expression in the electronic component mounting apparatus and the block diagram of the example wanting portion of peripheral structure thereof.
Fig. 2 (a) is the block diagram of an example of the image input part of expression image processing apparatus of the present invention, (b) is the block diagram of another example of presentation video input part.
Fig. 3 (a) is illustrated in the key diagram that carries out the situation of auxiliary process in the scope that does not hinder CPU to handle, and (b) is the relative importance value of expression by auxiliary process, makes the key diagram of the situation of auxiliary process rank change.
Fig. 4 (a) is that expression disperses independent processing, thereby carries out the chart of example of the concrete suitable processing of parallel processing, (b) is the example of representing to make concurrently the concrete suitable processing under the situation of handling action one by one continuously.
Fig. 5 is that expression is listed as the key diagram that detects the example when carrying out dispersion treatment to going between.
To be expression detect the key diagram of the example when carrying out dispersion treatment to profile to Fig. 6.
Fig. 7 is the key diagram of the example of expression when spheric electrode carried out the detection of dispersion treatment.
Fig. 8 is the key diagram that the relation for the result of wave filter and edge decision threshold describes, (a) be the lead portion of expression photographed images, (b) be the curve map of concentration value of position of the sweep trace L of expression (a), (c) curve map of representing wave filter the time (d) is the curve map of variable quantity that is illustrated in the zero cross point of (c).
Fig. 9 is the key diagram that the relation for the result of wave filter and edge decision threshold describes, it is the key diagram when having the bad lead terminal of video picture, (a) be the lead portion of expression photographed images, (b) being result's the curve map of wave filter of position of the sweep trace L of expression (a), (c) is the curve map of variable quantity that is illustrated in the zero cross point of (b).
Figure 10 is the key diagram that the relation for the result of wave filter and edge decision threshold describes, it is the key diagram when having noise with same interval with lead terminal, (a) be the lead portion of expression photographed images, (b) being result's the curve map of wave filter of position of the sweep trace L of expression (a), (c) is the curve map of variable quantity that is illustrated in the zero cross point of (b).
Figure 11 is the process flow diagram of the action of each CPU of expression when carrying out processing shown in Fig. 4 (a) with host CPU and secondary CPU.
Figure 12 is the process flow diagram of the action of each CPU of expression when carrying out handling again shown in Fig. 4 (a) with host CPU and secondary CPU.
Figure 13 is the process flow diagram of the action of each CPU of expression when carrying out dispersion treatment shown in Fig. 4 (a) with host CPU and secondary CPU.
Figure 14 is the block diagram of other structure example of the image input part of expression image processing apparatus of the present invention.
Figure 15 is the chart of the switch change action of explanation Figure 14.
Figure 16 is the process flow diagram of the treatment scheme in the expression structure shown in Figure 14.
Figure 17 is the sequential chart of the processing migration in the expression structure shown in Figure 14.
Figure 18 is the different key diagram of the adsorbed state of expression chip.
Figure 19 is the process flow diagram that an example of the algorithm that chip erects is judged in expression.
Figure 20 is the key diagram of picture image of the suitable example of the above-mentioned algorithm of expression.
Figure 21 is the process flow diagram that expression chip of the present invention erects the determination processing of inspection.
Figure 22 is the chart of classification example that the expression chip erects the algorithm parameter of inspection.
Figure 23 is the block diagram of the structure of the existing image input part of expression, (a) is the block diagram that the structure of a CPU is adopted in expression, (b) is the block diagram that the structure of 2 CPU is adopted in expression.
Embodiment
Below, for embodiments of the present invention, describe with reference to accompanying drawing.
Fig. 1 is the image processing apparatus of expression in the electronic component mounting apparatus and the block diagram of the example wanting portion of peripheral structure thereof.
This electronic component mounting apparatus is by constituting with the lower part: adsorption mouth 1, and it is used for attract electrons parts (hereinafter to be referred as parts) and is placed on camera position; Machine control unit 15, the lift-launch of parts such as driving on substrate (not shown) that reaches lighting device 3 of moving of its control adsorption mouth 1 moved; Standard camera 4 and high-res camera 5, it works as the camera head that parts 2 are made a video recording; And image processing apparatus 14, it is handled the image of being made a video recording, and carries out component identification.
Image processing apparatus 14 is by constituting with the lower part: input circuit 7, and it will become digital picture by the image transformation of the parts of camera 4,5 shooting; Video memory 8, its storage is transformed into the image of digital picture; Working storage 9; Computing circuit (CPU) 10, its data to video memory 8 are carried out calculation process; Parts data storer 12; Interface 13; And control CPU 11, its control is respectively installed to the transmission of the data between storer, simultaneously the required data of component mounting is carried out computing.In addition, also be provided with display 6, its show the image made a video recording or processed after image.
Image processing apparatus 14 control appointed cameras 4 or 5, image digitizing in input circuit 7 of the parts 2 that will be made a video recording is stored in the video memory 8 as multivalue image data.And the data of 10 pairs of video memories 8 of computing circuit are handled, and detect the position in lead-in wire front end or bight etc., and the skew between calculating unit center and the adsorption site and the absorption of parts are tilted, and carry out the location (component identification) of parts.
Among the present invention, handle, shown in Fig. 2 (a) and (b), in image processing apparatus 14, be provided with a plurality of video memories and a plurality of computing circuit (CPU) in order to realize high-speed image.
In Fig. 2 (a), view data from camera 4,5 is read via input circuit 7, distribute to two video memories 8,19 via divider 18, distributing to the view data of video memory 8 is handled by CPU 10, in addition, the view data of distributing to video memory 19 is handled by CPU 17.In the present embodiment, have only the CPU 10 can access images storer 8, have only the CPU 17 can access images storer 19, owing to be not that a plurality of CPU conduct interviews to a storer, even so the video memory of the very wide high price of utilized bandwidth not also can carry out parallel processing.
Yet also consider, only CPU17 is installed, exist CPU 17 not carry out the time of any processing and effectively do not utilize for parallel processingization that can dispersion treatment.Thereby, in the embodiment shown in Fig. 2 (b), in the electronic component mounting apparatus of 2 adsorption head actions, input system for each adsorption head prepare image, in that CPU is set respectively in the process of the parallel processing of carrying out each adsorption head, if there is unnecessary cpu resource, then can effectively utilizes mutually, thereby improve processing power.That is to say, view data from camera 4,5 is deposited in the video memory 8 via input circuit 7, but between input circuit 7 and video memory 8 divider 18 is set, the data identical with video memory 8 are written into video memory 19 at one time.
In addition, from the standard camera 64 of another adsorption head, the view data of high-res camera 65, via the input circuit 20 identical with input circuit 7, be written into video memory 22, but between input circuit 20 and video memory 22 divider 21 is set, the data identical with video memory 22 are written into video memory 23 at one time.
In the embodiment of Fig. 2 (b), not storeies of a plurality of CPU visit, so even the video memory of the very wide high price of utilized bandwidth not equally also can carry out parallel processing to dispersible processing.
As shown in Figure 2, be provided with under the situation of a plurality of CPU, as shown in Figure 3, a CPU 10 (or 17) as host CPU, as secondary CPU, made another CPU 17 (or 10) it carry out auxiliary process for secondary CPU, thereby can carry out dispersion treatment.Fig. 3 (a) is illustrated in the scope that does not hinder the host CPU processing, and secondary CPU carries out the figure of the situation of auxiliary process, and Fig. 3 (b) is the relative importance value of expression because of auxiliary process, makes the key diagram of the situation of auxiliary rank change.
In the example of Fig. 3 (a), the minimum task 51 of relative importance value in the application task of handling for host CPU 50, secondary CPU carries out as idle task.If the request (step S1) of dispersion treatment is arranged, then secondary CPU carries out dispersion treatment (step S2) to the minimum task of relative importance value, and sends its result (result) (step S3).Storage Request Processing state, request, result in working storage 9.Like this, by the minimum idle task of relative importance value is carried out auxiliary process, two CPU make original processing preferential respectively, can utilize the mutual mate-assist of dispersion treatment reasonably to handle rank each other.
In addition,, make under the situation of auxiliary rank change, shown in Fig. 3 (b), can realize by the relative importance value of dynamically controlling idle task at relative importance value because of auxiliary process.Under this situation, can strengthen the degree of assisting as required, thereby realize flexible scheduling.
As the request of auxiliary process, for example in application task, append the parameter 50a of urgency and load.Here, so-called urgency is the parameter of the degree of the necessary emergency of handling of expression, and so-called load is the parameter how many CPU capacity this processing of expression needs.Urgency and load are handled relatively to set for decentralized each respectively and are got final product.For example, self carrying out under the situation of urgency high processing, no matter be what kind of auxiliary process, do not accept as secondary CPU yet, under the situation of carrying out not too high processing of urgency or the lighter processing of load, be controlled to be if the lighter processing of loading then as secondary CPU acceptable parameter.
The acceptance of auxiliary process itself is undertaken by the task 52 that relative importance value is the highest, even in the processing of host CPU, also interrupts and handles.When accepting auxiliary process, at first read the parameter 50a of urgency and load, wait for request (step S4).At this moment, with auxiliary process in the same manner, for the processing of host CPU, preestablish urgency and load.
When accepting auxiliary process, if host CPU is in the processing procedure, then compare by the urgency that will handle and the urgency and the load of load and Request Processing, determine the to execute the task relative importance value of (such as idle task), temporarily change (step S5), will ask to be transformed into and execute the task from receiving an assignment.Secondary CPU executes the task in step S7～S9, the end notification of handling receiving an assignment, and receiving an assignment restores the relative importance value of executing the task.The relation of the parameter of urgency or load and the relative importance value of task is as long as generate with system matches.In common memory 9, identical in addition with Fig. 3 (a), storage Request Processing state, request, result.
Fig. 4 is the chart of an example that carries out the object of parallel processing in the presentation video treating apparatus, (a) be that expression disperses same processing, carrying out the figure of the concrete suitable example of parallel processing, (b) is that expression is to handling the figure of the concrete suitable example under the situation of carrying out parallel processing one by one continuously.
No.1～No.3 of Fig. 4 (a), be corresponding to the terminal of parts or the feature of parts etc., set the image-region of regulation in the view data in being stored in video memory 8,19, the Flame Image Process that each is regional is distributed among the CPU 10,17 and is carried out parallel processing, thereby realizes high speed.
In the No.1 of Fig. 4, for example as shown in Figure 5, be arranged in identification under the situation of lead terminal on each limit of rectangular member 30, setting area 8a, it comprises the lead terminal row 30a on the limit that is arranged at the parts 30 that are stored in the video memory 8, setting area 19a also, it comprises the lead terminal row 30b on another limit that is arranged at the parts 30 that are stored in the video memory 19.The view data of the image-region 8a that 10 couples of CPU are set in video memory 8 is handled, and detects the position of each lead terminal of lead terminal row 30a.In addition, parallel with this processing, another CPU 17 handles the view data of the image-region 19a that is set in video memory 19, detects the position of each lead terminal of other lead terminal row 30b.
In the No.2 of Fig. 4 (a), in the Flame Image Process of the profile of discerning rectangular member,, carry out dispersion treatment by processing being discerned in each limit or each bight of each parts with another CPU.For example, as shown in Figure 6, when the profile in the limit of discerning rectangular member 31 or bight, set image- region 8b, 8c, it comprises the limit 31a or the bight 31b of the parts 31 that are stored in the video memory 8, set image- region 19b, 19c, it comprises another limit 31c or the bight 31d of the parts 31 that are stored in the video memory 19.In addition, the regional 8b of 10 pairs of video memories 8 of CPU, the view data of 8c are handled, the profile of identification limit 31a or bight 31b, in addition, handle parallel with this, another CPU 17 handles the regional 19b of video memory 19, the view data of 19c, discerns the profile of another limit 31c or bight 31d.
In the No.3 of Fig. 4, be provided with on the bottom surface in the Flame Image Process of sphere of parts of spheric electrode in identification, different separately image-regions is set respectively, by processing being discerned in each zone, thereby carry out dispersion treatment with different CPU.For example, as shown in Figure 7, under the situation of parts 32 with a plurality of spheric electrode 32a, in the image of the parts of in video memory 8, storing 32, setting comprises an image-region 8d of spheric electrode, in addition, in the image of the parts 32 that are stored in video memory 19, set another the regional 19d different that comprises spheric electrode with regional 8d.The view data of the regional 8d of 10 pairs of video memories 8 of CPU is handled, detect the position of each spheric electrode in this zone, in addition, handle parallel with this, the view data of the regional 19d of 17 pairs of video memories 19 of another CPU is carried out, and detects the position of each spheric electrode that is positioned at this zone 19d.
In the No.4 of Fig. 4, in the Flame Image Process that the camera data and the pre-parts data of logining of parts are mated, the data of making a video recording are divided into a plurality of, discern processing with different CPU respectively for each piece, can carry out dispersion treatment thus.That is to say,, the related operation of obtaining coupling is carried out so that dispersion treatment is parallel, thereby realize high speed by cutting apart matching area.
The No.5 of Fig. 4, be applicable to and make condition variation, employing can obtain the processing of better result's condition, carrying out Flame Image Process with defined terms, the condition that changes if effect is bad is handled under the situation of this retry processing again, carries out this two processing simultaneously, comparative result, adopt good result, can shorten the processing time significantly by this parallel processing.
Dispersion/parallel processing that this retry is handled for example it is also conceivable that the retry processing of the edge judgment threshold that is applied to when for example detection part goes between.
Current, species and size at each wave filter, obtain the wave filter operation values for the model lead-in wire in advance, determine the edge detection threshold of benchmark according to its result, fluctuation for the reflection case of the corresponding batch lead-in wire that does not cause on an equal basis, be complementary with photographed images, handle, adjust the edge judgment threshold by retry.The terminal of parts is darker in pickup image, in the time of can't detecting the edge by the threshold value of giving tacit consent to, threshold value is reduced, and existing under the situation of noise contribution, can detect unnecessary edge in addition, and threshold value is increased, and carries out retry, thereby only detects correct lead-in wire.In this example, the edge judgment threshold is equivalent to the identification parameter value.
Fig. 8 is for filter process (DOG filter process (Marr﹠amp; The Difference-of-Gaussian filter process of Posio) key diagram that the result and the relation of edge decision threshold describe, Fig. 8 (a) is the photographed images of the lead portion 40 of expression parts, Fig. 8 (b) is the curve map of concentration value of position of the sweep trace L of presentation graphs 8 (a), Fig. 8 (c) is the result's of expression filter process a curve map, the curve map of the variable quantity of the zero cross point of the Fig. 8 (c) when Fig. 8 (d) is expression change threshold value.
In Fig. 8 (c), the zero cross point of wave filter operation result is the edge.By the DOG wave filter, even the yet reaction easily of very little concentration change, zero cross point all is not limited to the lead-in wire edge.Because under the situation that is the lead-in wire edge, it is big that the wave filter reacting value becomes, so, shown in Fig. 8 (d), the variable quantity before and after wave filter result's the zero cross point is surpassed certain setting (=edge decision boundaries=wave filter threshold value), be judged as the lead-in wire edge.
As shown in Figure 9, under the situation that has the bad lead terminal of photographic effect 41, variable quantity with respect to the lead-in wire marginal portion, the number of leads that can detect if wave filter threshold value 42 is too high reduces, as shown in figure 10, existing under the situation of noise 43 with place at interval, with respect to the variable quantity of lead-in wire marginal portion with lead terminal, if edge judgment threshold 44 is crossed low then flase drop and is measured noise beyond the lead-in wire, so that the quantity that detects becomes is many.
That is to say that under the situation that detected number of leads is lacked than the number of leads of appointment, possible edge decision threshold is too high, otherwise under the more situation of detected number of leads, possible edge decision threshold is low excessively.Really be that even make threshold variation, number of leads does not change yet under the wrong situation of number of leads.Threshold value can only change in the level that does not cause normal number of leads change conversely speaking.
If use the present invention, utilize a CPU by the detection that goes between of the wave filter threshold value 42 or 44 of default value, utilize another CPU, go between concurrently simultaneously to detect by low slightly wave filter threshold value 42 or high slightly wave filter threshold value 44 and handle, in the processing time originally, can finish by changing the retry processing (can walk abreast and carry out an initial retry processing) that the identification parameter value is carried out.And,,, can judge whether the result of acquisition is correct by amount detection and the appointment number of leads of relatively going between for two results that obtain by parallel processing.In two results, select correct result.When two results are correct, select the result of default settings.
Then carry out again under the situation of retry processing several times, also in same Flame Image Process, change the identification parameter value, use different CPU that identical view data is carried out by each identification parameter value, thereby the retry processing time can be reduced by half.
Below, with reference to the treatment scheme shown in No.1～No.4 of Figure 11 key diagram 4 (a).Among this embodiment,, adopt the structure shown in Fig. 2 (a) as the structure of image input part.
Host CPU (for example CPU 10) receives instruction (step S11) from machine control unit shown in Figure 1 15 via interface 13.
Then, host CPU makes input circuit 7 actions shown in Fig. 2 (a), carries out image pickup.View data is utilized the divider 18 shown in Fig. 2 (a), at one time identical data is write video memory 8,19 (step S12).
Then, host CPU calculates as the zone on the image of dispersion treatment object (step S13).Then, host CPU is set for the required parameter of the processing of the processing region of trying to achieve among the step S13, and request is sent to secondary CPU (for example CPU17 shown in Fig. 2 (a)) (step S14).
In step S15, host CPU is carried out the dispersion treatment (1) that is assigned to self.
On the other hand, parallel by the request (step S17) of secondary CPU acceptance with step S15 from host CPU, by the processing of secondary CPU execution in step S17～step S19.
In step S18, secondary CPU judges dispersion treatment classification (step S18a).According to the difference of situation, classification, the relative importance value of the task of on commission dispersion treatment (2) is carried out in control, thereby can insert flexible corresponding plan.
In step S18, call execution handling procedure separately and carry out dispersion treatment (2) (step S18b～S18e), if processing finishes, then the result with this dispersion treatment (2) is sent to CPU 10 (step S19).Host CPU is received in the result of the dispersion treatment (2) that secondary CPU of trust carries out among the step S14 in step S16.
The content of the dispersion treatment of carrying out in step S15 (1) is carried out the processing identical with the step S18a～S18e of the dispersion treatment of carrying out (2) in step S18.
The lead-in wire row that carry out respectively in step S15, S18 detect to be handled, and is the processing of the No.1 of Fig. 4 (a), is the processing that is associated and describes with Fig. 5.The spheric electrode of carrying out among step S15, the S18 detects to be handled, and is the processing of the No.3 of Fig. 4 (a), is the processing that is associated and describes with Fig. 7, and profile detects the processing of handling the No.2 that is Fig. 4 (a), is the processing that is associated and describes with Fig. 6.In addition, by the cut zone matching treatment that step S15, S18 carry out, be the processing of the No.4 of Fig. 4 (a).
In addition, need be for being positioned at different other regional lead terminal row, limit, bight or spheric electrode group, carry out under the situation of above-mentioned dispersion treatment (1), (2), the identical dispersion treatment that needs number of times, the lead terminal row, limit, bight or the spheric electrode group that are identified based on the Flame Image Process by separately, the center of calculating unit and the inclination of parts finish component identification.
The No.5 of Figure 12 presentation graphs 4 (a) is with Fig. 8～Figure 10 explanation retry to be handled the process flow diagram of the action of each CPU when carrying out dispersion treatment.
At first, host CPU makes input circuit 7 actions, carries out image pickup (step S21).View data writes identical data video memory 8,19 at one time via divider 18.
The detection that host CPU 10 is listed as for the lead-in wire for the zone on the image identical with self, changing the identification parameter value is that the edge decision threshold carries out, and generates the request (step S22) of dispersion treatment.
In step S23, the request that host CPU 10 will generate in step S22 sends to secondary CPU 17.
Then, host CPU is carried out the dispersion treatment (step S24) that is assigned to self with the identification parameter value (parameter (1)) of regulation.
On the other hand, secondary CPU 17 and host CPU 10 concurrent activities, if receive request (step S27) from host CPU 10, then judge the classification of dispersion treatment, access designated treatment module (step S28), use the identification parameter different (identification parameter (2)), promptly different edge decision thresholds with parameter (1), go between to detect and handle (step S29), and result is sent to host CPU 10 (step S30).
On the other hand, host CPU 10 receives the result (step S25) that lead-in wire that secondary CPU 17 carry out detects in step S29.
The lead-in wire amount detection that host CPU 10 will be obtained by the result of self carrying out in step S24, compare with the number of leads of predefined appointment, in addition, the lead-in wire amount detection that will obtain from the result that secondary CPU 17 receives in step S25 and the number of leads of predefined appointment compare, and select correct result (step S26).Under two all correct situations, make the result of host CPU preferential.
Above-mentioned dispersion treatment also can be undertaken by the structure shown in Fig. 2 (b).Structure shown in Fig. 2 (b) is to walk abreast at each CPU to carry out in the processing procedure of each adsorption head, if also there is unnecessary cpu resource, then in order to utilize mutually effectively, improves processing power, launches elemental motion of the present invention.
Figure 13 is the process flow diagram of expression processing of host CPU when carrying out mutually assisting of dispersion treatment with the structure shown in Fig. 2 (b).
In the structure shown in Fig. 2 (b), if from having the adsorption head side of camera 4,5, CPU 10 is host CPUs, and CPU 17 is secondary CPU, if from having the adsorption head side of camera 64,65, CPU 17 is host CPUs, and CPU 10 is secondary CPU.Below describe by the structure of adsorption head with camera 4,5.
Host CPU (CPU 10) receives instruction (step S41) from machine control unit shown in Figure 1 15 via interface 13.
Then, host CPU makes input circuit 7 actions shown in Fig. 2 (b), carries out image pickup.View data writes identical data video memory 8,19 (step S42) at one time by the divider 18 shown in Fig. 2 (b).
Then, host CPU calculates as the zone on the image of dispersion treatment object (step S43).Host CPU is set the required parameter of processing of the processing region of trying to achieve among the step S43 etc. then, transfers a request to secondary CPU (CPU 17) (step S44).
In step S45, host CPU is carried out the dispersion treatment (1) that is assigned to self.On the other hand, secondary CPU receives the request from host CPU, and is rich if the capacity of self also has, and then carries out the dispersion treatment (2) by the host CPU request.Dispersion treatment (1), (2) are identical processing with the step S15 of Figure 10, the dispersion treatment (1) among the S18, (2).
Host CPU is received in the result (step S46) of the dispersion treatment (2) that step S44 entrusts secondary CPU to carry out.Here, if the processing of entrusting this moment finishes, then can reception result, do not finish as yet but handle sometimes.
In step S47, whether the dispersion treatment (2) of confirm entrusting is finished, if finish then the next one that enters step S51 is handled (handling (3)), if do not finish, then enters step S48.
In step S48, confirm treatment situation, judgement is directly dispersion treatment (2) to be entrusted to secondary CPU, still cancellation is entrusted and oneself is handled.Be directly dispersion treatment (2) to be entrusted to secondary CPU, still cancellation is entrusted and criterion that oneself is handled, for example can be according to judging, perhaps according to judging from the report of secondary CPU from entrusting the elapsed time of handling beginning whether to surpass official hour.
Under the situation that is judged to be the processing of waiting for secondary CPU, be branched off into step S46, wait for finishing of dispersion treatment (2).In step S48, be judged to be under the situation of cancellation to the trust of secondary CPU, send cancellation request (step S49) to secondary CPU, host CPU self carries out dispersion treatment (2) (step S50).
Below, embodiment shown in Figure 14 is described.The image input part of Figure 14 is to handle action concurrently one by one continuously by making, and realizes improving the structure of bulk treatment ability.This structure is in the process of the processing of being carried out by CPU, and 2 kinds of computings should carrying out processed in sequence are arranged, and under the situation that this processing is recurred, this structure is effective.It for example is the processing shown in Fig. 4 (b).
In structure shown in Figure 14, the view data of camera 4,5 shootings can be passed through divider 18, stores into respectively in the video memory 8,19.But, in this embodiment, on two passages, be provided with switch 24,25 respectively.That is to say, by the on/off of gauge tap 24,25, can be as shown in figure 15, the control view data is to the store status of video memory 8,19.
In addition, as shown in figure 14, CPU (computing circuit) 10 is configured to, by change-over switch 26, can access images storer 8 and video memory 19 the two, CPU (computing circuit) 17 also is configured to, by change-over switch 26, can access images storer 8 and video memory 19 the two.
Figure 16 is the process flow diagram of flow process of the processing in the structure of explanation Figure 14.Among the figure, handle A, treatments B is corresponding with processing A, treatments B among Fig. 4 (b).
In addition, Figure 17 is the migration sequential chart of expression by the processing of each CPU execution of Figure 14.Among this figure, video memory 8 is called the A face, video memory 19 is called the B face.
In the step S61 of Figure 16, switch 24 and 25 is connected, view data is write two-sided, i.e. two video memories 8 and video memory 19.
At first, the data of 10 pairs of video memories 8 of CPU (A face) carry out to be handled A, finish if handle A, then begin requirement (step S62) to what CPU 17 sent treatments B.
In step S63, owing to read in image during for the first time through this step, thus skip, since synchronous for the second time with the processing of CPU 17, so the treatments B that wait is undertaken by CPU 17.
If confirm then gauge tap 24 to be controlled to be connection, gauge tap 25 be controlled to be disconnection, thereby only can be stored in the video memory 8 (A face) by the treatments B end of the A face of CPU 17 execution.
In step S64,,, carry out later the shooting of image for the second time so skip owing to read in image for the first time.At this moment, owing in step S63, pass through the control of switch 24 and switch 25, thus only upgrade the one side in the double-sided memory.
Then, in step S65,, handle A and change-over switch 26 in order to make CPU 10 for the image that newly reads at step S64.For example when first, CPU 10 can access images storer 8.
If treatments B finishes, then in step S67, change-over switch 26 switches to the storer of CPU 17 visits the video memory of next process object.For example, because when first, CPU 17 can access images storer 8, so switch so that CPU 17 can access images storer 19 at step S67.
The treatments B if CPU 17 is through with is then notified (step S68) with this situation to CPU10.
The following describes the 4th embodiment that technical scheme 6 relates to, it uses the image input part of the structure shown in Fig. 2 (a) as described above, and what detect (judgement) parts adsorbed state is that chip erects unusually.
This erects as chip in the No.6 of earlier figures 4 (a) and appends, and handles equally with each of No.1～No.5, also can be suitable for the image input part of the structure shown in Fig. 2 (b).
Erect under the situation of detection (judgement of parts adsorbed state) will carrying out chip with Flame Image Process, in Figure 18, except the normal sorption (the little rectangle at two ends is lead-in wire (electrode) terminal) of (a), in (b)～(e) and with in the relation between the round adsorption mouth of representing, as the difference of representing error condition in the diagram, consider the various situations of chip absorption heeling condition.Therefore, use a decision algorithm, can not judge the adsorbed state of all situations.So, must classify to the parts adsorbed state that inclination erects etc., prepare the decision algorithm of multiple each state of correspondence, be switched and determined algorithm in turn, carry out determination processing repeatedly.Below, carry out specific description.
Figure 19 represents to erect process flow diagram under the situation that the decision algorithm of (adsorbed state) handles according to chip.
In step S71, according to photographed images, for example adopt techniques of discriminant analysis to try to achieve the value that is used for binaryzation, carry out the binaryzation of image, carry out obtaining the mark of piece and handle (step S72) from the bianry image that draws.
Then, be one still two by the quantity of marking image decision block, if one, then carry out the area inspection as parts integral body, if shown in Figure 20 (a), be two, then think lead terminal, check that this area of two is than (step S73～S75).
The result of carrying out step S73～75 is still judgements of NG of OK (area correct or area ratio be 1), shown in the image of Figure 20 (a '), because area is 1 than not when tilting to erect, so if be NG, then skip processing thereafter, carries out the NG processing.If OK then enters next handle (step S76).
In step S77, carrying out next the processing is the calculating at the principal axis of inertia (adsorption mouth center), tries to achieve the equation of line of main shaft.
Usually, the reason erect that tilts is, the bight that becomes parts enters in the adsorption hole of adsorption mouth front end and the inclination absorption that produces causes the offset of parts center from the adsorption mouth center.Utilize this situation, shown in Figure 20 (b), detect, whether have the circumferential position (the absorption skew is big) (step S78) of the piece of obtaining with mark in the position of distance adsorption mouth center (=picture centre) more than or equal to certain fixed range.
Judge that the position check result is OK or NG,, carry out NG and handle if for NG then skip thereafter processing.If OK then enter next handle (step S79).
Under the situation of the normal sorption shown in aforementioned Figure 18 (a), the straight line external with four limits around the chip part becomes rectangle.In order to utilize this principle, obtain the external connection on four limits, judge whether the angle of cut on each limit falls into the allowed band interior (step S80) of 90 ° ± α.
Carrying out external connection shape result is OK or the judgement of NG, carries out NG if NG then skips processing thereafter and handles.If OK then enters next processing (step S81).Therefore, shown in Figure 20 (c), under the situation of 90 ° of bigger skews, be judged to be the NG that the inclination shown in this figure (c ') erects at the angle of cut of external connection.
Then, if chip part by normal sorption, then the area more than or equal to binary-state threshold in the window is roughly 100%.In order to utilize this principle, calculate the outermost edges point on the principal axis of inertia that step S77 tries to achieve, main shaft is added vertical rectangular window (two little rectangles among Figure 20 (d)) (step S82).In addition, the size of window (the judgement rectangle of obtaining) is obtained general terminal sizes according to part dimension, makes itself and this consistent size, perhaps teaching in advance.
Then, try to achieve the area in the added window in the above, judge that whether this area accounts for window above the ratio more than or equal to certain fixed value more than or equal to binary-state threshold.That is to say, judge that be OK or NG (step S83) based on portion of terminal with respect to the area check result of the number of picture elements of window (rectangle).Here, handle if NG then carries out NG, OK handles and end if OK then carries out.Figure 20 (a) is owing to being the heeling condition shown in (d), and institute thinks NG.
As described in detail above, carry out chip in hope with Flame Image Process and erect when checking, must classify, prepare a plurality of decision algorithms, be switched and determined algorithm in turn, carry out determination processing repeatedly according to situation separately to the state that inclination erects.
Therefore, shown in existing image processing apparatus, be under one the situation,, also must carry out processed in sequence at CPU even can carry out the process object of parallel processing, therefore need long time.Especially, use whole decision algorithm of preparation in order to obtain normal result of determination, owing to must in all processing, all obtain the judgement of OK, so become processing time.Because it is be in the great majority, therefore very big to the influence degree of productive temp from the frequency normal condition.
Below for erecting inspection as the listed chip of No.6 in the earlier figures 4 (a) in order to realize effectively, the result's that further investigation draws the embodiment of the invention 4 describes.
Figure 21 represents the process flow diagram of the processing sequence of the inspection (judgement) undertaken by present embodiment.
In the flow process of the host CPU shown in the left side, at first, in step S91, host CPU makes 7 actions of Fig. 2 (a) input circuit, carries out the shooting of image.
The view data of being made a video recording writes same data video memory 8,19 at one time by the divider 18 of Fig. 2 (a).
In step S92, chip erects the algorithm of inspection, in order to reach the processing time about equally, considers to make up, and as shown in figure 22, is divided into 2 patterns, sets as pattern 1,2.
Host CPU is for the chip part on the image identical with self, erect inspection in order to carry out chip with algorithm pattern 2, generate the request of dispersion treatment, in step S93, send to secondary CPU, carry out the chip that is assigned to self at step S94 simultaneously and erect inspection (algorithm pattern 1).
Then, in step S95, judge whether the processing of self is interrupted owing to send interrupt request (aftermentioned) from another CPU,, think that then the inspection of another CPU has been defined as the NG judgement if be interrupted.
In step S96, check normal termination if do not interrupt, then carry out handling the judgement of the check result that obtains, if NG then in order to make the handling interrupt of another CPU, in step S97, sends interrupt request to another CPU by self.
In step S98, be received among the abovementioned steps S93 result that the chip of entrusting secondary CPU to carry out erects inspection, in step S99,, have only two all to be the result who selects OK under the situation of OK if certain is judged to be NG in checking then is NG.
On the other hand, the process flow diagram of the secondary CPU shown in the right side is as follows.Itself and the processing concurrent activity of the step S94 that is undertaken by host CPU.
In step S101, when receiving the request from the abovementioned steps S93 of host CPU, judge the dispersion treatment classification that is required at step S102, access the designated treatment timetable.
In step S103, carry out chip and erect inspection (algorithm pattern 2).
Then, judge in step S104 whether the processing of self is interrupted by another CPU, if be interrupted then think that the inspection of other CPU has been defined as NG and has judged.
At step S105, check normal termination if be not interrupted, then carry out handling the judgement of the check result that obtains by self, if NG, then in order to make additional C PU handling interrupt, in step S106, to another CPU transmission interrupt request, simultaneously in step S107, send the result of dispersion treatment to host CPU.
As used as described in the explanation of aforementioned Figure 19, Figure 20, erect in the inspection at the chip of the No.6 of earlier figures 4 (a) record, need attempt a plurality of decision algorithms successively and carry out the processing that ON/NG judges.Therefore, carrying out such processing usually, promptly judge with certain algorithm, if be OK, then be transformed to next algorithm and judge repeatedly, but total at present embodiment, is to carry out a plurality of determination processing concurrently expeditiously, can significantly shorten the long process time.
Carry out under the situation of such OK/NG determination processing, need the longest processing time because the very high OK of frequency judges, so the effect highly significant.
As mentioned above, can obtain following effect according to embodiment 4.
(1) will handle decentralized and carry out parallel processing, thereby can significantly shorten the supervision time just often.
(2) be provided with by sending the notification unit that interrupt request makes handling interrupt, thereby the supervision time can be with mistake the time also is controlled at Min..
The above embodiment 1,2,3,4 of Jie Shaoing, can make and handle decentralized and carry out parallel processing, owing to can shorten the component identification time, and the service efficiency that can improve the hardware resource (CPU, video memory) of existing performance, improve processing power, so favourable to controlling cost.
In the existing dispersion treatment, because the same storer of data sharing of process object so this storer must be a high price, in addition, even handle respectively in other storer, also can produce data and duplicate unnecessary like this processing.Relative therewith, the present invention is by utilizing divider, and can there be the hardware configuration in the storer of two faces in same data when becoming shooting.Even the hardware resource of therefore existing performance also can be constructed high efficiency dispersion treatment.
In the present invention, 2 CPU make original processing preferential respectively, adopt with each other rational rank dispersion treatment the scheduling mode of mate-assist mutually, can become the structure that can improve auxiliary degree as required, realize flexible scheduling.
Among the present invention, in the image processing apparatus of electronic component mounting apparatus, by will the Flame Image Process relevant promptly use with component identification handle decentralized, carry out parallel processing, thereby can not only rely on the high speed of hardware, the existing resources service efficiency is performed to greatest extent, can eliminate waste and the raising processing power.
Claims (7)
1. image processing apparatus, its image to the electronic unit of being made a video recording is handled, and carries out the identification of electronic unit, it is characterized in that, is provided with:
The the 1st and the 2nd video memory, the image of the electronic unit that its storage is made a video recording;
1CPU, it is handled the image that is stored in aforementioned the 1st video memory; And
2CPU, it is handled the image that is stored in aforementioned the 2nd video memory,
Aforementioned 1CPU, the image that is positioned at the image-region that is set in the image to the 1st video memory is handled, in addition, 2CPU and the Flame Image Process of being undertaken by 1CPU are positioned in the image to the 2nd video memory and are handled by the image of the different image-region of the image-region of the 1st video memory setting concurrently.
2. image processing apparatus as claimed in claim 1 is characterized in that,
The aforementioned electronic parts are the electronic units with lead terminal, 1CPU handles at interior image-region the lead terminal that is stored in the regulation that comprises electronic unit in the 1st video memory, 2CPU handles at the image-region of the 2nd interior video memory comprising the lead terminal different with the lead terminal of aforementioned regulation, detects the lead terminal position of each image-region respectively.
3. image processing apparatus as claimed in claim 1 is characterized in that,
The aforementioned electronic parts are the electronic units that have two limits or bight at least, 1CPU handles at interior image the limit or the bight that are stored in the regulation that comprises electronic unit in the 1st video memory, 2CPU handles at the image-region of the 2nd interior video memory comprising limit or the bight different with the limit of aforementioned regulation or angle, discerns the limit in each image-region or the profile in bight respectively.
4. image processing apparatus as claimed in claim 1 is characterized in that,
The aforementioned electronic parts are the electronic units with a plurality of spheric electrodes, 1CPU handles at interior image the spheric electrode that is stored in the regulation that comprises electronic unit in the 1st video memory, 2CPU handles at the image-region of the 2nd interior video memory comprising the spheric electrode different with the spheric electrode of aforementioned regulation, detects the position of the spheric electrode of each image-region respectively.
5. image processing apparatus, its image to the electronic unit of being made a video recording is handled, and carries out the identification of electronic unit, it is characterized in that, is provided with:
The the 1st and the 2nd video memory, the image of the electronic unit that its storage is made a video recording;
1CPU, it is handled the image that is stored in aforementioned the 1st video memory; And
2CPU, it is handled the image that is stored in aforementioned the 2nd video memory,
Aforementioned 1CPU, utilize the identification parameter value of regulation that the image that is stored in the 1st video memory is handled, in addition, 2CPU and the Flame Image Process of being undertaken by 1CPU are concurrently, utilize the identification parameter value different, the image that is stored in the 2nd video memory is handled with the identification parameter value of aforementioned regulation.
6. image processing apparatus, its image to the electronic unit of being made a video recording is handled, and carries out the inspection of electronic unit, it is characterized in that, is provided with:
The the 1st and the 2nd video memory, the image of the electronic unit that its storage is made a video recording;
1CPU, it is handled the image that is stored in aforementioned the 1st video memory; And
2CPU, it is handled the image that is stored in aforementioned the 2nd video memory,
Aforementioned 1CPU, utilize the regulation algorithm that the image that is stored in the 1st video memory is checked, in addition, 2CPU and the Flame Image Process of being undertaken by 1CPU are concurrently, utilize the algorithm different, the image that is stored in the 2nd video memory is checked with the algorithm of aforementioned regulation.
7. image processing apparatus as claimed in claim 6 is characterized in that,
Following unit is set: its any in utilizing aforementioned 1CPU and aforementioned 2CPU, judge that check result is under the situation of NG, if another CPU also being carried out by different algorithms in the process of checking, then sends the interrupt request that makes its Interrupt Process to another CPU.
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| CNA2008100064116A CN101499126A (en) | 2008-02-03 | 2008-02-03 | Image processing apparatus |
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| CNA2008100064116A CN101499126A (en) | 2008-02-03 | 2008-02-03 | Image processing apparatus |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103703756A (en) * | 2011-07-26 | 2014-04-02 | Lg伊诺特有限公司 | Multi-image processing apparatus |
| CN105930845A (en) * | 2015-02-26 | 2016-09-07 | 韩华泰科株式会社 | Method of teaching for parts information and device thereof |
| CN109741297A (en) * | 2018-11-28 | 2019-05-10 | 歌尔股份有限公司 | Product quality detection method and device |
-
2008
- 2008-02-03 CN CNA2008100064116A patent/CN101499126A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103703756A (en) * | 2011-07-26 | 2014-04-02 | Lg伊诺特有限公司 | Multi-image processing apparatus |
| CN105930845A (en) * | 2015-02-26 | 2016-09-07 | 韩华泰科株式会社 | Method of teaching for parts information and device thereof |
| CN105930845B (en) * | 2015-02-26 | 2019-08-06 | 韩华精密机械株式会社 | Method and apparatus for teaching part information |
| CN109741297A (en) * | 2018-11-28 | 2019-05-10 | 歌尔股份有限公司 | Product quality detection method and device |
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