CN101488661B - Adaptive determination apparatus differentiating transformer exciting surge and failure current - Google Patents

Abstract

The present invention relates to relay protection technology, specifically an adaptive judging device for distinguishing transformer excitation inrush current and fault current. The prior art has defects that easily lead to misoperation of transformer differential protection and untimely protection. The present invention includes an AND gate The output end of the AND gate unit is the output end of the judgment result, and the AND gate unit has three input ends, the first input end is the input end of the ratio differential signal; the second input end of the AND gate unit is connected with the input end of an inversion unit The output terminal is connected, and the input terminal of the reverse unit is the harmonic braking signal input terminal; the third input terminal of the AND gate unit is connected with the output terminal of a NAND gate unit, and the two input terminals of the NAND gate unit are respectively The harmonic increase judging module and the timely OR gate harmonic braking judging module group are connected. It not only avoids the occurrence of misoperation, avoids unnecessary maintenance, but also ensures the safety of the system.

Description

An adaptive judging device for distinguishing transformer excitation inrush current and fault current

【Technical field】

The invention relates to relay protection technology, in particular to a device for distinguishing transformer excitation inrush current and fault current and then deciding whether to trip.

【Background technique】

In order to ensure the safe operation of power systems and power transformers, relay protection devices are generally installed on them. Once a fault is found in the transformer area, the transformer will be removed from the system quickly to avoid serious consequences. However, during the operation of the transformer, there will be an excitation inrush current phenomenon, and the high current signal generated by it is often mistaken for a fault current and cause a trip, resulting in unnecessary losses. Therefore, it is necessary to distinguish the excitation inrush current from the fault current by collecting relevant data of the transformer. And brake the trip that may be caused by the excitation inrush current.

There are two main types of existing judging devices for distinguishing excitation inrush current and fault current: phase separation braking and OR gate braking.

The principle of split-phase braking is shown in Figure 11. The ratio differential signal reflects the ratio of the differential current (Icd) to the braking current (Izd). When the ratio of the two is greater than the ratio differential setting value (Kzd) and the differential current When greater than the differential threshold (Imk), the ratio differential signal outputs a logic 1, otherwise the output is 0. Right now:

Icd/Izd>Kzd

Icd>Imk

When the two formulas are established at the same time, the ratio differential signal outputs 1.

The harmonic braking signal is the ratio of the second harmonic (I ₂ cd ) to the fundamental wave (I ₁ cd ) in the differential current of this phase. When the ratio is greater than the harmonic ratio setting value (K ₂ zd), logic 1 is output. Right now:

I ₂ cd/I ₁ cd >K ₂ zd

When the above formula is established, the harmonic brake signal logic 1.

When the trip signal is 1, the trip is controlled, otherwise the trip signal is not issued. The response speed of this braking method is fast, and the removal is timely, but it is easy to cause the misoperation of the transformer differential protection. After the differential protection of the transformer is activated, the staff have to carry out oil and gas analysis and insulation inspection, which brings a lot of work to the staff and takes a certain amount of time, prolonging the maintenance time. At the same time, the transformer and the power grid have to undergo re-excitation The impact of the inrush current affects the safety of the system and the insulation between the transformer coils.

OR gate braking is shown in Figure 12. This braking method is more reliable, but when the transformer is closed due to an internal fault, OR gate braking is likely to cause a delay in protection action. In addition, the application of long-distance power transmission equipment and static var compensation devices in modern power systems makes the second harmonic content in the transient fault current relatively high, and the attenuation is relatively slow. The use of OR gate braking is not conducive to the protection of rapid fault removal. affect the security of the system.

【Content of invention】

In order to overcome the above-mentioned defects existing in the prior art, the present invention provides an adaptive judging device for distinguishing the excitation inrush current and the fault current of the transformer, which can quickly and reliably judge and distinguish the excitation inrush current and the fault current, and brake in time to ensure that the system security.

For this reason, the present invention adopts the following technical solutions: an adaptive judgment device for distinguishing transformer excitation inrush current and fault current, characterized in that it includes an AND gate unit, the output end of the AND gate unit is the output end of the judgment result, and the AND gate unit It has three input terminals, the first input terminal is the input terminal of the ratio differential signal; the second input terminal of the AND gate unit is connected with the output terminal of a reverse unit, and the input terminal of the reverse unit is the harmonic braking signal input terminal; the third input terminal of the AND gate unit is connected to the output terminal of a NAND gate unit, and the two input terminals of the NAND gate unit are respectively connected to the harmonic increase judgment module and the timely OR gate harmonic braking judgment module Group. The judgment result output terminal outputs a trip signal, the harmonic increase judgment module sends a harmonic increase signal, and the timely OR gate harmonic brake judgment module group sends a timely OR gate harmonic brake signal. When the ratio differential signal is 1 and the harmonic braking signal is 0 and the harmonic increase signal or the timely OR gate harmonic braking signal is 0, the trip signal is issued, otherwise the trip signal is not issued. The present invention includes two structures of split-phase braking and OR gate braking in the technology. Under normal circumstances, only split-phase braking is used. If the second harmonic of the differential current does not increase, the OR gate braking will be cancelled, and phase split braking will be formed automatically. The present invention combines the advantages of phase separation braking and OR gate braking in the prior art, and judges the braking signal according to the ratio differential signal and the harmonic braking signal to ensure It can act quickly and timely, and according to the timely OR gate harmonic braking signal and harmonic increase signal, it is guaranteed that the trip signal will only be issued when the transformer is indeed faulty and not due to the influence of the excitation inrush current, avoiding the possibility of misoperation Generated, eliminating unnecessary maintenance and ensuring the safety of the system.

As a further improvement and supplement to the above technical solution, the present invention adopts the following technical measures: the harmonic increase judgment module has a ratio differential signal input terminal, a harmonic fundamental wave ratio difference input terminal and a harmonic increase setting value input The input terminal of the ratio differential signal is connected to an input terminal of an OR gate unit through an inversion unit and a delay unit in turn, while the harmonic fundamental wave ratio difference input terminal and the harmonic increase setting value input terminal are connected through a The comparator is connected with the other input terminal of the OR gate unit, and the output terminal of the OR gate unit outputs a harmonic increase signal. When the differential signal of a certain phase ratio is 0, the harmonic increase signal 1 will be output. When the differential signal of a certain phase ratio is 1, the delay process will be performed. If the ratio differential signal becomes 0 after the delay is over, then Output harmonic increase signal 1; if the ratio differential signal is still 1 after the delay ends, the ratio of the second harmonic to the fundamental wave in the differential current of this phase at a certain moment and the second harmonic in the differential current of this phase at another moment The difference between the ratio of wave to fundamental wave is compared with the second harmonic increase setting value, if the difference is greater than the setting value, the output harmonic increase signal 1, if the difference is less than or equal to the setting value, the output harmonic increase Signal 0, helps prevent inrush currents from causing false trips.

The timely OR gate harmonic braking judgment module group includes an OR gate harmonic braking signal module, a closing condition judgment module and an external fault judgment module, an OR gate harmonic braking signal module and an AND gate unit-input The closing condition judgment module and the external fault judgment module are connected to the other input end of the AND gate unit through an OR gate unit, and the output terminal of the AND gate unit outputs a timely OR gate harmonic braking signal. The OR gate harmonic braking signal module sends an OR gate harmonic braking signal, the closing condition judgment module sends a closing condition signal, and the external fault judgment module sends an external fault removal signal. When the OR gate harmonic braking signal is 0, the timely OR gate harmonic braking signal 0 is output; when the OR gate harmonic braking signal is 1, if the closing condition signal is 1, the timely OR gate harmonic braking signal is output Wave braking signal 1, if the closing condition signal is 0 and the external fault removal signal is 0, then output a timely OR gate harmonic braking signal 0, if the closing condition signal is 0 and the external fault removal signal is 1, Then output timely OR gate harmonic braking signal 1. Combining the OR gate harmonic braking signal with the closing condition signal and the external fault removal signal retains the good reliability of the OR gate harmonic braking signal, and further improves the reliability of the OR gate harmonic braking signal through the closing condition signal and the external fault removal signal The reliability of the judgment result is improved. It ensures that only phase-separated braking is performed under normal conditions, and it will not cause delayed action of the protection in the case of faults in the zone. In the event of various severe inrush conditions, it can be put into OR door brake.

The OR gate harmonic braking signal module includes an OR gate unit, and the OR gate unit has three input terminals, which are the input terminals of the three-phase harmonic braking signal, and the output terminal of the OR gate unit outputs the OR gate harmonic restraint signal. moving signal.

The closing condition judging module has a no-current signal input terminal, and the no-current signal input terminal is respectively connected to the two input terminals of the OR gate unit through two parallel transmission lines, and one of the transmission lines is provided with a delay unit, or The output terminal of the gate unit outputs a closing condition signal. When there is no current signal on each side, the closing condition signal 1 is output; when there is current on any side, the current signal is delayed, and if there is still a current signal at the end of the delay, the closing condition signal is output 0, if there is no current signal at the end of the delay, it will output a closing condition signal 1, which will cause tripping only when there is current on each side of the transformer.

The external fault judgment module has a three-phase overcurrent signal and a three-phase ratio differential signal input terminal, and the ratio differential signal of each phase is connected to an input terminal of an AND gate unit through a reverse unit, and the overcurrent signal Then it is connected to the other input terminal of the AND gate unit, and the output terminal of the three-phase AND gate unit passes through the two OR gate units in series to output the external fault removal signal, and there is a delay between the two OR gate units unit. When there is an overcurrent signal on one side of a certain phase and the phase ratio differential signal is 0, then output the fault signal 1 outside the phase area, otherwise, output the fault signal 0 outside the area of the phase, when the fault signals outside the area of the three phases are all When 0, the fault signal is delayed. If there is still no fault signal at the end of the delay, the external fault removal signal 0 will be output. If there is a fault signal at the end of the delay, the external fault removal signal 1 will be output. When the three-phase out-of-area fault signals are not all 0, the out-of-area fault cut-off signal 1 is output, and the cut-off signal is sent only when the transformer does fail.

Beneficial effects: the present invention effectively combines the advantages of "separate phase braking" and "OR gate braking". When judging the presence of inrush conditions, the OR gate braking scheme is first used. After the inrush occurs for a period of time, the second In the case of harmonic increase, select phase-separated braking and OR gate braking. After adopting this scheme, when the harmonic attenuation cannot be determined, the timely OR gate braking can be used first, which can completely avoid the protection malfunction under the condition of large inrush current. If the condition of large inrush current is not available or it is determined that the harmonic does not increase and is not an inrush current, the phase-separated braking can be used, which can speed up the action speed of the protection when closing on internal faults, avoiding the occurrence of false actions and avoiding Eliminate unnecessary maintenance and ensure the safety of the system.

【Description of drawings】

Fig. 1 is the work flowchart of the present invention.

Fig. 2 is a logic flow chart of the generation of the closing condition signal in the present invention.

Fig. 3 is a logic flow chart of the generation of the external fault removal signal in the present invention.

Fig. 4 is a logic flow chart for generating a timely OR gate harmonic braking signal according to the present invention.

Fig. 5 is a logic flow chart of the generation of the harmonic boost signal according to the present invention.

Fig. 6 is a schematic diagram of a closing condition judging module of the present invention.

Fig. 7 is a schematic diagram of the out-of-area fault judgment module of the present invention.

Fig. 8 is a principle diagram of the judging module set of timely OR gate harmonic braking in the present invention.

FIG. 9 is a schematic diagram of a harmonic increase judging module of the present invention.

Fig. 10 is a structural principle diagram of the present invention.

Fig. 11 is a schematic diagram of the existing phase-separated braking principle.

Fig. 12 is a schematic diagram of the conventional OR gate braking principle.

【Detailed ways】

As shown in Figure 10, the adaptive judgment device for distinguishing transformer excitation inrush current and fault current, the output terminal of the AND gate unit is the output terminal of the judgment result, and the AND gate unit has three input terminals, the first input terminal is the ratio differential signal input terminal; the second input terminal of the AND gate unit is connected with the output terminal of a reverse unit, and the input terminal of the reverse unit is the input terminal of the harmonic braking signal; the third input terminal of the AND gate unit is combined with a NAND The output terminals of the gate unit are connected, and the two input terminals of the NAND gate unit are respectively connected with a harmonic increase judgment module and a timely OR gate harmonic brake judgment module group. Its working process is shown in Figure 1. It goes through sampling and calculation of current on each side, ratio differential calculation, harmonic braking calculation, closing condition judgment, out-of-area fault judgment, timely OR gate harmonic braking judgment and harmonic booster. Large judgment, and then according to the ratio differential, harmonic braking signal, harmonic increase signal and timely OR gate harmonic braking signal of each phase, the final judgment result of each phase is obtained to decide whether to trip or not.

The generation process of the closing condition signal and the judgment module are shown in Figures 2 and 6. The delay is generally set to more than 1 second. When there is no current on each side, the no-current signal is set to logic 1. When there is current on any side, The no-current signal is immediately set to logic 0, and the delayed return element maintains the output logic 1 and returns to logic 0 after a delay.

The generation process of the external fault removal signal and the judgment module are shown in Figures 3 and 7. When an overcurrent occurs on one side of a certain phase, the phase overcurrent signal is set to 1. At this time, if the phase ratio differential does not act, it sends out The external fault signal of this phase, that is, the external fault signal is set to logic 1. The three-phase out-of-area fault signal is output through the OR gate, and the OR gate output signal is kept for a certain period of time (generally greater than one second) through the delay return element. When the out-of-area fault is removed, the delay return element does not return immediately, thereby ensuring the out-of-area fault After the removal, the external removal fault signal can continue to output logic 1 and keep it for a certain period of time (generally greater than one second).

The generation process of timely OR gate harmonic braking signal and the judgment module are shown in Figures 4 and 8. The gate harmonic braking signal module can use the original gate harmonic braking signal generation part of OR gate braking. When the transformer is turned on with no load or the fault outside the secondary side is removed, the OR gate brake is used, because only in these two cases, the content of the second harmonic in the inrush current is small, and in the inrush current, the content of the second harmonic is relatively high. It is completely possible not to put in or door brake. Therefore, the closing condition signal and the external fault removal signal are introduced to switch on and off the OR door brake to form a timely OR door brake signal.

The generation process of the harmonic increase signal and the judgment module are shown in Figures 5 and 9, ka(t) represents the ratio of the second harmonic to the fundamental wave in the A-phase differential current at time t, and ka(t-Δt) represents the reduction of t The ratio of the second harmonic to the fundamental wave in the A-phase differential current at time Δt, kzd is the second harmonic increase setting value. When ka(t-Δt)-ka(t)>kzd, it is considered that the second harmonic content in the A-phase differential current is increased, and the A-phase harmonic increase signal is set to 1. In order to prevent the protection from malfunctioning during the transient state of the algorithm, at the initial stage of inrush or fault, the delay return link ensures that the harmonic increase signal is set to logic 1, that is, the harmonic is considered to be increased at this time. Because it is in the fault transient process and the algorithm transient process at this time, it is impossible to determine whether the harmonics increase or decrease. Setting the harmonic increase signal to 1 helps to enable the OR gate brake to prevent inrush current from causing malfunction. The delay time can be set to 100 milliseconds. After 100 milliseconds, the delay link outputs a logic 0. At this time, it is determined whether to set the harmonic increase signal by judging the second harmonic increment.

Finally, the trip signal is generated by the trip control judgment module (Figure 10). Under normal circumstances, only the phase-separated braking is used. If the harmonic does not increase, the OR gate brake will be cancelled, and the phase-separated brake will be formed automatically.

Claims (1)

1. A kind of self-adaptive judging device that distinguishes transformer excitation inrush current and fault current, it is characterized in that it comprises an AND gate unit, and the output end of AND gate unit is the judgment result output end, and gate unit has three input ends, the first The input terminal is the input terminal of the ratio differential signal; the second input terminal of the AND gate unit is connected to the output terminal of a reverse unit, and the input terminal of the reverse unit is the input terminal of the harmonic braking signal; the second input terminal of the AND gate unit The three input terminals are connected with the output terminals of a NAND gate unit, and the two input terminals of the NAND gate unit are respectively connected with a harmonic increase judgment module and a timely OR gate harmonic braking judgment module group; The large judging module has a ratio differential signal input terminal, a harmonic fundamental wave ratio difference input terminal and a harmonic increase setting value input terminal, and the ratio differential signal input terminal sequentially passes through a reverse unit, a delay unit and an OR gate unit Connected to one input terminal of the harmonic fundamental wave ratio difference input terminal and the input terminal of the harmonic increase setting value are connected to the other input terminal of the OR gate unit through a comparator, and the output terminal of the OR gate unit outputs the harmonic increase signal; the timely OR gate harmonic braking judgment module group includes an OR gate harmonic braking signal module, a closing condition judgment module and an external fault judgment module, an OR gate harmonic braking signal module and an AND gate unit One input terminal is connected, and the closing condition judgment module and the external fault judgment module are connected to the other input terminal of the AND gate unit through an OR gate unit, and the output terminal of the AND gate unit outputs a timely OR gate harmonic braking signal; The above-mentioned OR gate harmonic braking signal module includes an OR gate unit, which has three input terminals, which are the input terminals of the three-phase harmonic braking signal, or the output terminal of the OR gate unit to output the OR gate harmonic braking signal. signal; the closing condition judging module has a no-current signal input terminal, and the no-current signal input terminal is respectively connected to two input terminals of an OR gate unit through two parallel transmission lines, wherein a delay unit is provided on one of the transmission lines , the output terminal of the OR gate unit outputs a closing condition signal; the external fault judgment module has a three-phase overcurrent signal and a three-phase ratio differential signal input terminal, and the ratio differential signal of each phase passes through a reverse unit and An AND gate unit is connected to one input terminal, the overcurrent signal is connected to the other input terminal of the AND gate unit, and the output terminal of the three-phase AND gate unit passes through two OR gate units connected in series to output an external fault removal signal. A delay unit is provided between the two OR gate units.

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