CN101478638A - Handshake type dual processing architecture for digital cameras - Google Patents
Handshake type dual processing architecture for digital cameras Download PDFInfo
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- CN101478638A CN101478638A CNA2008100000805A CN200810000080A CN101478638A CN 101478638 A CN101478638 A CN 101478638A CN A2008100000805 A CNA2008100000805 A CN A2008100000805A CN 200810000080 A CN200810000080 A CN 200810000080A CN 101478638 A CN101478638 A CN 101478638A
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Abstract
The present invention discloses a handshake double-processor structure of digital camera which comprises a microprocessor (MPU) and a digital signal processor (DSP). The microprocessor transmits an arousing signal for triggering the digital signal processor from a sleep mode to an operation mode after receiving the user command. The microprocessor transmits data package and processing requirement to the digital signal processor. The digital signal processor generates a data package processing result according to the processing requirement after receiving the data package. The microprocessor returns to the processing state after receiving the data package processing result for responding the former user command. With the handshake double-processor structure, the corresponding digital signal processor can be controlled by the microprocessor without executing the base layer assembly operation when a program is applied and only the basic function is required to be submitted. The basic function is executed and the execution result of basic function is responded.
Description
Technical field
The invention discloses a kind of processor architecture, formula dual processor framework is held in the friendship that relates in particular to a kind of digital camera.
Background technology
Traditional camera is taken still photo by egative film sensitization, and its function only is to write down subject image.Along with the digital camera technology is come out, the just document image of taking pictures not only more can carry out subsequent treatment to the image of taking by the microprocessor of digital camera.For instance, but part digital camera comparison film itself adds frame, or the character image of assigning in the comparison film by the man-machine interface of digital camera carries out local operation of amplifying, and is revealed in the digital camera screen and browses.At present, most digital camera is except carrying out the microprocessor (Microprocessor) of every function in order to control, also possesses at least one digital signal processor (Digital Signal Processor, DSP), in order to the special disposal simple function, as making additional functions such as function, the anti-hand shake of numeral, noise suppressed or elimination false colour behind the image, make the function of digital camera diversified more.
At present, many amounts of money word camera possesses microprocessor and digital signal processor is arranged.Fig. 1 is the dual processor configuration diagram of known digital camera.Please refer to Fig. 1, digital camera provides man-machine interface 110 to choose executive utility 130 for the user.Digital camera inside has microprocessor 120, digital signal processor 140 and bottom assembly 150.After receiving operational order, trigger with microprocessor 120 controlling application programs 130 and carry out from man-machine interface 110.Microprocessor 120 also with the function of part, for example suppresses the noise speckle in the shot digital images, transfers to digital signal processor 140 and carries out.In the process of implementation, use the bottom assembly if necessary, the image that for example will suppress after the noise processed is shown in screen, then directly controls 150 starts of bottom assembly by digital signal processor 140.Yet this dual processor framework (microprocessor 120, digital signal processor 140) ubiquity application program 130 is difficult for expanding, safeguard complicated and design shortcoming such as not enough elastification.If will expand a new function in application program 130, then the designer need understand between processor 140 and the bottom assembly 150 make flowing mode after, just begun to develop this function.That is to say, system developer on present dual processor framework, develop or the difficulty of maintenance applications too high.
Summary of the invention
The object of the present invention is to provide a kind of friendship of digital camera to hold formula dual processor framework, how application program need not make start bottom assembly in fact, consign to microprocessor by the user's order that will carry out, hold the talk mode by microprocessor with friendship the processing request that will carry out is consigned to the digital signal processor execution, can finish the order that to carry out, obtain this execution result, with the application program expansion elasticity deficiency that the dual processor framework that solves digital camera in the above-mentioned known technology exists, safeguard that complexity crosses problems such as height.
To achieve these goals, formula dual processor framework is held in the friendship that the invention provides a kind of digital camera, includes microprocessor and digital signal processor.Microprocessor is accepted the user orders back transmission wake-up signal to transfer operating mode with the triggered digital signal processor to by sleep pattern.Afterwards, microprocessor transmits data packet and digital signal processor is given in the request of handling, after digital signal processor receives these data packets, carry out and produce the data packet result according to the request of processing, microprocessor returns treatment state with response user order after receiving this data packet result.
Hold formula dual processor framework according to the friendship of the described digital camera of preferred embodiment of the present invention, wherein digital camera comprises a man-machine interface, can receive user's order of input by this man-machine interface.
Hold formula dual processor framework according to the friendship of the described digital camera of preferred embodiment of the present invention, wherein digital signal processor is changed back sleep pattern by operating mode automatically after return data package result is given microprocessor.
Hold formula dual processor framework according to the friendship of the described digital camera of preferred embodiment of the present invention, the request of wherein handling comprises initial orders request, wait routine request and shut down procedure request, after microprocessor carries out initialization to above-mentioned processing request, transmit the request of processing again and give digital signal processor.
Hold formula dual processor framework according to the friendship of the described digital camera of preferred embodiment of the present invention, wherein data packet also comprises record initial data storage address, and digital signal processor is obtained initial data to be processed by this initial data storage address.
Hold formula dual processor framework according to the friendship of the described digital camera of preferred embodiment of the present invention, wherein the data packet result comprises processing result information, result storage address or result data type.
From the above mentioned, formula dual processor framework is held in the friendship of digital camera of the present invention, and the system platform of a quick design/maintenance applications of program designer of digital camera is provided.Application program is moved in microprocessor, during the microprocessor executive utility, receive user's order and hold mode by the friendship of transmitting signal/package, the task of assigning the job is carried out to digital signal processor, relend and help return signal/package, inform the result of the operation of this task of microprocessor.Because microprocessor is not direct and the running of bottom component interaction.Therefore, during design/maintenance applications, need not do in fact, so as to extendibility that promotes camera system and the complexity that reduces application maintenance corresponding to the bottom components.
Describe the present invention below in conjunction with the drawings and specific embodiments, but not as a limitation of the invention.
Description of drawings
Fig. 1 is the dual processor configuration diagram of known digital camera;
Fig. 2 is the dual processor configuration diagram of the digital camera of a preferred embodiment of the present invention;
Fig. 3 is the time sequences figure of the dual processor framework of a preferred embodiment of the present invention.
Wherein, Reference numeral:
110,210,310 man-machine interfaces
120,220,320 microprocessors
130,230 application programs
140,240,330 digital signal processors
150,250,340 bottom assemblies
The S1 sleep pattern
The S2 operating mode
Embodiment
Fig. 2 is the dual processor configuration diagram of the digital camera of a preferred embodiment of the present invention.Please refer to Fig. 2, the digital camera of present embodiment has a man-machine interface 210 in order to receive user's order of input.Have the application program 230 that microprocessor 220 is chosen in order to execution in digital camera inside, these application programs 230 are for example for repairing the damaged pixel (Bad Pixel Recovery) in the photographic images or suppressing false colour etc. in the photographic images.When microprocessor 220 executive utilities 230, with the parts of images handling procedure, for example judge the program of the bad point of photographic images, being assigned to digital signal processor 240 carries out, digital signal processor 240 is direct and bottom assembly 250 starts in implementation, and result is returned to microprocessor 220.Owing to concern it is to carry out by digital signal processor 240 with the start of bottom assembly 250, when application designer/guardian is the application program what's new, do not need the real function of making corresponding bottom assembly 250, more possess expandability than the dual processor framework native system framework of present digital camera.
Then, hold the actual operation flow process of formula dual processor framework again with the friendship of graphic explanation digital camera of the present invention.Fig. 3 is the time sequences figure of the dual processor framework of a preferred embodiment of the present invention.Please refer to Fig. 3, after the user was with man-machine interface 310 input user orders, microprocessor 320 received this user's order, and triggers relevant application program.For example, behind photographic images, choose filtering image blood-shot eye illness function by user's menu, microprocessor 320 promptly opens the function of bad point in the beginning filtering image, may being the pixel of blood-shot eye illness in the filtering image.Afterwards, microprocessor 320 need be transferred to the part taking-up of digital signal processor 330 processing to transfer to the digital signal processor execution with bad some function in the filtering image.
In the present embodiment, digital signal processor possesses electricity-saving function is arranged, and after opening digital camera, digital signal processor promptly enters sleep pattern S1 to save power consumption.Before microprocessor transmits the request of processing, transmit wake-up signal earlier, be converted to operating mode S2 with the triggered digital signal processor by sleep pattern S1.After digital signal processor 330 receives this wake-up signal, transmit one and reply wake-up signal, so as to informing that can transmit the request of processing gives digital signal processor 330 to microprocessor 320.After microprocessor 320 receives the answer wake-up signal, the spendable processing request of first initialization, the request of handling in the present embodiment is initial orders request, wait routine request or shut down procedure request.After treating the initialization process request, microprocessor 320 reaches to remove and send data packet and process request to digital signal processor 330.Wherein, the content of data packet also comprises the initial data storage address, digital signal processor 330 is obtained initial data to be processed by this initial data storage address, and call out to use bottom assembly 340 to carry out corresponding instruction, as storage operation or at the screen display process information of camera etc.
When original data processing finish or instruct be finished after, digital signal processor 330 produces the data packet result according to the result who carries out after the request of processing.This data packet result comprises processing result information, result storage address and result data type.After microprocessor 320 receives this data packet result, the data (for example for repairing the image after bad) after directly handling to the taking-up of result storage address.At this moment, digital signal processor 330 transition operation Mode S 2 are sleep pattern S1, to save power consumption.Microprocessor 320 returns treatment state to aforesaid man-machine interface 310 after receiving the data packet result, inspect the user who is paid with the prompting user and order pairing execution achievement.
Certainly; the present invention also can have other various embodiments; under the situation that does not deviate from spirit of the present invention and essence thereof; those of ordinary skill in the art work as can make various corresponding changes and distortion according to the present invention, but these corresponding changes and distortion all should belong to the protection range of the appended claim of the present invention.
Claims (6)
1, formula dual processor framework is held in a kind of friendship of digital camera, it is characterized in that, comprising:
One microprocessor and a digital signal processor, this microprocessor is accepted a user orders the back to transmit a wake-up signal, transfer operating mode to trigger this digital signal processor to by sleep pattern, this microprocessor also transmits several data packets and at least one processing is asked to this digital signal processor, this digital signal processor produces a data packet result according to this processing request after receiving this data packet, and this microprocessor returns a treatment state to respond this user's order after receiving this data packet result.
2, formula dual processor framework is held in the friendship of digital camera according to claim 1, it is characterized in that this digital camera also comprises a man-machine interface, so as to receiving this user's order of input.
3, formula dual processor framework is held in the friendship of digital camera according to claim 1, it is characterized in that, this digital signal processor transfers sleep pattern to by operating mode after also being included in and returning this data packet result.
4, formula dual processor framework is held in the friendship of digital camera according to claim 1, it is characterized in that, this processing request is selected from the set of being made up of initial orders request, wait routine request and shut down procedure request.
5, formula dual processor framework is held in the friendship of digital camera according to claim 1, it is characterized in that, this data packet also comprises an initial data storage address, and this digital signal processor is obtained initial data to be processed by this initial data storage address.
6, formula dual processor framework is held in the friendship of digital camera according to claim 1, it is characterized in that, this data packet result comprises processing result information, result storage address and result data type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008100000805A CN101478638A (en) | 2008-01-04 | 2008-01-04 | Handshake type dual processing architecture for digital cameras |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008100000805A CN101478638A (en) | 2008-01-04 | 2008-01-04 | Handshake type dual processing architecture for digital cameras |
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| CN101478638A true CN101478638A (en) | 2009-07-08 |
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| CNA2008100000805A Pending CN101478638A (en) | 2008-01-04 | 2008-01-04 | Handshake type dual processing architecture for digital cameras |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105807888A (en) * | 2014-12-31 | 2016-07-27 | 联想(北京)有限公司 | Electronic equipment and information processing method |
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- 2008-01-04 CN CNA2008100000805A patent/CN101478638A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105807888A (en) * | 2014-12-31 | 2016-07-27 | 联想(北京)有限公司 | Electronic equipment and information processing method |
| CN105807888B (en) * | 2014-12-31 | 2019-11-26 | 联想(北京)有限公司 | A kind of electronic equipment and information processing method |
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Open date: 20090708 |