CN101478511B - Data receiving method for MIMO wireless communication system - Google Patents
Data receiving method for MIMO wireless communication system Download PDFInfo
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- CN101478511B CN101478511B CN2009100778163A CN200910077816A CN101478511B CN 101478511 B CN101478511 B CN 101478511B CN 2009100778163 A CN2009100778163 A CN 2009100778163A CN 200910077816 A CN200910077816 A CN 200910077816A CN 101478511 B CN101478511 B CN 101478511B
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Abstract
The invention relates to a data receiving method of a multi-input multi-output wireless communication system, which belongs to the technical field of wireless data transmission. The method comprises the following steps: transmitting the received MIMO baseband data to a PC by FPGA; synchronizing the MIMO baseband data by the PC to obtain synchronous information, such as frame synchronous information, receiving-transmitting frequency deviation synchronous information and sampling clock synchronous information, and transmitting to the FPGA; carrying out timing synchronization, such as synchronous frame location, frequency deviation correction and sampling clock frequency, by the FPGA according to the synchronous information, and transmitting data block including the pilot frequency from the adjusted signals to the PC; carrying out channel estimation and MIMO equalization matrix by the PC, and transmitting to the FPGA; and subjecting the adjusted baseband data signal to MIMO equalization, demodulation and decoding by the FPGA to obtain the output data. The method can effectively realize performance improvement of the wireless system by using MIMO technique while ensuring the data processing speed of the system receiving terminal.
Description
Technical field
The present invention relates to the data receive method in a kind of multiple input, multiple output wireless communication system, belong to the wireless data transmission technology field.
Background technology
In order to support higher transmission rate, reach the higher availability of frequency spectrum in radio communication, adopting multiple-input and multiple-output (hereinafter to be referred as MIMO) technology is a kind of effective method.Simultaneously, in order to support high-speed data transmission speed, the inevitable requirement communication equipment possesses the higher data disposal ability and is complementary with it.Because field programmable gate array (hereinafter to be referred as FPGA) has concurrency design, the fast characteristics of processing speed be convenient to, therefore in realizing, often adopts by the hardware of high speed data transmission system FPGA.
Adopt the wireless communication system of MIMO technology need carry out the MIMO equilibrium treatment to the baseband digital signal that receives at receiver one end usually, this just means that receiver will estimate and obtain complicated signal processing work such as the balanced matrix of MIMO by matrix computations the MIMO wireless channel.Because FPGA is not suitable for carrying out complicated matrix computations, therefore in the receiver that uses pure FPGA to realize, realize the MIMO technology fully and obtain corresponding system gain to be the comparison difficulty.
Corresponding with it is that all-purpose computer (hereinafter to be referred as PC) has the more high performance matrix computations ability of relative FPGA usually.Therefore, the present invention considers that the flexibility and the high efficiency that make full use of the calculating of PC processing array cooperate the Data Receiving in the FPGA realization mimo wireless communication system to handle.
Summary of the invention
The objective of the invention is in order to solve the computation complexity that in the receiver that uses FPGA, adopts the MIMO technology to run into too high, especially matrix computations problem limited in one's ability has been transferred to PC than complicated signal processing function from FPGA with part in the receiver and has been realized.
The data receive method of the multiple input, multiple output wireless communication system that the present invention proposes may further comprise the steps:
(1) field programmable gate array of receiving terminal is sent to computer with the multiple-input and multiple-output base-band data signal that receives in the wireless communication system;
(2) computer of receiving terminal obtains the frame synchronization information of base-band data signal to carrying out frame synchronization process in the base-band data signal of above-mentioned reception, and this frame synchronization information is sent to the field programmable gate array of receiving terminal;
(3) according to above-mentioned frame synchronization information, field programmable gate array carries out the frame synchronization location to the base-band data signal that receives, and obtains frame start position, and intercepts the data block that comprises pilot tone from base-band data signal, and this data block is sent to computer;
(4) base-band data signal that contains pilot tone behind the process frame synchronization location of computer to above-mentioned reception carries out Frequency Synchronization and sampling clock Synchronous Processing, obtain transmitting-receiving frequency deviation and transmitting-receiving sampling clock frequency and the phase deviation of wireless communication system, and this transmitting-receiving frequency deviation and transmitting-receiving sampling clock frequency and phase deviation are sent to the field programmable gate array of receiving terminal;
(5) base-band data signal after the field programmable gate array of receiving terminal is located above-mentioned frame synchronization according to above-mentioned transmitting-receiving frequency deviation carries out frequency offset correction, carry out the frequency and the phasing of sampling clock according to above-mentioned transmitting-receiving sampling clock frequency and the phase deviation signal after to this frequency offset correction, and the data block that will comprise pilot tone in the frequency of sampling clock and the base-band data signal behind the phasing is sent to computer;
(6) computer extracts pilot signal from the data block that comprises pilot tone that above-mentioned steps (5) receives, and utilizes this pilot signal that wireless communication system is carried out channel estimating;
(7) computer utilizes above-mentioned channel estimation results to calculate the balanced matrix of wireless communication system, and field programmable gate array is delivered in this balanced moment paroxysm;
(8) field programmable gate array utilize above-mentioned reception balanced matrix to carrying out multiple-input and multiple-output equilibrium, demodulation and decoding through the sampling clock frequency of above-mentioned steps (5) and the base-band data signal behind the phasing, obtain dateout.
In the said method, the data block length that comprises pilot tone of field programmable gate array intercepting is longer than the length of pilot signal, promptly comprises the partial data of pilot tone and pilot tone front and back.
The data receive method of the multiple input, multiple output wireless communication system that the present invention proposes, computing with more complicated in detection of MIMO receiver signal and the handling process, especially Synchronous Processing and relate to the channel estimating of matrix operation and the balanced matrix calculating section of MIMO, transfer in the PC by FPGA, can make full use of the powerful calculating ability of PC like this.Because PC is only finished the calculating section of above-mentioned relative complex, other real-times require higher signal processing simultaneously, and for example equilibrium, demodulation, decoding etc. are still finished in FPGA, so can't influence MIMO receiver final data processing speed.Experimental results show that, adopt MIMO data receive method proposed by the invention, utilize PC and FPGA Combined Treatment, can under the prerequisite that guarantees the system receiving terminal data processing speed, realize of the lifting of MIMO technology effectively wireless system performance to the MIMO base-band data signal.
Description of drawings
Fig. 1 is the DRP data reception process schematic diagram of the inventive method.
Fig. 2 is an embodiment of the inventive method.
Embodiment
The data receive method of the multiple input, multiple output wireless communication system that the present invention proposes, its process may further comprise the steps as shown in Figure 1:
(1) field programmable gate array of receiving terminal is sent to computer with the multiple-input and multiple-output base-band data signal that receives in the wireless communication system;
(2) computer of receiving terminal obtains the frame synchronization information of base-band data signal to carrying out frame synchronization process in the base-band data signal of above-mentioned reception, and this frame synchronization information is sent to the field programmable gate array of receiving terminal;
(3) according to above-mentioned frame synchronization information, field programmable gate array carries out the frame synchronization location to the base-band data signal that receives, and obtains frame start position, and intercepts the data block that comprises pilot tone from base-band data signal, and this data block is sent to computer;
(4) base-band data signal that contains pilot tone behind the process frame synchronization location of computer to above-mentioned reception carries out Frequency Synchronization and sampling clock Synchronous Processing, obtain transmitting-receiving frequency deviation and transmitting-receiving sampling clock frequency and the phase deviation of wireless communication system, and this transmitting-receiving frequency deviation and transmitting-receiving sampling clock frequency and phase deviation are sent to the field programmable gate array of receiving terminal;
(5) base-band data signal after the field programmable gate array of receiving terminal is located above-mentioned frame synchronization according to above-mentioned transmitting-receiving frequency deviation carries out frequency offset correction, carry out the frequency and the phasing of sampling clock according to above-mentioned transmitting-receiving sampling clock frequency and the phase deviation signal after to this frequency offset correction, and the data block that will comprise pilot tone in the frequency of sampling clock and the base-band data signal behind the phasing is sent to computer;
(6) computer extracts pilot signal from the data block that comprises pilot tone that above-mentioned steps (5) receives, and utilizes this pilot signal that wireless communication system is carried out channel estimating;
(7) computer utilizes above-mentioned channel estimation results to calculate the balanced matrix of wireless communication system, and field programmable gate array is delivered in this balanced moment paroxysm;
(8) field programmable gate array utilize above-mentioned reception balanced matrix to carrying out multiple-input and multiple-output equilibrium, demodulation and decoding through the sampling clock frequency of above-mentioned steps (5) and the base-band data signal behind the phasing, obtain dateout.
In the inventive method, FPGA at first with the MIMO base-band data signal that receives by and PC between data-interface pass to PC.PC carries out Synchronous Processing to the MIMO base-band data signal that receives, and obtains to comprise synchronous information such as frequency deviation synchronizing information and sampling clock synchronizing information between frame synchronization information, the transmitting-receiving by this Synchronous Processing, and sends to FPGA.FPGA carries out frame synchronization location, frequency offset correction and sampling clock frequency etc. according to above-mentioned various synchronizing informations and regularly adjusts synchronously, and from comprising pilot tone and pass to PC at an interior blocks of data through intercepting out the above-mentioned synchronous adjusted base-band data signal.The pilot signal that PC utilizes FPGA to transmit is carried out corresponding channel estimating, and calculates the balanced matrix of MIMO, and sends the aforementioned calculation result to PFGA in time.At last, FPGA utilizes the balanced matrix of MIMO that sends from PC, to carrying out the MIMO equilibrium through synchronous adjusted base-band data signal, and demodulation, decoding, finally obtain dateout.Above-mentioned institute is in steps in the implementation, and PC will utilize always data that FPGA transmits and FPGA to cooperatively interact constantly to carry out that corresponding synchronous is handled and tracking.
Below in conjunction with accompanying drawing and a specific embodiment the inventive method is elaborated.
In the present embodiment, consider the wireless communication system that employing MIMO and quadrature product divide multiplexing (hereinafter to be referred as OFDM) technology to combine usually, the receiver basic structure block diagram of this system can be as shown in Figure 2.In this receiver, data-interface between PC and the FPGA uses Ethernet interface, and all MIMO base-band data signals of receiver are handled and distributed to FPGA and PC two parts and work in coordination with and finish.Wherein, the main functional modules finished of FPGA has comprised: frame synchronization location, frequency offset correction, sampling clock frequency and phasing, MIMO equilibrium, demodulation, decoding.The functional module that PC is finished has mainly comprised: Synchronous Processing (comprising frame synchronization, Frequency Synchronization, sampling clock Synchronous Processing), channel estimating, the balanced matrix computations of MIMO.
In the present embodiment, FPGA utilizes the frame synchronization information in the synchronizing information that the PC Synchronous Processing obtains and transmit to carry out the frame synchronization location to the MIMO base-band data signal, obtains the accurate data frame start position, and the data block that intercepting comprises pilot tone sends PC to.Frequency synchronization information in the synchronizing information that frequency offset correction module among the FPGA is then obtained and transmitted according to the PC Synchronous Processing is carried out initial frequency deviation adjustment, is about to correcting frequency deviation in the capture zone of the frequency offset correction module of FPGA.After initial frequency deviation adjustment was finished, the frequency offset correction module of FPGA entered the real-time tracking pattern of frequency deviation.Then, the sampling clock synchronizing information in sampling clock frequency among the FPGA and the phase correction module synchronizing information obtaining and transmit according to the PC Synchronous Processing is carried out corresponding sampling clock and is proofreaied and correct and follow the tracks of.The balanced logm of the MIMO that MIMO detection module among the FPGA then utilizes PC to send is according to carrying out the MIMO equilibrium, be about to through overdeviation, sampling clock proofread and correct and frame synchronization after the MIMO base-band data signal that is superimposed with each antenna transmission data that receives of each reception antenna multiply by the balanced matrix of MIMO, the corresponding base band data that promptly detects each antenna and sent.Base band data after the MIMO equilibrium passes through demodulation, decoding module again, can final dateout.
From the above mentioned as can be known, in this enforcement, in fact the Synchronous Processing that PC is finished has comprised frequency offset estimating, the sampling clock deviation estimation between frame synchronization, the transmitting-receiving, comprises frame synchronization information, frequency synchronization information and sampling clock synchronizing information to obtain corresponding synchronous information.PC has also been realized synchronous catching in real time and following the tracks of in finishing above-mentioned Synchronous Processing process.In addition, PC also need to finish the balanced matrix computations of MIMO radio channel estimation and MIMO etc. need be than the function of complicated calculations ability.
In order to further describe the base-band data signal handling process of the foregoing description 1, Fig. 2 has provided corresponding PC and the FPGA combined treatment procedure figure to the MIMO base-band data signal.
At first be the Synchronous Processing link, comprise the frequency offset correction between frame synchronization, the transmitting-receiving, the adjustment of sample rate.MIMO base-band data signal of FPGA intercepting sends PC to, and the MIMO base-band data signal that PC utilizes known pilot signal and FPGA to transmit is done the relevant accurate position that searches out frame synchronization, and the above-mentioned accurate frame synchronization information that will obtain sends FPGA to.FPGA is according to above-mentioned frame synchronization information, carries out the frame synchronization positioning action, and promptly a blocks of data that comprises pilot tone OFDM symbol according to the accurate position intercepting of frame synchronization is passed to PC.PC utilize these above-mentioned OFDM symbol datas that comprise pilot tone between receiving and dispatching frequency deviation and the detection of sampling clock deviation, wherein sampling clock deviation comprises sample rate deviation and sampling phase deviation, and in time result of calculation is fed back to correcting frequency deviation module and sampling clock frequency and the phase correction module of FPGA, carry out the adjustment of frequency offset correction and sampling clock for FPGA.
Do correlation capturing to the frame synchronization position at PC by the MIMO base-band data signal that utilizes known pilot signal and FPGA and transmit, and after frequency offset correction and sampling clock deviation adjust in the certain limit, can think that receiver has been finished first to obtain synchronously.Obtain synchronously first finish after, FPGA will continue the data block that intercepting comprises frequency pilot sign and send PC to, simultaneously the OFDM symbol data of time domain be carried out FFT and transform to frequency domain and send to the MIMO balance module again.The pilot data that PC utilizes FPGA to send simultaneously carries out channel estimating, promptly estimate the gain matrix H of MIMO wireless channel, utilize H to calculate the balanced matrix of MIMO then, and above-mentioned balanced matrix result of calculation is sent to the MIMO detection module of FPGA, carry out MIMO equilibrium, demodulation and decoding subsequently successively, to obtain dateout.
When carrying out the balanced matrix computations of channel estimating and MIMO, the MIMO base-band data signal that PC also utilizes FPGA to send here constantly carries out the tracking of sampling clock deviation, the data that to be PC transmit according to FPGA to receiver because detection is done in the synchronous drift that sampling clock deviation causes, and in real time adjustment information is fed back to FPGA and adjusts.Meanwhile, the real-time tracking adjustment of frequency deviation between the frequency offset correction module of FPGA is received and dispatched always.Thereby PC and FPGA cooperatively interact the synchronous situation of receiver are followed the tracks of adjustment.
Experimental results show that, the data receive method of the mimo wireless communication system that the present invention proposes, in conjunction with reasonably interface and PC programming, can be under the prerequisite that guarantees the receiver signal processing speed, PC and FPGA are displayed one's respective advantages, finish the Combined Treatment that the MIMO base band is received data-signal preferably.
The above only is a preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being made within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (2)
1. the data receive method of a multiple input, multiple output wireless communication system is characterized in that, this method may further comprise the steps:
(1) field programmable gate array of receiving terminal is sent to computer with the multiple-input and multiple-output base-band data signal that receives in the wireless communication system;
(2) computer of receiving terminal carries out frame synchronization process to the base-band data signal of above-mentioned reception, obtains the frame synchronization information of base-band data signal, and this frame synchronization information is sent to the field programmable gate array of receiving terminal;
(3) according to above-mentioned frame synchronization information, field programmable gate array carries out the frame synchronization location to the base-band data signal that receives, and obtains frame start position, and intercepts the data block that comprises pilot tone from base-band data signal, and this data block is sent to computer;
(4) base-band data signal that contains pilot tone behind the process frame synchronization location of computer to above-mentioned reception carries out Frequency Synchronization and sampling clock Synchronous Processing, obtain transmitting-receiving frequency deviation and transmitting-receiving sampling clock frequency and the phase deviation of wireless communication system, and this transmitting-receiving frequency deviation and transmitting-receiving sampling clock frequency and phase deviation are sent to the field programmable gate array of receiving terminal;
(5) base-band data signal after the field programmable gate array of receiving terminal is located above-mentioned frame synchronization according to above-mentioned transmitting-receiving frequency deviation carries out frequency offset correction, carry out the frequency and the phasing of sampling clock according to above-mentioned transmitting-receiving sampling clock frequency and the phase deviation signal after to this frequency offset correction, and the data block that will comprise pilot tone in the frequency of sampling clock and the base-band data signal behind the phasing is sent to computer;
(6) computer extracts pilot signal from the data block that comprises pilot tone that above-mentioned steps (5) receives, and utilizes this pilot signal that wireless communication system is carried out channel estimating;
(7) computer utilizes above-mentioned channel estimation results to calculate the balanced matrix of wireless communication system, and field programmable gate array is delivered in this balanced moment paroxysm;
(8) field programmable gate array utilize above-mentioned reception balanced matrix to carrying out multiple-input and multiple-output equilibrium, demodulation and decoding through the sampling clock frequency of above-mentioned steps (5) and the base-band data signal behind the phasing, obtain dateout.
2. the method for claim 1 is characterized in that the data block length that comprises pilot tone of the field programmable gate array intercepting described in the described step (3) is longer than the length of pilot signal.
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| CN102075486A (en) * | 2011-01-20 | 2011-05-25 | 深圳市阿派斯实业有限公司 | Synchronized method of orthogonal frequency division multiplexing (OFDM) system |
| CN105791878B (en) * | 2016-03-04 | 2019-04-05 | 广东顺德中山大学卡内基梅隆大学国际联合研究院 | Image error concealing method and system |
| CN110661587B (en) | 2018-06-28 | 2020-09-11 | 华为技术有限公司 | Method and device for transmitting signal |
| CN111245486B (en) * | 2018-11-29 | 2021-06-18 | 中国移动通信集团四川有限公司 | Method, device and equipment for reducing signal crosstalk |
| CN110932763B (en) * | 2019-12-02 | 2021-07-20 | 上海无线电设备研究所 | Missile-borne MIMO multi-antenna communication system |
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| CN101162932A (en) * | 2006-10-12 | 2008-04-16 | 联想（新加坡）私人有限公司 | Method for setting mimo wireless communication system and computer thereof |
| CN101170333A (en) * | 2007-11-16 | 2008-04-30 | 山东大学 | Practical environment testing platform for distributed multi-input and multi-output radio communication system |
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| CN101162932A (en) * | 2006-10-12 | 2008-04-16 | 联想（新加坡）私人有限公司 | Method for setting mimo wireless communication system and computer thereof |
| CN101170333A (en) * | 2007-11-16 | 2008-04-30 | 山东大学 | Practical environment testing platform for distributed multi-input and multi-output radio communication system |
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