CN101478481B - Buffer management method and apparatus, data forwarding system - Google Patents

Buffer management method and apparatus, data forwarding system Download PDF

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Publication number
CN101478481B
CN101478481B CN200910000387XA CN200910000387A CN101478481B CN 101478481 B CN101478481 B CN 101478481B CN 200910000387X A CN200910000387X A CN 200910000387XA CN 200910000387 A CN200910000387 A CN 200910000387A CN 101478481 B CN101478481 B CN 101478481B
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weight
cache blocks
mistake
buffer
taken place
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CN101478481A (en
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李星
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Huawei Digital Technologies Chengdu Co Ltd
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Huawei Symantec Technologies Co Ltd
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Abstract

The embodiment of the invention discloses a buffer management method, which comprises the following steps: calculating the number of idle buffer blocks in a buffer region; and executing an initialization operation when the number of the idle buffer blocks is less than a preset threshold value to initialize the buffer region. The embodiment of the invnetion further discloses a buffer management device and a data forwarding system. The method, the device and the system can effectively improve the reliability of a data message buffer system.

Description

Buffer memory management method and device, data forwarding system
Technical field
The present invention relates to the communications field, particularly relate to a kind of buffer memory management method and device, data forwarding system.
Background technology
In the communication equipment of data forwarding, a lot of Business Processing, for example traffic management, asynchronous transfer mode (ATM:Asynchronous Transfer Mode) cell reorganization etc. all will realize the storage of message usually.Generally all adopt the data forwarding chip to realize.
With reference to Fig. 1, be the described data forwarding chip structure of prior art schematic diagram.
Described chip comprises: input processing module 1, intermediate process module 2, output processing module 3, caching management module 4.The plug-in data buffer 5 of chip.
After a data message enters chip internal from input interface, apply for the buffer pointers of free time to caching management module 4 by input processing module 1, data message is write described buffer pointers spatial cache pointed, extract message information and the described buffer pointers that follow-up module need analyze simultaneously and be sent to intermediate process module 2.After intermediate process module 2 is finished dealing with, output processing module 3 in the corresponding spatial cache is read data message from data buffer 5 according to described buffer pointers, the data message is carried out sending after the corresponding editing and processing, simultaneously described buffer pointers is discharged to caching management module 4, carry out the buffer memory recycling.So far, finish processing to a data message.
The caching management module 4 general buffer memory management methods of weight random asccess memory (RAM:Random Access Memory) that adopt commonly used carry out cache management.With reference to shown in Figure 2, be weight RAM structural representation.Buffer area in the data buffer is divided into a plurality of cache logic pieces according to fixing size, the corresponding buffer pointers of each cache logic piece.For example, the size of tentation data buffer area is the 16M byte, and the size of each cache logic piece is the 2K byte, and 8K cache logic piece so just arranged, and this 8K cache logic piece corresponding cache pointer is 0~8191.A byte among each logical block respective weights RAM, so the index address number of weight RAM is identical with the buffer pointers number, the corresponding corresponding buffer pointers in each address of weight RAM.Suppose that each logical block weighted value is 8bit, then the weighted value of each logical block correspondence is 255 to the maximum, and the size of whole weight RAM is 8192 * 8bit.
The handling process of the buffer memory management method of employing weight RAM is as described below: after a free buffer logical block was assigned with away, caching management module was 255 with writing 1 entirely with the content of buffer pointers correspondence position among the weight RAM.After the intermediate process module of chip disposes, output processing module discharges the cache logic piece and provides the release weighted value, and the weighted value with the correspondence position among the weight RAM after the caching management module response discharges and applies for deducts the release weighted value that output processing module provides.When the weighted value among the weight RAM is 0, represent that the buffer memory release of this cache logic piece finishes.Caching management module recycles this cache logic piece, after the recovery described cache logic piece is waited for next time as the free buffer piece and is applied.Thus, realize the application and the release cycle process of cache logic piece, guaranteed the normal storage and the forwarding of data message.
Referring to Fig. 2, the different value representation among the weight RAM current state of cache logic piece.The diagram address is that 0 logical block weighted value is 180, illustrates that this cache logic piece weight has discharged 75, also discharges fully, and this logical block still is in occupied state.The diagram address is that 1 cache logic piece weighted value is 0, illustrates that this cache logic piece has discharged to finish, and is the free buffer piece.The diagram address is that 2 logical block weighted value is 255, illustrates that this cache logic piece also discharges.
In actual applications, often occur because the buffer memory that design defect causes leaks phenomenons such as release, mistake release.Owing to reasons such as out of memory, the value mistake among the weight RAM may occur, thereby cause cache blocks weight mistake, cause certain pointer after all releasing operations are finished, weighted value among its respective weights RAM is not 0, and described pointer corresponding cache logical block can't be recovered.Along with above-mentioned mistake builds up, spatial cache will be consumed sky, and all cache logic pieces all are in occupied state, do not have the free buffer piece.At this moment, input processing module can't be applied for free buffer pointer storage data message, cause the subsequent processes step to carry out, thereby cause entire chip can't receive message, form the deadlock phenomenon, cause system reliability to reduce greatly.
Summary of the invention
Technical problem to be solved by this invention provides a kind of buffer memory management method and device, data forwarding system, to improve the reliability of data message buffer system.
For achieving the above object, the embodiment of the invention provides following technical scheme:
A kind of buffer memory management method, described method comprises:
The quantity of idle cache blocks in the statistics buffer area;
When the quantity of free buffer piece of statistics during, determine whether system weight has taken place discharged mistake less than predetermined threshold value; If system weight has taken place discharged mistake, carry out initialization operation, the described buffer area of initialization; Otherwise do not carry out initialization operation.
A kind of cache management device, described device comprises:
Free buffer piece statistic unit, the quantity that is used for adding up the idle cache blocks of buffer area;
Weight discharges wrong determining unit, is used for determining whether system weight has taken place discharged mistake; If system weight has taken place discharged mistake, then notify the initialization performance element;
The initialization performance element is used for carrying out initialization operation, initialization described buffer area when system has taken place the quantity of free buffer piece that weight discharges wrong and statistics less than predetermined threshold value.
A kind of data forwarding system, described system comprises: data forwarding chip and data storage; Described data forwarding chip comprises input processing module, intermediate process module, output processing module and caching management module; Described caching management module comprises: free buffer piece statistic unit, weight discharge wrong determining unit and initialization performance element;
Free buffer piece statistic unit is used for the quantity of the idle cache blocks of statistics memory;
Weight discharges wrong determining unit, is used for determining whether system weight has taken place discharged mistake; If system weight has taken place discharged mistake, then notify described initialization performance element;
The initialization performance element is used for carrying out initialization operation when system has taken place the quantity of free buffer piece that weight discharges mistake and data storage less than predetermined threshold value.
Compared with prior art, the present invention has the following advantages:
In embodiments of the present invention, the quantity of idle cache blocks in the statistics buffer area, when the quantity of idle cache blocks in the buffer area during less than predetermined threshold value, system automatically performs initialization operation.Adopt the embodiment of the invention, when cache miss acquired a certain degree, system can automatically perform initialization operation, recovered reset condition, avoided system to occur because buffer memory exhausts crashing, and had improved the reliability of data message buffer system greatly.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the described data forwarding chip structure of a prior art schematic diagram;
Fig. 2 is a weight RAM structural representation;
Fig. 3 is the buffer memory management method flow chart of first embodiment of the invention;
Fig. 4 is the buffer memory management method flow chart of second embodiment of the invention;
Fig. 5 is the buffer memory management method flow chart of third embodiment of the invention;
Fig. 6 is the cache management device structure chart of fourth embodiment of the invention;
Fig. 7 is the cache management device structure chart of fifth embodiment of the invention;
Fig. 8 is the cache management device structure chart of sixth embodiment of the invention;
Fig. 9 is the data forwarding system schematic diagram of seventh embodiment of the invention.
Embodiment
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, the present invention is further detailed explanation below in conjunction with the drawings and specific embodiments.Obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
With reference to Fig. 3, be the buffer memory management method flow chart of first embodiment of the invention, described method comprises:
Step S301: the quantity of idle cache blocks in the statistics buffer area.
Step S302:, carry out initialization operation, the described buffer area of initialization when the quantity of free buffer piece of statistics during less than predetermined threshold value.
The embodiment of the invention one described method, the quantity of statistics free buffer piece, when the quantity of free buffer piece during less than predetermined threshold value, system automatically performs initialization operation.Adopt described method, when cache miss acquired a certain degree, system can automatically perform initialization operation, recovered reset condition, avoided system to occur because buffer memory exhausts crashing, and had improved the reliability of data message buffer system greatly.
Preferably, the method for the embodiment of the invention one may further include after step S302:
Step S303: the situation of described initialization operation write down or report interrupt, write down and analyze for system to central processing unit (CPU:Central Processing Unit).
By system situations such as time of automatically performing initialization operation, reason are added up, analyzed,, make system's operation stable more, reliable so that further optimize.
The difference of the embodiment of the invention two described methods and embodiment one is further to comprise determines that system's generation weight discharges mistake.Lose to acquire a certain degree and weight takes place when system cache and discharge when wrong, carry out initialization operation, can further improve reliability of system operation.
With reference to Fig. 4, be the buffer memory management method flow chart of second embodiment of the invention.
Step S401: the quantity of statistics free buffer piece.
Can but be not limited to adopt the quantity of following step S401a~step S401c statistics free buffer piece:
Step S401a: buffer memory volume residual counter is set.
Can but be not limited in caching management module, be provided with buffer memory volume residual counter buf_left_cnt, the quantity of real-time statistics caching management module current residual free buffer piece.
Step S401b: adopt buffer memory volume residual counter, the buffer memory volume residual is counted according to the distribution and the recovery of cache blocks.
Described counting mode can comprise: during system initialization, the value of buffer memory volume residual counter buf_left_cnt is set to the total quantity of cache blocks in the caching management module; When dispensing a cache blocks, the value of buf_left_cnt subtracts 1; When reclaiming a cache blocks, the value of buf_left_cnt adds 1.
In other embodiments of the invention, also can adopt other counting modes, for example, buffer memory usage quantity counter buf_usd_cnt is set, during system initialization, the value of buffer memory usage quantity counter buf_usd_cnt is set to 0, and when dispensing a cache blocks, the value of buf_usd_cnt adds 1; When reclaiming a cache blocks, the value of buf_usd_cnt subtracts 1; Deduct value in the counter according to the total quantity of cache blocks, can determine remaining buffer memory quantity.
Step S401c: the quantity of determining the free buffer piece according to the count value of counter.
Step S402: determine whether system weight has taken place discharged mistake.
Can but be not limited in caching management module, be provided with weight and discharge error flag position wght_err_flag, the value that discharges the error flag position according to weight determines whether system weight takes place discharge mistake.
Specifically can adopt following method to determine: for weight discharges error flag position wght_err_flag definition error sign and accurate indication.When system carries out initialization, described weight is discharged error flag position wght_err_flag be reset to accurate indication.Discharge when wrong when weight appears in system, when for example the application cache blocks weighted value that will discharge was greater than weighted value corresponding among the weight RAM, caching management module was changed to error flag with wght_err_flag automatically, and expression system generation weight discharges mistake; Otherwise weight discharges error flag position wght_err_flag and remains accurate indication.
In the practical application, can but be not limited to represent error flag and accurate indication with 0 and 1 respectively.
Step S403: discharge mistake if weight has taken place in system, and the quantity of current free buffer piece is during less than predetermined threshold value, caching management module is carried out initialization operation.
When system cache blocks occurred and discharges mistake and cause buffer memory to discharge, the value of buf_left_cnt can reduce gradually, up to exhausting.Can preestablish threshold value, when the value of buf_left_cnt is lower than predetermined threshold value and determines to have taken place weight release mistake, caching management module is carried out initialization operation, make the value zero clearing among the weight RAM, wght_err_flag resets, buf_left_cnt recovers initial set value, for example the total quantity of cache blocks in the caching management module.Each recovering state initial condition in the caching management module makes system can continue normal transceive data bag.
Described predetermined threshold value can specifically be determined according to actual conditions.For example, when the cache blocks total quantity was 1K in the system, predetermined threshold value was 16 or 32.
When adopting described method to carry out the buffer memory auto-initiation, owing to may also have some cache blocks of handling also not carry out releasing operation in each processing module of chip, and after weight RAM zero clearing, just discharge, may produce a spot of release mistake thus, output a few errors packet.But these do not influence the major function of system, can effectively avoid system frequently to crash, and have improved the reliability of system greatly.
Preferably, the method for the embodiment of the invention two may further include after step S403:
Step S404: the situation of described initialization operation write down or report interrupt, write down and analyze for system to CPU.
Adopt step S404, system adds up, analyzes situations such as time of automatically performing initialization operation, reasons, so that further optimize, makes system's operation stable more, reliable.
Adopt the embodiment of the invention two described methods, when system's generation weight discharged mistake and cache miss and acquires a certain degree, system can automatically perform initialization operation, recovers reset condition.And, owing to just carry out initialization when discharging mistake in system, even the quantity that makes the under normal circumstances current free buffer piece of system can initialization less than predetermined threshold value yet, thereby described method can solve weight leaks the situation that discharges and mistake takes place to discharge, avoid system to occur because buffer memory exhausts crashing, improved the reliability of data message buffer system greatly.
The embodiment of the invention three described methods are used for cache blocks quantity maximum that each processing module of system handling all less than the situation of cache blocks total quantity.At this moment, do not need to determine whether system weight takes place discharge mistake, and when cache miss acquired a certain degree, system automatically performed the beginningization operation, recovers normal.
With reference to Fig. 5, be the buffer memory management method flow chart of third embodiment of the invention.
Step S501: the quantity of statistics free buffer piece.
Step S501 is identical with step S401.
Step S502: when residue free buffer number of blocks was less than predetermined threshold value in the caching management module, caching management module automatically performed initialization operation.
Described predetermined threshold value can but the maximum that is not limited to take cache blocks quantity according to cache blocks total quantity and system determine.
If the cache blocks total quantity is buf_num in the caching management module, the maximum that system takies cache blocks quantity is buf_pro_max, and has system to take the maximum buf_pro_max of cache blocks quantity less than cache blocks total quantity buf_num.The maximum that system takies cache blocks quantity is the maximum that buf_pro_max is the cache blocks quantity that each processing module is being handled in the system.
Described predetermined threshold value is less than or equal to the difference that cache blocks total quantity buf_num and system take cache blocks quantity maximum buf_pro_max; Described system takies cache blocks quantity maximum buf_pro_max less than described cache blocks total quantity buf_num.
Usually, the cache blocks quantity that each processing module is being handled in the system should be less than its maximum.Therefore, under system's normal operation, the remaining cache number of blocks should deduct just in processed cache blocks quantity greater than the buffer memory total quantity in the caching management module.In case the remaining cache number of blocks occurring deducts just at processed cache blocks quantity, i.e. buf_left_cnt<buf_num-buf_pro_max less than the buffer memory total quantity.Can think to have taken place the buffer memory leakage.This moment, caching management module was carried out initialization operation, made the value zero clearing among the weight RAM, and wght_err_flag resets, and buf_left_cnt recovers initial set value, for example the total quantity of cache blocks in the caching management module.Each recovering state initial condition in the caching management module makes system can continue normal transmitting-receiving bag.
If described threshold value takies the difference of cache blocks quantity maximum buf_pro_max less than cache blocks total quantity buf_num and system, when residue free buffer number of blocks is less than described predetermined threshold value in the caching management module, caching management module automatically performs initialization operation, because under system's normal operation, the remaining cache number of blocks should deduct just in processed cache blocks quantity greater than the buffer memory total quantity in the caching management module, can lower caching management module less than difference and carry out initialized frequency so threshold value is set, improve the stability of system.Certainly, threshold value also is fine greater than the difference that cache blocks total quantity buf_num and system take cache blocks quantity maximum buf_pro_max, and for example difference is 100 o'clock, threshold value can be set be 100,101,99 etc. and all can.
Preferably, the method for the embodiment of the invention three can also further comprise after step S502:
Step S503: the situation that automatically performs initialization operation is write down or report interruption, write down and analyze for system.
Adopt step S503, system adds up, analyzes situations such as time of automatically performing initialization operation, reasons, and system is further optimized, and makes system's operation stable more, reliable.
Adopt the embodiment of the invention three described methods, when occurring cache miss and cache miss to some, system can automatically perform initialization operation, recovers reset condition, avoid system to occur because buffer memory exhausts crashing, improved the reliability of data message buffer system greatly.And, if described threshold value then can lower caching management module and carry out initialized frequency, the stability of raising system less than the difference that cache blocks total quantity buf_num and system take cache blocks quantity maximum buf_pro_max.
Corresponding to the embodiment of the invention one described method, the embodiment of the invention also provides a kind of cache management device.
With reference to Fig. 6, be the cache management device structure chart of fourth embodiment of the invention, described device comprises: free buffer piece statistic unit 601 and initialization performance element 602.
Free buffer piece statistic unit 601 is used for the quantity that buffer area is added up the free buffer piece;
Initialization performance element 602 when being used for the quantity of free buffer piece when statistics less than predetermined threshold value, is carried out initialization operation, the described buffer area of initialization.
Further, free buffer piece statistic unit 601 can comprise: counting unit 601a and statistic unit 601b.
Counting unit 601a is used for according to the distribution and the recovery of cache blocks the buffer memory volume residual being counted;
Statistic unit 601b is used for determining according to the count value of counting unit 601a the quantity of the idle cache blocks of buffer area.
Further, described device can also comprise record cell 603, is used for the initialization operation of register system.
Further, described device can also comprise and interrupt reporting unit 604, is used for initialization operation to system and reports and interrupt to CPU.
Adopt the embodiment of the invention one described device, lose when acquiring a certain degree when system cache, system can in time carry out initialization operation, recovers reset condition, avoid system to occur because buffer memory exhausts crashing, improved the reliability of data message buffer system greatly.
Corresponding to the embodiment of the invention two described methods, the embodiment of the invention also provides a kind of cache management device.
With reference to Fig. 7, be the cache management device structure chart of fifth embodiment of the invention, described device comprises: free buffer piece statistic unit 701, weight discharge wrong determining unit 702 and initialization performance element 703.
Free buffer piece statistic unit 701, the quantity that is used to add up the free buffer piece.
Weight discharges wrong determining unit 702, is used for determining whether system weight has taken place discharged mistake; If system weight has taken place discharged mistake, then notify described initialization performance element 703.
Initialization performance element 703 is used for carrying out initialization operation when system has taken place quantity that weight discharges wrong and current free buffer piece less than predetermined threshold value.
Further, free buffer piece statistic unit 701 can comprise: counting unit 701a and statistic unit 701b.
Counting unit 701a is used for according to the distribution and the recovery of cache blocks the buffer memory volume residual being counted;
Statistic unit 701b is used for determining according to the count value of counting unit 701a the quantity of the idle cache blocks of buffer area.
Further, in device, be provided with weight and discharge the error flag position, be used for designation system and whether weight takes place discharge when wrong, weight discharges wrong determining unit 702, and the state that is used for discharging according to weight the error flag position determines whether system weight has taken place discharged mistake; If system weight has taken place discharged mistake, then notify described initialization performance element.
Further, described device can also comprise that record cell 704 and interruption report unit 705, record cell 704 and interrupt reporting the specific implementation of unit 705 can be with reference to the related content of fourth embodiment of the invention.
Adopt the embodiment of the invention five described devices, when system generation weight discharges mistake and cache miss and acquires a certain degree, system can in time carry out initialization operation, recover reset condition, avoid system to occur because buffer memory exhausts crashing, improved the reliability of data message buffer system greatly.And, just carry out initialization owing to discharge when wrong in system, even the quantity that makes the under normal circumstances preceding free buffer piece of system can initialization less than predetermined threshold value yet, thereby reduced the system initialization frequency, improved the stability of system.
Corresponding to the embodiment of the invention three described methods, the embodiment of the invention also provides a kind of cache management device.
With reference to Fig. 8, be the cache management device structure chart of sixth embodiment of the invention; Described device comprises: free buffer piece statistic unit 801 and initialization performance element 802.
Free buffer piece statistic unit 801, the quantity that is used to add up the free buffer piece;
Initialization performance element 802 when being used for quantity when described current free buffer piece less than predetermined threshold value, is carried out initialization operation.
Wherein, described predetermined threshold value takies the peaked difference of cache blocks quantity less than cache blocks total quantity and system; Described system takies cache blocks quantity maximum less than described cache blocks total quantity.
Further, free buffer piece statistic unit 801 comprises: counting unit and statistic unit.The specific implementation of counting unit and statistic unit can be with reference to the related content of fifth embodiment of the invention
Further, described device comprises that also record cell and interruption report the unit.Record cell and interrupt reporting the specific implementation of unit can be with reference to the related content of fourth embodiment of the invention.
The embodiment of the invention six described devices, be used to take the system of cache blocks quantity maximum less than described cache blocks total quantity, when cache miss and cache miss occurring to some, the initialization performance element can carry out initialization operation with system automatically, the recovery system reset condition, avoid system to occur because buffer memory exhausts crashing, improved the reliability of data message buffer system greatly.And, if described threshold value then can lower caching management module and carry out initialized frequency, the stability of raising system less than the difference that cache blocks total quantity buf_num and system take cache blocks quantity maximum buf_pro_max.
Described method of the embodiment of the invention and device are not only applicable to the cache management scheme of data forwarding chip, use the weight cache management and similar scheme is all used for various.
The embodiment of the invention also provides a kind of data forwarding system.
With reference to Fig. 9, be the data forwarding system schematic diagram of seventh embodiment of the invention.
Described system comprises: the plug-in data buffer 95 of data forwarding chip 90 and chip.Described data forwarding chip 90 comprises: input processing module 91, intermediate process module 92, output processing module 93, caching management module 94.
The plug-in data buffer 95 of chip is used for the control according to data forwarding chip 90, storage or deleted data.
Described caching management module 94 comprises: free buffer piece statistic unit 941 and initialization performance element 943.
Free buffer piece statistic unit 941 is used for the quantity of the idle cache blocks of statistics memory.
Initialization performance element 942 when being used for quantity when the free buffer piece of data storage less than predetermined threshold value, is carried out initialization operation.
Further, described caching management module 94 can also comprise: weight discharges wrong determining unit, is used for determining whether system weight has taken place discharged mistake.If system weight has taken place discharged mistake, then notify initialization performance element 942.Initialization performance element 942 is used for discharging when wrong when the quantity of free buffer piece less than predetermined threshold value and system weight has taken place, and carries out initialization operation.
Further, described predetermined threshold value can be less than or equal to the cache blocks total quantity and system takies the peaked difference of cache blocks quantity; Wherein, described system takies cache blocks quantity maximum less than described cache blocks total quantity.
Described caching management module any cache management device as described above is described.
Adopt the described system of the embodiment of the invention, lose when acquiring a certain degree when system cache, system can in time carry out initialization operation, recovers reset condition, avoid system to occur because buffer memory exhausts crashing, improved the reliability of data message buffer system greatly.
In sum, in embodiments of the present invention, the quantity of idle cache blocks in the statistics buffer area, when the quantity of the free buffer piece of statistics during less than predetermined threshold value, system automatically performs initialization operation, the initialization buffer area.Adopt the embodiment of the invention, lose when acquiring a certain degree, can automatically perform initialization operation, recover reset condition, avoid system deadlock to occur because buffer memory exhausts, improved the reliability of data message buffer system greatly when system cache.
One of ordinary skill in the art will appreciate that all or part of step that realizes in the foregoing description method is to instruct relevant hardware to finish by program, described program can be stored in the computer read/write memory medium, this program when carrying out, the quantity that comprises the steps: to add up idle cache blocks in the buffer area; When the quantity of free buffer piece of statistics during, carry out initialization operation, the described buffer area of initialization less than predetermined threshold value.
More than to a kind of buffer memory management method provided by the present invention and device, data forwarding system, be described in detail, used specific case herein principle of the present invention and execution mode are set forth, the explanation of above embodiment just is used for helping to understand method of the present invention and core concept thereof; Simultaneously, for one of ordinary skill in the art, according to thought of the present invention, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.

Claims (8)

1. a buffer memory management method is characterized in that, described method comprises:
The quantity of idle cache blocks in the statistics buffer area;
When the quantity of free buffer piece of statistics during, determine whether system weight has taken place discharged mistake less than predetermined threshold value; If system weight has taken place discharged mistake, carry out initialization operation, the described buffer area of initialization; Otherwise do not carry out initialization operation.
2. method according to claim 1 is characterized in that, whether described definite system weight release mistake has taken place comprises:
Weight is set discharges the error flag position, when cache blocks weighted value that application will discharge in greater than weight RAM during corresponding weighted value, putting described weight, to discharge the error flag position be error flag;
When described weight release error flag position is error flag, determine that system weight has taken place discharged mistake.
3. method according to claim 2 is characterized in that, during described execution initialization operation, described weight is discharged the error flag position be reset to accurate indication.
4. method according to claim 1 is characterized in that, described predetermined threshold value takies the peaked difference of cache blocks quantity less than cache blocks total quantity and system.
5. according to each described method of claim 1 to 4, it is characterized in that the quantity of idle cache blocks comprises in the described statistics buffer area:
Adopt counter, the buffer memory volume residual is counted according to the distribution and the recovery of cache blocks;
Determine the quantity of free buffer piece according to the count value of described counter.
6. a cache management device is characterized in that, described device comprises:
Free buffer piece statistic unit, the quantity that is used for adding up the idle cache blocks of buffer area;
Weight discharges wrong determining unit, is used for determining whether system weight has taken place discharged mistake; If system weight has taken place discharged mistake, then notify the initialization performance element;
The initialization performance element is used for carrying out initialization operation, initialization described buffer area when system has taken place the quantity of free buffer piece that weight discharges wrong and statistics less than predetermined threshold value.
7. device according to claim 6 is characterized in that, described free buffer piece statistic unit comprises:
Counting unit is counted the buffer memory volume residual according to the distribution and the recovery of cache blocks;
Statistic unit is used for determining according to the count value of described counting unit the quantity of the idle cache blocks of buffer area.
8. data forwarding system, described system comprises: data forwarding chip and data storage; Described data forwarding chip comprises input processing module, intermediate process module, output processing module and caching management module; It is characterized in that:
Described caching management module comprises: free buffer piece statistic unit, weight discharge wrong determining unit and initialization performance element;
Free buffer piece statistic unit is used for the quantity of the idle cache blocks of statistics memory;
Weight discharges wrong determining unit, is used for determining whether system weight has taken place discharged mistake; If system weight has taken place discharged mistake, then notify described initialization performance element;
The initialization performance element is used for carrying out initialization operation when system has taken place the quantity of free buffer piece that weight discharges mistake and data storage less than predetermined threshold value.
CN200910000387XA 2009-01-07 2009-01-07 Buffer management method and apparatus, data forwarding system Expired - Fee Related CN101478481B (en)

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