CN101471740A - Method, device and system for measuring SDH network element transmission time delay and clock synchronization - Google Patents
Method, device and system for measuring SDH network element transmission time delay and clock synchronization Download PDFInfo
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- CN101471740A CN101471740A CNA2007103041573A CN200710304157A CN101471740A CN 101471740 A CN101471740 A CN 101471740A CN A2007103041573 A CNA2007103041573 A CN A2007103041573A CN 200710304157 A CN200710304157 A CN 200710304157A CN 101471740 A CN101471740 A CN 101471740A
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Abstract
The invention discloses a method for detecting the transmission delay and the clock synchronization of a synchronous digital hierarchy (SDH) network element, and a device and a system thereof, which solve the problem that the prior art fails to accurately detect the transmission delay of a network element when utilizing the E1 to implement the message interaction, wherein an SDH optical interface is arranged at one side of the network element and a plesiochronous digital hierarchy (PDH) electrical interface is arranged at the other side of the network element. The method comprises the following steps: mapping the frame header of the PDH signal of the PDH electrical interface to the frame header of a virtual container by means of byte synchronization mapping; measuring the first moment of transmitting the frame header of the PDH signal of the PDH electrical interface through the PDH electrical interface; measuring the second moment of transmitting the frame header of the virtual container corresponding to the SDH optical interface in a synchronous transmission module level N (STM-N) frame relative to the frame header of the STM-N; and calculating the transmission delay of the SDH network element according to the first moment, the second moment and the time offset. By adopting the byte synchronization mapping mode, the method can determine the shared test point of the input and the output and can calculate the transmission delay of the SDH network element.
Description
Technical field
The invention belongs to communication technical field, particularly measure SDH network element propagation delay time and the synchronous methods, devices and systems of clock.
Background technology
Existing communication system, as 3G, telephone exchange, router etc., (Time Division Multiplexing is TDM) on the transmission network to be carried on time division multiplexing mostly.The TDM transmission network comprise synchronous digital hierarchy (Synchronous Digital Hierarchy, SDH) and/or PDH (Pseudo-synchronous Digital Hierarchy) (PlesiochronousDigital Hierarchy, PDH) net.Wherein, E1 is the frame structure of the digital transmission link of International Telecommunication Association's regulation, is widely used in Europe, and China also adopts this standard.Can adopt N level synchronous transfer module (Synchronous Transmission Module level N, STM-N) frame carries E1, and is concrete, E1 is carried among the container VC12 in the STM-N frame.No matter be that direction of transmission of messages, in through the same network element process of SDH, just when the same network element of input and output, float in container VC12 position in the STM-N frame, promptly can change, the position in the STM-N frame of VC12 place can be obtained by the frame head pointer indication partly of STM-N frame.When utilizing E1 to realize interacting message, this message can be the optical interface of SDH by a side, opposite side then is that the SDH network element of the electrical interface of PDH transmits, because business demand, the time delay that produces when needing to determine message through this SDH network element accurately, utilize E1 to realize interacting message and can't accurately measure in the prior art, interactive messages is in the propagation delay time of this network element.
Summary of the invention
Utilize E1 to realize interacting message in order to solve to accurately measure in the prior art, interactive messages is the optical interface of SDH in a side, opposite side then is the problem of propagation delay time of network element of the electrical interface of PDH, the embodiment of the invention provides a kind of method of the SDH of measurement network element propagation delay time, be applicable to that a side is the SDH optical interface, opposite side is the SDH network element of PDH electrical interface, comprising:
Use the byte of sync mapping frame head of PDH electrical interface PDH signal to be mapped to the frame head of virtual container;
The frame head of measuring PDH electrical interface PDH signal the PDH electrical interface transmit first constantly;
The frame head of measuring SDH optical interface STM-N frame the SDH optical interface transmit second constantly;
Obtain the time offset of the frame head of the virtual container of SDH optical interface correspondence in the STM-N frame with respect to the STM-N frame head;
Calculate SDH network element propagation delay time according to first moment, second moment and time offset.
The embodiment of the invention also provides the clock synchronizing method in a kind of SDH net simultaneously, comprising:
Mutual clock synchronization information between principal and subordinate's clock source;
Obtain synchronizing information from the clock source at the transmitting time t1 of master clock source, from the time of reception t2 of clock source, from the transmitting time t3 of clock source with at the time of reception t4 of master clock source;
Utilize the described SDH network element propagation delay time that obtains in the method for t1, t2, t3, t4 and the above-mentioned a kind of SDH of measurement network element propagation delay time to calculate clock correction Offset, adjust the clock of self from the clock source according to Offset.
The embodiment of the invention also provides a kind of device of the SDH of measurement network element propagation delay time simultaneously, is applicable to that measuring a side is the SDH optical interface, and opposite side is the SDH network element of PDH electrical interface, comprising:
First measurement module: the frame head that is used to measure PDH electrical interface PDH signal is in first moment that the PDH electrical interface transmits, and the frame head of described PDH signal uses the byte of sync mapping to be mapped to the frame head of virtual container;
Second measurement module: the frame head that is used to measure SDH optical interface STM-N frame the SDH optical interface transmit second constantly;
Acquisition module: be used for obtaining in the frame head of the virtual container of STM-N frame SDH optical interface correspondence time offset with respect to the STM-N frame head;
Time-delay calculation module: be used for calculating SDH network element propagation delay time according to first moment, second moment and time offset.
The embodiment of the invention also provides the clock system in a kind of SDH net simultaneously, comprising:
Information interaction module: be used for mutual clock synchronization information between principal and subordinate's clock source;
Obtain module: obtain synchronizing information from the clock source at the transmitting time t1 of master clock source, from the time of reception t2 of clock source, from the transmitting time t3 of clock source with at the time of reception t4 of master clock source;
The clock correction computing module: the described SDH network element propagation delay time that is used for utilizing the method for t1, t2, t3, t4 and the above-mentioned a kind of SDH of measurement network element propagation delay time to obtain calculates clock correction Offset, adjusts the clock of self according to Offset from the clock source.
The specific embodiments that is provided by the invention described above as can be seen, just because of using the byte of sync mapped mode, just can be mapped to the frame head position of VC-12 for the frame head of PDH electrical interface E1, optical interface side at SDH, method with Frame_Head+Pointer is measured, obtain the moment of the frame head of SDH electrical interface side VC-12, make to calculate SDH network element propagation delay time.
Description of drawings
Fig. 1 is the first embodiment method flow diagram provided by the invention;
Fig. 2 is the second embodiment method flow diagram provided by the invention;
Fig. 3 is the 3rd an embodiment method flow diagram provided by the invention;
Fig. 4 is the 4th an embodiment method flow diagram provided by the invention;
Fig. 5 is the 6th an embodiment message transmitting process schematic diagram provided by the invention;
Fig. 6 is the 6th an embodiment method flow diagram provided by the invention;
Fig. 7 is the 7th an embodiment device structure chart provided by the invention;
Fig. 8 is the 8th an embodiment system construction drawing provided by the invention.
Embodiment
In order to make those skilled in the art person understand the present invention program better, the present invention is described in further detail below in conjunction with drawings and embodiments.Below with in carrying out the clock signal transmission course, the message of carrying clock signal by master clock source to from the clock source side to and be that example describes from the clock source to the master clock source direction.Process is similar when utilizing E1 to realize other interacting message, also measures SDH network element propagation delay time from the both direction of interacting message respectively.
First embodiment provided by the invention is a kind of method of the SDH of measurement network element propagation delay time, what measure in the present embodiment is that a side is the SDH optical interface, opposite side is the SDH network element of PDH electrical interface, the PDH electrical interface connect master clock source (herein connect master clock source, can be directly to connect master clock source, also can be to connect master clock source by other network element in the transmission network, connecing roughly the same afterwards) from the clock Source Description, be master clock direction (master clock source is to the direction from the clock source) input interface, the SDH optical interface connects from the clock source, be master clock direction output interface, the SDH network element propagation delay time of measuring is that master clock source arrives from the clock source side to SDH network element propagation delay time, method flow comprises as shown in Figure 1:
Step 101: use the byte of sync mapping frame head of PDH electrical interface E1 to be mapped to the frame head of VC-12;
Mapping is a kind of at SDH network boundary place (for example SDH/PDH boundary), tributary signal is fitted within the process of virtual container VC (as VC-12, VC-4).Resemble that we often use with various speed (as E4140Mbit/s, E1 2Mbit/s) signal earlier through justification, be respectively charged into separately in the corresponding standard container, add corresponding path overhead, form the process of corresponding virtual container separately.
The byte of sync mapping is that a kind of mapping signal that requires has the block frame structure that byte is a unit, and it is synchronous with net, need not information byte can be packed into the mapping mode of assigned position in the VC of any speed adjustment, as the position of VC that the frame head of PDH electrical interface E1 is packed into, the frame head that is about to PDH electrical interface E1 is mapped to the frame head of VC-12.Be that example describes with VC12 carrying E1 in the present embodiment, other virtual container VC carrying tributary signal as: VC4 carrying E4 is roughly the same.
Step 102: the moment Frame_Head that obtains the SDH optical interface STM-N frame output frame head of network element by the external equipment test
Master_Slave_SDH_out
Step 103: indicate the pointer offset amount Pointer of acquisition VC12 by the pointer of the frame head part of STM-N frame at the SDH optical interface at the SDH of network element optical interface
Master_Slave_SDH_out, promptly the VC12 frame head in the STM-N frame with respect to the time offset of the frame head of STM-N frame.
Step 104: the frame head input time Frame_Head that obtains the PDH electrical interface E1 of network element by the external equipment test
Master_Slave_PDH_in
Step 105: according to Frame_Head
Master_Slave_SDH_out, Pointer
Master_Slave_SDH_outAnd Frame_Head
Master_Slave_PDH_inCalculate network element master clock direction SDH network element propagation delay time the one Master_Slave_Delay (i), in one direction during transmission of messages through a SDH network element, i represents the order label of this SDH network element, and (as: message of master clock direction will be through 2 SDH network elements, first network element order label of process is 1, second network element order label of process is 2), concrete formula is as follows:
The one Master_Slave_Delay (i)=(Frame_Head
Master_Slave_SDH_out+ Pointer
Master_Slave_SDH_out)-Frame_Head
Master_Slave_PDH_in
Because use the byte of sync mapped mode, like this, just can be mapped to the frame head position of VC-12 for the frame head of PDH electrical interface E1.Under this mapped mode, in the optical interface side of SDH, measure with the method for Frame_Head+Pointer, obtain the moment of the frame head of SDH electrical interface side VC-12; Electrical interface side at PDH E1, frame head with E1 is measured, and the frame head of PDH electrical interface E1 is mapped to the frame head of VC-12, also just obtains the moment of the frame head of PDH electrical interface side VC-12, so two frame head positions that measurement point all is VC-12, just the frame head position of E1.And then calculate SDH network element propagation delay time.
Second embodiment provided by the invention is a kind of method of the SDH of measurement network element propagation delay time, what measure in the present embodiment is that a side is the SDH optical interface, opposite side is the SDH network element of PDH electrical interface, the PDH electrical interface connects from the clock source, for from clockwise (direction) input interface from the clock source to master clock source, the SDH optical interface connects master clock source, for from the clockwise output interface, the SDH network element propagation delay time of measuring is to master clock source direction SDH network element propagation delay time from the clock source, scheme among method and the embodiment one is similar, step 201 is identical with step 101, and method flow comprises as shown in Figure 2:
Step 202: the moment Frame_Head that obtains the SDH optical interface STM-N frame output frame head of network element by the external equipment test
Slave_Master_SDH_out
Step 203: indicate the pointer offset amount Pointer of acquisition VC12 by the pointer of the frame head part of STM-N frame at the SDH optical interface at the SDH of network element optical interface
Slave_Master_SDH_out, promptly the VC12 frame head in the STM-N frame with respect to the time offset of the frame head of STM-N frame.
Step 204: the frame head input time Frame_Head that obtains the PDH electrical interface E1 of network element by the external equipment test
Slave_Master_PDH_in
Step 205: according to Frame_Head
Slave_Master_SDH_out, Pointer
Slave_Master_SDH_outAnd Frame_Head
Slave_Master_PDH_inCalculate network element from clockwise SDH network element propagation delay time the one Slave_Master_Delay (i), concrete formula is as follows:
The one Slave_Master_Delay (i)=(Frame_Head
Slave_Master_SDH_out+ Pointer
Slave _ Master_SDH_out)-Frame_Head
Slave_Master_PDH_in
The 3rd embodiment provided by the invention is a kind of method of the SDH of measurement network element propagation delay time, what measure in the present embodiment is that a side is the SDH optical interface, opposite side is the SDH network element of PDH electrical interface, the PDH electrical interface connects from the clock source, be master clock direction output interface, the SDH optical interface connects master clock source, be master clock direction input interface, the SDH network element propagation delay time of measuring is that master clock source arrives from the clock source side to SDH network element propagation delay time, scheme among method and the embodiment one is similar, step 301 is identical with step 101, and method flow comprises as shown in Figure 3:
Step 302: the moment Frame_Head that obtains the SDH optical interface STM-N frame input frame head of network element by the external equipment test
Master_Slave_SDH_in
Step 303: indicate the pointer offset amount Pointer of acquisition VC12 by the pointer of the frame head part of STM-N frame at the SDH optical interface at the SDH of network element optical interface
Master_Slave_SDH_in, promptly the VC12 frame head in the STM-N frame with respect to the time offset of the frame head of STM-N frame.
Step 304: the frame head output time Frame_Head that obtains the PDH electrical interface E1 of network element by the external equipment test
Master_Slave_PDH_out
Step 305: according to Frame_Head
Master_Slave_SDH_in, Pointer
Master_Slave_SDH_inAnd Frame_Head
Master_Slave_PDH_outCalculate network element master clock direction SDH network element propagation delay time the 2nd Master_Slave_Delay (i), concrete formula is as follows:
The 2nd Master_Slave_Delay (i)=Frame_Head
Master_Slave_PDH_out-(Frame_Head
Master_Slave_SDH_in+ Pointer
Master_Slave_SDH_in)
The 4th embodiment provided by the invention is a kind of method of the SDH of measurement network element propagation delay time, what measure in the present embodiment is that a side is the SDH optical interface, opposite side is the SDH network element of PDH electrical interface, the PDH electrical interface connects master clock source, for from the clockwise output interface, the SDH optical interface connects from the clock source, for from the clockwise input interface, the SDH network element propagation delay time of measuring is to master clock source direction SDH network element propagation delay time from the clock source, scheme among method and the embodiment three is similar, step 401 is identical with step 301, and method flow comprises as shown in Figure 4:
Step 402: the moment Frame_Head that obtains the SDH optical interface STM-N frame input frame head of network element by the external equipment test
Slave_Master_SDH_in
Step 403: indicate the pointer offset amount Pointer of acquisition VC12 by the pointer of the frame head part of STM-N frame at the SDH optical interface at the SDH of network element optical interface
Slave_Master_SDH_in, promptly the VC12 frame head in the STM-N frame with respect to the time offset of the frame head of STM-N frame.
Step 404: the frame head output time Frame_Head that obtains the PDH electrical interface E1 of network element by the external equipment test
Slave_Master_PDH_out
Step 405: according to Frame_Head
Slave_Master_SDH_in, Pointer
Slave_Master_SDH_inAnd Frame_Head
Slave_Master_PDH_outCalculate network element from clockwise SDH network element propagation delay time the 2nd Slave_Master_Delay (i), concrete formula is as follows:
The 2nd Slave_Master_Delay (i)=Frame_Head
Slave_Master_PDH_out-(Frame_Head
Slave_Master_SDH_in+ Pointer
Slave_Master_SDH_in)
The 5th embodiment provided by the invention is a kind of method of the SDH of measurement network element propagation delay time, and what measure in the present embodiment is that both sides all are the SDH network elements of SDH optical interface.
For E1, need all be that the pointer of the SDH network element of SDH optical interface is tried to achieve VC12 time delay of the floating position correspondence when output and the input respectively in the STM-N frame structure by both sides, time in conjunction with the frame head input and output of the STM-N that measures, can obtain:
Both sides all are SDH network element master clock direction SDH network element propagation delay time the 3rd Master_Slave_Delay (i)=[Frame_Head of SDH optical interface
Master_Slave_out+ Pointer
Master_Slave_out]-[Frame_Head
Master_Slave_in+ Pointer
Master_Slave_in]
Frame_Head wherein
Master_Slave_outExpression: test obtains the moment of the output interface STM-N frame output frame head of network element on the master clock direction.Pointer
Master_Slave_outExpression: on the master clock direction VC12 of network element delivery outlet carrying E1 in the STM-N frame with respect to the time offset of STM-N frame head.Frame_Head
Master_Slave_inExpression: test obtains the moment of the input interface STM-N frame output frame head of network element on the master clock direction.Pointer
Master_Slave_inExpression: on the master clock direction VC12 of network element input port carrying E1 in the STM-N frame with respect to the time offset of STM-N frame head.
Both sides all are that the SDH network element of SDH optical interface is from clockwise SDH network element propagation delay time Three S's lave_Master_Delay (i)=[Frame_Head
Slave_Master_out+ Pointer
Slave_Master_out]-[Frame_Head
Slave_Master_in+ Pointer
Slave_Master_in]
Frame_Head wherein
Slave_Master_outExpression: test obtains the moment of the output interface STM-N frame output frame head of network element from the clockwise.Pointer
Slave_Master_outExpression: from clockwise the VC12 of network element delivery outlet carrying E1 the STM-N frame with respect to the time offset of STM-N frame head.Frame_Head
Slave_Master_inExpression: test obtains the moment of the input interface STM-N frame output frame head of network element from the clockwise.Pointer
Slave_Master_inExpression: from clockwise the VC12 of network element input port carrying E1 the STM-N frame with respect to the time offset of STM-N frame head.
According to embodiment one to embodiment five, visible SDH network element propagation delay time comprises:
SDH network element master clock direction SDH network element propagation delay time the one Master_Slave_Delay (i);
The SDH network element is from clockwise SDH network element propagation delay time the one Slave_Master_Delav (i);
SDH network element master clock direction SDH network element propagation delay time the 2nd Master_Slave_Delay (i);
The SDH network element is from clockwise SDH network element propagation delay time the 2nd Slave_Master_Delay (i);
SDH network element master clock direction SDH network element propagation delay time the 3rd Master_Slave_Delav (i);
The SDH network element is from clockwise SDH network element propagation delay time Three S's lave_Master_Delay (i).
Can utilize E1 to realize in the prior art from clock and the mutual clock synchronization message of master clock.Message transmitting process as shown in Figure 5 in the clock synchronizing method of principal and subordinate's method of synchronization.As seen from the figure, Tm is a master clock, Ts is from clock, master clock and be nonsynchronous from clock, there is clock correction (offset), need transmission and reception and the two-way delay inequality of principal and subordinate's clockwise SDH network element, make from clock and correctly learn this offset, and then adjust self clock according to this offset by information between principal and subordinate's clock.Specifically can utilize following formula to calculate Offset:
Offset=[(t2-t1)-(t4-t3)]/(Master_Slave_Delay-Slave_Master_Delay) in 2-(Master_Slave_Delay-Slave_Master_Delay)/2 formula is two-way delay inequality.
Transmit after receive time delay symmetry in some systems, there is not difference, the assembly average of the two-way delay inequality of (as: agreement IEEE1588) SDH network element in the related protocol, it meets average is 0 normal distribution, Offset=[(t2-t1 then)-(t4-t3)]/2, but it is asymmetric for transmit after receive time delay in some systems, there is very big difference, need a kind of method to determine the time delay of each SDH network element, and then obtain the two-way delay inequality of SDH network element, the 6th embodiment provided by the invention is the clock synchronizing method in a kind of SDH net, and method flow comprises as shown in Figure 6:
Step 501: master clock source sends Sync message and arrives from clock, and the master clock source record sends the time t1 of this Sync message; Receive the Sync message that master clock source is sent from the clock source, and from the clock log source this message t2 time of advent.
Step 502: master clock source sends Follow up message and arrives from the clock source, and this message comprises t1;
Like this, obtain the time t1 that master clock source sends Sync message from the clock source.
Step 503: send Delay_Req message to master clock source from the clock source, and from clock source record transmitting time t3.
Step 504: master clock source is received the Delay_Req message of sending from the clock source, and master clock source writes down this Delay_Req t4 time of advent.
Step 505: master clock source sends Delay_Resp message to from the clock source, comprises t4 in this message.
Like this, obtain the time t4 that Delay_Req message arrives master clock source from the clock source.
So far, obtain t1, t2, four time values of t3, t4 from the clock source.
Step 506: obtain master clock source to each SDH network element propagation delay time from the clock source, concrete scheme is:
If this SDH network element is that a side is SDH optical interface (connecing from the clock source), opposite side is the SDH network element of PDH electrical interface (connecing master clock source), then carries out with each step among the embodiment 1 and calculates this SDH network element the one Master_Slave_Delay (i).
If this SDH network element is that a side is SDH optical interface (connecing master clock source), opposite side is the SDH network element of PDH electrical interface (connecing from the clock source), then carries out with each step among the embodiment 3 and calculates this SDH network element the 2nd Master_Slave_Delay (i).
If this SDH network element is that both sides all are the SDH network elements of SDH optical interface, then calculate this SDH network element the 3rd Master_Slave_Delay (i) according to embodiment 5.
Step 507: according to master clock source to from the clock source each network element propagation delay time obtain master clock source to from clock source propagation delay time Master_Slave_Delay.
Step 508: obtain from the clock source to master clock source that the concrete scheme of each SDH network element propagation delay time is:
If this SDH network element is that a side is SDH optical interface (connecing master clock source), opposite side is that the SDH network element of PDH electrical interface (connecing from the clock source) is then carried out with each step the embodiment 2 and calculated this SDH network element the one Slave_Master_Delay (i).
If this SDH network element is that a side is SDH optical interface (connecing from the clock source), opposite side is that the SDH network element of PDH electrical interface (connecing master clock source) is then carried out with each step among the embodiment 4 and calculated this SDH network element the 2nd Slave_Master_Delay (i).
If this SDH network element is that both sides all are the SDH network elements of SDH optical interface, then calculate this SDH network element Three S's lave_Master_Delay (i) according to embodiment 5
Step 509: according to from the clock source to master clock source each network element propagation delay time obtain from the clock source to master clock source propagation delay time Slave_Master_Delay.
Step 510:, then can utilize following formula to calculate Offset according to t1, t2, t3, t4, Master_Slave_Delay and Slave_Master_Delay:
Offset=[(t2-t1)-(t4-t3)]/2-(Master_Slave_Delay-Slave_Master_Delay)/2
Step 511: the clock of adjusting self from clock according to Offset.
The 7th embodiment provided by the invention is a kind of device of the SDH of measurement network element propagation delay time, is applicable to that measuring a side is the SDH optical interface, opposite side be the PDH electrical interface its structure of SDH network element as shown in Figure 7, comprising:
First measurement module 601: the frame head that is used to measure PDH electrical interface PDH signal arrive the PDH electrical interface first constantly, the frame head of described PDH signal uses the byte of sync mapping to be mapped to the frame head of virtual container;
Second measurement module 602: the frame head that is used to measure SDH optical interface STM-N frame arrive the SDH electrical interface second constantly;
Acquisition module 603: be used for obtaining in the frame head of the virtual container of STM-N frame SDH optical interface correspondence time offset with respect to the STM-N frame head;
Time-delay calculation module 604: be used for calculating SDH network element propagation delay time according to first moment, second moment and time offset.
The 8th embodiment provided by the invention is the clock system in a kind of SDH net, and its structure comprises as shown in Figure 8:
Information interaction module 701: be used for mutual clock synchronization information between principal and subordinate's clock source;
Obtain module 702: obtain synchronizing information from the clock source at the transmitting time t1 of master clock source, from the time of reception t2 of clock source, from the transmitting time t3 of clock source with at the time of reception t4 of master clock source;
Clock correction computing module 703: be used to utilize t1, t2, t3, t4 and aforesaid SDH network element propagation delay time to calculate clock correction Offset, adjust the clock of self from the clock source according to Offset.
Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of claim of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.
Claims (11)
1, a kind of method of measuring SDH network element propagation delay time is applicable to that a side is the SDH optical interface, and opposite side is the SDH network element of PDH electrical interface, it is characterized in that, comprising:
Use the byte of sync mapping frame head of PDH electrical interface PDH signal to be mapped to the frame head of virtual container;
The frame head of measuring PDH electrical interface PDH signal the PDH electrical interface transmit first constantly;
The frame head of measuring SDH optical interface STM-N frame the SDH optical interface transmit second constantly;
Obtain the time offset of the frame head of the virtual container of SDH optical interface correspondence in the STM-N frame with respect to the STM-N frame head;
Calculate SDH network element propagation delay time according to first moment, second moment and time offset.
2, the method for claim 1, it is characterized in that, the PDH electrical interface is an input interface, the SDH optical interface is an output interface, described first constantly is the input time of the frame head input PDH electrical interface of PDH signal, described second constantly is the output time of the frame head of STM-N frame by the output of SDH electrical interface, and obtaining SDH network element propagation delay time is that the concrete formula of SDH network element first propagation delay time is as follows:
SDH network element first propagation delay time=(the second moment+time offset)-first constantly.
3, method as claimed in claim 2 is characterized in that, the PDH electrical interface connects master clock source, and SDH network element first propagation delay time is master clock direction SDH network element first propagation delay time.
4, method as claimed in claim 2 is characterized in that, the PDH electrical interface connects from the clock source, and SDH network element first propagation delay time is from clockwise SDH network element first propagation delay time.
5, the method for claim 1, it is characterized in that, the PDH electrical interface is an output interface, the SDH optical interface is an input interface, described first constantly is the output time of the frame head of PDH signal by the output of PDH electrical interface, described second constantly is the input time of the frame head input SDH electrical interface of STM-N frame, and obtaining SDH network element propagation delay time is that the concrete formula of SDH network element second propagation delay time is as follows:
SDH network element second propagation delay time=first constantly-(the second moment+time offset).
6, method as claimed in claim 5 is characterized in that, the SDH electrical interface connects master clock source, and SDH network element second propagation delay time is master clock direction SDH network element second propagation delay time.
7, method as claimed in claim 5 is characterized in that, the SDH electrical interface connects from the clock source, and SDH network element second propagation delay time is from clockwise SDH network element second propagation delay time.
8, the method for claim 1 is characterized in that, described PDH signal is E1, and described virtual container is VC12.
9, the clock synchronizing method in a kind of SDH net is characterized in that, comprising:
Mutual clock synchronization information between principal and subordinate's clock source;
Obtain synchronizing information from the clock source at the transmitting time t1 of master clock source, from the time of reception t2 of clock source, from the transmitting time t3 of clock source with at the time of reception t4 of master clock source;
Utilize the SDH network element propagation delay time described in t1, t2, t3, t4 and the claim 1 to calculate clock correction Offset, adjust the clock of self from the clock source according to Offset.
10, a kind of device of measuring SDH network element propagation delay time is applicable to that measuring a side is the SDH optical interface, and opposite side is the SDH network element of PDH electrical interface, it is characterized in that, comprising:
First measurement module: the frame head that is used to measure PDH electrical interface PDH signal is in first moment that the PDH electrical interface transmits, and the frame head of described PDH signal uses the byte of sync mapping to be mapped to the frame head of virtual container;
Second measurement module: the frame head that is used to measure SDH optical interface STM-N frame the SDH optical interface transmit second constantly;
Acquisition module: be used for obtaining in the frame head of the virtual container of STM-N frame SDH optical interface correspondence time offset with respect to the STM-N frame head;
Time-delay calculation module: be used for calculating SDH according to first moment, second moment and time offset
The network element propagation delay time.
11, the clock system in a kind of SDH net is characterized in that, comprising:
Information interaction module: be used for mutual clock synchronization information between principal and subordinate's clock source;
Obtain module: obtain synchronizing information from the clock source at the transmitting time t1 of master clock source, from the time of reception t2 of clock source, from the transmitting time t3 of clock source with at the time of reception t4 of master clock source;
Clock correction computing module: be used to utilize the SDH network element propagation delay time described in t1, t2, t3, t4 and the claim 1 to calculate clock correction Offset, adjust the clock of self from the clock source according to Offset.
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CN102130735A (en) * | 2010-11-09 | 2011-07-20 | 华为技术有限公司 | Transmission equipment and method thereof for realizing synchronization of clock and time |
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CN102130735A (en) * | 2010-11-09 | 2011-07-20 | 华为技术有限公司 | Transmission equipment and method thereof for realizing synchronization of clock and time |
WO2012062089A1 (en) * | 2010-11-09 | 2012-05-18 | 华为技术有限公司 | A method for realizing time and clock synchronization and a transmission device thereof |
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