CN101470597A - High-speed random detection card - Google Patents

High-speed random detection card Download PDF

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Publication number
CN101470597A
CN101470597A CNA200710304080XA CN200710304080A CN101470597A CN 101470597 A CN101470597 A CN 101470597A CN A200710304080X A CNA200710304080X A CN A200710304080XA CN 200710304080 A CN200710304080 A CN 200710304080A CN 101470597 A CN101470597 A CN 101470597A
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randomness
detection
card
module
task
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CN101470597B (en
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周永彬
刘继业
陈华
冯登国
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Institute of Software of CAS
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Institute of Software of CAS
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Abstract

The invention relates to a TMS320C672x series DSP based high speed randomness detecting card, which can perform fast randomness detection on a random binary sequence or random binary sequences in other forms capable of converting into the binary sequence. The detecting card has a high extendable software-hardware architecture which is absolutely compatible with and supports 15 randomness detection projects designated by the national randomness detection standards. The high speed randomness detecting card supports the safe and convenient on-line program code upgrade, and the software-hardware design of the high speed randomness detecting card provides improved interfaces for future functional extension and software-hardware upgrade. Compared with the randomness detecting tool with simple software, the high speed randomness detecting card has the advantages of low system resource use, fast detecting speed, high stability, high reliability, portability, easy mounting and use and the like.

Description

A kind of high-speed random detection card
Technical field
The present invention relates to a kind of high-speed random detection card based on the TMS320C672x series DSP, the complete compatibility of this test card is also supported 15 kinds of randomness test items that national randomness examination criteria is pointed out, can carry out fast detecting to the randomness of any binary sequence, also can carry out fast detecting the randomness of other arbitrary sequence that can be converted into binary sequence of equal value.
Background technology
Random number is all being brought into play important role in numerous applications of information science and industry member, be widely used in industry and academic research field.For example, random number need be used in industrial emulation field, uses random number in the show business (lottery industry, prize drawing etc.), need to use random number in the business decision processing procedure, need random number in computer simulation and the software test, the artificial intelligence study field more needs to use a large amount of random numbers, or the like.
Randomness detects and is to use one or more specific detection methods, detects from the many aspects side to any randomicity of sequences to be measured, and determines the process of its randomness index.
Federal Government has been specified 4 basic randomness test items in the crypto module evaluation criteria (FIPS PUB 140-2 SECURITYREQUIREMENTS FOR CRYPTOGRAPHIC MODULES) of calendar year 2001 issue, be respectively maximum " 1 " distance of swimming detection in the detection of single-bit frequency, playing card detection, the detection of distance of swimming sum and the piece.The randomness examination criteria that China competent departments concerned formulates has also been specified the randomness test item of 11 expansions except comprising above-mentioned 4 randomness test items.
At present, mechanism has developed some comparatively ripe randomnesss detection softwares with organizing both at home and abroad.For example, the RNGT software of the Diehard software of the upright university of Fla. development, the development of American National Standard Technical Board and the CRYPT-X software of Queensland ,Australia Polytechnics development etc.In addition, domestic some scientific research institutions and colleges and universities have also developed some and have comprised the software of adding up measuring ability.But present randomness testing tool mainly provides with the form of pure software system, does not still have the hardware system or the instrument of whole 15 test items in compatible fully and the relevant randomness examination criteria of support country.
System compares with pure software, and hardware system has compatible strong, advantages such as detection efficiency is high, good stability.The open source information that can find shows to have only Japan Post(Japan Postal Service) province communication synthesis research institute (CRL) once to realize 4 basic randomness test items that FIPS 140 proposes at present on Xilinx Virtex IIFPGA; But this system scale is little, and is only applicable to the self check of password product.In addition, the L Ha Ersi patent of having applied for the randomness detecting method of several individual events of Holland, the randomness that is used for the online output sequence of industry detects, but these several detections also relatively disperse and are also not comprehensive, do not form the hardware support instrument of system.
Summary of the invention
The invention provides a kind of complete compatibility and support the high-speed random detection card of national randomness examination criteria, use this test card to carry out randomness at a high speed and detect any binary sequence (maybe can be converted into the arbitrary sequence of other form of binary sequence of equal value).
The present invention is used with the main frame that has USB interface, constitutes C/S (client end/server end) structure, and random detection card is a server end, and usb host is a client.Usb host can be the computing equipment of any USB of having transmission interface, comprises PC, server even has the mobile computing device of USB interface.
Randomness detects and comprises two key elements, sample and parameter, the object that sample specifies randomness to detect; Parameter is specified the parameter that need carry out which detection and this detection to sample; Test card need detect sample under the complete prerequisite of these two kinds of key elements.Test card receives sample to be tested and detected parameters that usb host sends, carry out randomness in good time detects, and return testing result to usb host, and the parallel processing that multitask is detected provides support.
1. hardware architecture of the present invention
The basic module of hardware configuration of the present invention comprises: the TMS320C672X digital signal processor; be used to deposit the FLASH (flash memory) of program curing; be used for USB control chip with the usb host data transmission; and a slice is used for SDRAM (the Synchronous Dynamic Random Access Memory of general memory function at least; the synchronous dynamic random-access reservoir); in addition; also comprise ESAM (Embedded Secure Access Module; embedded safety module); for providing anti-, random detection card detects; the anti-attack; ardware features such as self-destruction; and by the encrypting and authenticating function, ESAM can also protect the software of random detection card not by illegal copies.
Reserved the hardware expanding interface on the random detection card, making things convenient for the connection of UHPI among other peripherals and the DSP (UniversalHost Port Interface, universal host machine interface), for HardwareUpgring and function expansion provide condition.
2. software architecture of the present invention
Software systems of the present invention have adopted high modularization, extendible architecture, comprise hardware configuration module, USB transport module, processing data packets module and randomness detection algorithm storehouse, and these software modules are basic function module that randomness detects.In addition, for a plurality of randomnesss that respond usb host simultaneously detect request, task management module and storage management module have also been added.Each of usb host detects request, a detection task in the corresponding test card, and each detects the task handling logic based on FSM (finite state machine, finite-state automata model).FSM is a kind of abstract computation model, and it has the state of limited quantity, and each state can be moved to zero or a plurality of state, and the migration of which state is carried out in the decision of input word string.Finite-state automata can be expressed as a digraph.Among the present invention, each state correspondence of FSM each stage that the detection task is carried out, and the input word string is the kind that receives packet, and the detection task is transferred to other states according to the kind of present input data bag, and this state can obtain at any time for usb host.This mechanism has been guaranteed knowability and the controllability of main frame to the test card running status, brings convenience for test card debug of hardware and software and upgrading.
At present, the supported maximum sample length that detects of the present invention is that capacity with SDRAM is restriction, and SDRAM has the storage area of high-speed RAM in the sheet of DSP.But CPU is slow more a lot of than RAM to the access speed of SDRAM, and the direct access sdram of CPU reads sample data, can sharply reduce the efficient that randomness detects undoubtedly.The present invention adopts novel PING-PONG buffer technology to reading of sample data.The PING-PONG buffer technology claims " double buffering technology " again, is to utilize the DMAX (Dual Data Movement Accelerator, two-way data transmission accelerator) among the DSP to be implemented in the Data Access Technology of carrying out data buffering in the high-speed RAM.Need at the function of random detection card, the present invention carries out adaptability reform to the PING-PONG buffer technology, guarantee CPU with ram in slice as high-speed cache, at a high speed read the sample data that extends out among the SDRAM.
3. functional characteristic of the present invention
At present, the present invention can be less than or equal to 10 to length 8Any binary sequence of bit (for the sequence of other form, need be converted into binary sequence of equal value) carries out randomness at a high speed and detects.The present invention supports the basic randomness test item of 4 kinds of FIPS 140-2 appointment, and is simultaneously also compatible fully and support 15 kinds of randomness test items of national randomness examination criteria appointment.For each test item, the present invention returns to usb host with the form of floating number, comprises multinomial testing results such as standardization p-value, statistical value.
The present invention supports the concurrent processing function of the task that detects, can detect request to a plurality of randomnesss from usb host responds, perfect API (Application Programming Interface is provided, application programming interface), encapsulated the various detection logics that test card provides, the user can develop application program based on this test card easily by API on usb host.
Advantage of the present invention and technique effect are as follows:
1. the invention provides the high speed of striding PC operating system, stable, the shoring of foundation of randomness detection easily instrument.
2. the present invention compares with the randomness testing tool of pure software, have that occupying system resources is low, detection speed is fast, portable, be easy to install and advantages such as use.
3. design of hardware and software of the present invention also expands for function in the future and the software and hardware upgrading provides perfect interface.
4. the invention provides the online updating function of the firmware program of safe ready, can be cured to program code to be updated among the FLASH, realize the function upgrading of test card by USB interface.
5. have the very low degree of coupling between the software module of the present invention, be easy to the present invention is carried out function upgrading and performance optimization.
Description of drawings
Fig. 1 random detection card hardware architecture sketch;
The software architecture diagram of Fig. 2 random detection card;
Fig. 3 PING-PONG cushions synoptic diagram;
Fig. 4 storage management module " is tightened up " operation chart figure;
Wherein a) " do not tighten up " preceding sample storage state;
B) the sample storage state after " tightening up ";
C) storage area after " tightening up " can hold sample D;
Fig. 5 detected state transition diagram;
Fig. 6 testing process figure;
A) be general sequence detection flow process; Testing process when b) being batch detection;
Fig. 7 test card workflow diagram;
Fig. 8 interrupt handling routine process flow diagram.
Embodiment
1. hardware is realized
Hardware architecture of the present invention as shown in Figure 1.CPU realizes the data transmission of CPU and SDRAM, FLASH and USB interface by EMIF (External Memory Interface, outside storage interface); Realize to the partial logic control of FLASH and USB controller and to the visit of ESAM by UHPI; In addition, reserved the hardware interface of the partial bus realization expansion among the UHPI.
2. software architecture
As shown in Figure 2, the software systems of present embodiment are made of 6 software modules, and the functional description of each module is as follows:
1) randomness detection algorithm storehouse
This module provides the efficient DSP implementation algorithm of 15 kinds of randomness test items of appointment in the national randomness examination criteria.The DSP implementation algorithm is based on the C language, and is optimized at the functional characteristic of DSP, made full use of intrinsic parallel characteristics and the loop optimization function of C672X series DSP, realized higher execution efficient.
This algorithms library provides the interface of set form, and input parameter comprises sample position, sample length, argument structure; The output result comprises and is accurate to 0.000001 statistical value and p-value.
Because directly reading of data efficient is lower from SDRAM, the present invention uses the PING-PONG buffer technology to support calling of randomness detection algorithm storehouse.
The PING-PONG buffer technology is to interrupt cooperating by DMAX controller and RTI (Real Time Interrupt, real-time interrupt) timer realizing.At first, application two block lengths are the continuous storage area of L byte in RAM, are designated as A (being called " PING buffer zone ") and B (being called " PONG buffer zone ") respectively, claim that this length is that the storage area of 2L byte is " PING-PONG buffer zone ".Before starting some randomness test items, at first by the data of the preceding 2L byte length of sample data are copied to the PING-PONG buffer zone by DMAX; Then, start timer and interrupt, system enters interrupt handling routine at interval with regular time; Initialization CNT (detection length counter) is 0 byte, represents that treated sample length is 0 byte; The start detection program.
After the start detection program, system constantly enters the timer interrupt handling routine.In the interrupt handling routine, at first read the value of CNT, when the value of CNT during greater than the L byte, an expression trace routine PING (PONG) buffer zone that is over after testing, at this moment, the CNT value being deducted the L byte, and start DMAX transmission once more, is that the data of L byte pass in the PING-PONG buffer zone that trace routine just handled with next block length in the sample data among the SDRAM; And so forth, finish up to whole detection.After whole detection finishes, close timer and interrupt.
Fig. 3 is the synoptic diagram of PING-PONG cushioning principle, and the PING-PONG buffering is exactly in fact a data carrying function of utilizing DMAX, makes RAM become the high-speed cache of CPU reading of data from SDRAM.
In order to make that the PING-PONG buffer technology can operate as normal, data address in the randomness detection algorithm storehouse is done corresponding adjustment.Certain byte data relative address for this sample start address in SDRAM in the note sample data is Addr, then after using the PING-PONG buffer technology, obtaining the address that this byte need visit is Addr%2L (" % " is for asking the modulo operation symbol), and this address is the current relative address of byte in the PING-PONG buffer zone that need to detect.
2) hardware configuration module
This module realizes the parameter configuration to the various hardware of random detection card, and these are configured to the test card operation and detect logic provide support.
Mainly comprise configuration to what system operation provided that basic function supports to EMIF, PLLC (Phase-Locked LoopController, phaselocked loop).Wherein, EMIF is used to dispose the working method of SDRAM and FLASH; PLLC is used to dispose CPU and other operation of peripheral devices frequencies; The USB controller is used to dispose the USB transmission mode; The UHPI controller is used to dispose the working method of the general input/output bus of DSP, the interface that these buses are used for the control of peripherals or data transmission and HardwareUpgring is provided for test card.
To the configuration that comprises RTI, DMAX and hardware interrupts that measuring ability provides support, RTI and DMAX are mainly used in the realization of PING-PONG buffering, and hardware interrupts is provided with each hardware interrupts incident and corresponding interrupt handling routine.
The configuration of above-mentioned each system hardware is that corresponding module realizes among the CSL (Chip SupportLibrary, chip is supported the storehouse) that provides by TI (TIX).
3) USB transport module
This module realizes the transmitted in both directions function of data between DSP and usb host, and DSP and usb host are with the form transmission data of fixed-length data bag.
At first, in system initialization, need to dispose working method, the transfer rate of each end points (Endpoint) among the USB, various configuration informations such as data buffering size, configuration among the present invention uses one to import end points (IN Endpoint) and one into and spread out of end points (OUT Endpoint), all adopts the working method of the Bulk Transfer (piece transmission) of appointment in USB2.0 (or USB1.1) standard.
The realization of usb data transmission is to realize by the hardware interrupts and being used of USB controller of test card, in the time of usb host generation data transmission or USB configuring request, can produce relevant hardware in the test card interrupts, be absorbed in after the interrupt handling routine, test card at first is judged as according to the state of register in the USB controller to be imported interruption into and still spreads out of interruption, by setting, realize the input and output of data afterwards to each register in the USB controller.
4) storage management module
The present invention supports a plurality of randomnesss to detect the tasks in parallel execution, and the maximum sample data length of each detection task support is 10 8Bit.For the sample data of magnanimity like this, it can only be stored among the outer SDRAM of sheet and and be managed the storage area, so that make full use of the storage area of SDRAM, and allow the detection of follow-up work as far as possible.
The storage management module comprises that mainly inquiry current storage condition, the application in sample storage space, release, sample buffer " tighten up " function.
The present invention represents the reservoir space in the mode of doubly linked list, each node in the chained list is represented the reference position and the size of one section continuous free space in the reservoir, each node only needs this chained list of traversal can obtain all current informations of reservoir according to the priority positional alignment of free space in the reservoir.
The method of application storage area is: from the start node of doubly linked list, find a capacity to be greater than or equal to the node of desire application length, the start address that changes this node is that former start address adds sample length, the size that changes this node is that size deducts sample length, become 0 if change the length of node, then this node of deletion in doubly linked list; Returning former start address is the sample address of applying for.
The method that discharges the storage area is: apply for a node, its length is the space size that desire discharges, the address is for desiring the position of Free up Memory, it is linked to the correct position of doubly linked list, if this node node last with it or thereafter the free space of a node representative be continuous, then the previous length in these two continuous nodes is changed into the length sum of two nodes, and in chained list, delete back one node.
Among the present invention, sample data can only be stored in continuous region of memory.See Fig. 4, after the application and release of test card operation plurality of detection project sample space, may comprise a plurality of discontinuous sample datas in its sample buffer, this can make in the sample buffer and have " space ".Some the time, the remaining space of sample buffer disperses in " space ", though its total amount is enough big, still can't hold the sample data of some length, thereby causes the failure of the task that detects.For this reason, the present invention utilizes sample buffer " to tighten up " function, and current existing sample is arranged again continuously, allows the idle storage area that disperses put together, so that can hold longer sample.The employing of this technology has improved the reliability and stability of random detection card.The figure of Fig. 4 a) in because there be " space " in the sample storage district,, still can't be sample D application space though the total amount in space is enough big; Figure b) in, the sample storage district has been done to tighten up operation, made A, B, three sample datas of C arrange continuously, like this, the remaining space of dispersion is put together, figure c) in, sample D can insert the sample storage district this moment.
5) task management module
Each detects the data structure of the status information of task the task management module records, supports the concurrent processing of detection task.Data structure records in this module each detect the various information of task, comprise number of parameters, parameter kind, parameter and sample storage position, detected state, transmission state, mistake numberings etc., these information are foundations that test card is dispatched between each detection task.
Every task management module that detects task is initialised when usb host sends the task initialization order.In order to raise the efficiency, the task management module of this test card has preset 8 data structures that detect task, and expression can be handled 8 task handling requests that usb host sends at most simultaneously.Each detection task has a mission number, numbering is corresponding with presetting among the API that offers usb host, so, in a single day test card receives the packet that usb host transmits, can from packet, read the mission number under it, then according to this numbering, handle to specific detection task allocation of packets.
Detect the conversion each time of task status, all in the task management structure, embody, and placed USB up (snapping into usb host) data buffer in real time, periodically obtain the running status of test card for main frame from detection.
6) processing data packets module
The processing data packets module is that the packet of receiving from USB port is resolved, and carries out the module of respective handling according to type of data packet, and this module logically is the core of all modules.
Task processing logic of the present invention adopts the finite-state automata model, and the operation of carrying out in the conversion of task status and the conversion is according to the kind and the content decision of input packet.According to the difference that receives the packet kind, calling task administration module, storage management module etc. guarantee the correct orderly execution of Processing tasks.
This finite-state automata model definition 5 kinds of task statuses:
(1) idle condition (TASK_IDLE)
(2) parameter ready state (TASK_PARA_READT)
(3) task ready state (TASK_READY)
(4) testing result ready state (TASK_RST_READY)
(5) error condition (ERROR)
The present invention is pre-defined three class packets, data are surrounded by the set form definition, these packets are the initial conditions of finite-state automata, and its kind drives the state variation of automat, and the packet that does not meet predefined format can make system enter " error condition ".These 3 kinds of packets are respectively:
(1) supplemental characteristic bag (para): comprise in the parameter bag and detect mission number, loaded length, one or more argument structure and other reserved fields.
(2) sample data bag (sample): sample packages comprises mission number, loaded length, sample packages numbering and other reserved fields.
(3) command packet (cmd): order comprises mission number, order kind and other reserved fields.
Further, the order data package definition three kinds of orders: reset command (reset); Beginning sense command (test); New samples order (another sample).
Behind the input packet, system shifts in 5 kinds of running statuses, as shown in Figure 5.The detection task is an original state with " free time ", and legal transition condition is to receive " parameter bag ".If receive " parameter bag ", then from this packet, parse sample length, call the storage management module, be sample data application storage area, and will store, and enter " parameter is ready " state from the parameter that the parameter bag parses.
In " parameter is ready " state, legal transition condition is to receive the Reset command and " sample data bag ".If receive " reset command ", task then enters " free time " state; If receive " sample data bag ", then sample data is stored, task enters " task is ready " state.
In " task is ready " state, legal state transition condition is to receive " beginning to detect " order.After receiving this order, the current detection task add is detected task queue, wait to be detected, detect finish after, system enters " detection finish state ", waits for that main frame obtains testing result.At this moment, legal state transitions condition is to receive the Reset command, receive this order after, call the storage management module, discharge the storage area of current sample, system reenters " free time " state.
When " detection finishes " state, also may receive " new samples " order, this is the order that is provided with in order to use same parameter that a plurality of samples are carried out batch detection, after receiving this order, system reenters " parameter is ready " state.In other cases, test card enters " error condition ", waits for that usb host obtains corresponding error code.
The api interface that offers usb host mainly comprises the data packet format organization definition and to the basic operation of test card.The format design support of packet is to the flexible definition of information such as classification, sequence number, length; Basic operation to test card comprises: initialization and terminated task, transmission parameter, transmission sample and send various sense commands.In addition, also provide in the api interface to " new samples " order support, as shown in Figure 6, figure a) in, in the detection task, only a sample has been carried out the randomness detection; And figure b) in, by " new samples " order, realized in same detection task, a plurality of samples are carried out randomness detect, further improve the ease for use and the service efficiency of equipment.
In fact, also there be a kind of special packet---" file destination ".This packet is used for the test card firmware upgrade.For firmware upgrade and randomness detection independence in logic, statement for convenience, the definition of this type of packet is not expressed together with the processing mode packet relevant with testing process, in fact firmware upgrade is exactly the process with the compiled file destination programming of usb host FLASH in the test card.And file destination itself can be considered to the binary string identical with sample to be tested, in usb host, after byte-by-byte the reading, by the form of the packet identical with sample packages, sends among the SDRAM of test card; Afterwards, call " firmware upgrade " order, start FLASH programming program,, realize the renewal of firmware being kept at file destination programming among the SDRAM in FLASH.
Because adopted the transmission mechanism identical with sample transmission, thus firmware updating in realizing intrinsic reservation sample safety of transmission and correctness.
It is physical basis that this test card realizes with the hardware configuration module, the function that all hardware configuration such as the clock frequency of hardware, data bit width, data transfer mode, interrupt configuration and other steering logic are set up in this module.Among the present invention, " packet " is the key concept that whole randomness detects processing logic, and processing procedure is also carried out around the processing data packets module.USB transport module, task management module and storage management module all directly are communicated with the processing data packets module is direct and two-way.The processing data packets module is called each software module when receiving different types of packet, carry out various operations such as sample storage, space release, task management, the detection of execution randomness.In operating process, all operation informations are all preserved by detecting the task management module.
3. testing process
In order to further specify function and the use-pattern of each software module in test card, provide the workflow of test card below:
As shown in Figure 7, after test card powers on, at first carry out initialization operation, comprise hardware initialization and software initialization, need call the hardware configuration module and carry out in the DSP sheet and the initialization of sheet external equipment; The calling task administration module carries out the initialization of task management data structure; Call the storage management module and carry out the initialization in sample storage space.Afterwards, enter in the unconditional circulation, this continuous query task formation that circulates if there is task to be measured, then called randomness detection algorithm storehouse and is detected.With afterwards, need difference opening and closing timer to interrupt (RTI), before detecting so that use the PING-PONG buffer technology.
Detecting logic realizes in interrupt handling routine.Provided the flow process of interrupt handling routine among Fig. 8, after hardware initialization finishes, the interruption of test card just is in opening, the interruption of configuration comprises that USB interrupts, timer interruption (RTI) etc., when USB device produces data transfer request, produce and interrupt, the running status that CPU preserves the current detection task (may detect, also may be) still in the training in rotation task queue, be absorbed in interrupt handling routine, carry out data transmission, call the processing data packets module immediately after the DTD, handle (state transition model that enters finite-state automata) accordingly according to the data that receive.After the processing end to packet, interrupt returning, system recovery is to interrupting preceding running status.
The function of each module of software and hardware of the present invention and performance characteristics have guaranteed the high speed execution that randomness detects.At first, the TMS320C6727 chip provides the dominant frequency of 300MHz, cooperates its parallel instruction structure, can realize the floating-point operation of per second up to 2.4G time.Randomness detection algorithm storehouse has made full use of the order structure of DSP, and the realization of High Speed of algorithm is provided.The employing of PING-PONG buffer technology has solved the efficiency bottle neck of data read, and the USB transport module has guaranteed the high-speed transfer of data between main frame and the USB, and this also is the efficient necessary condition of carrying out of detection task.
Certainly, Gao Su detection is to realize on the basis of the correctness of the stability of the system that is based upon and testing result.Hardware design itself and hardware processing module have guaranteed the executory hardware stability of system, and the support of processing data packets module and other correlation modules has guaranteed the clear succinct of the stable execution of the task that detects and processing logic.
Although disclose specific embodiments of the invention and accompanying drawing for the purpose of illustration, its purpose is to help to understand content of the present invention and implement according to this, but it will be appreciated by those skilled in the art that: without departing from the spirit and scope of the invention and the appended claims, various replacements, variation and modification all are possible.The present invention should not be limited to this instructions most preferred embodiment and the disclosed content of accompanying drawing, and the scope of protection of present invention is as the criterion with the scope that claims define.

Claims (8)

1. high-speed random detection card, comprise hardware configuration and software configuration, it is characterized in that: hardware configuration comprises TMS320C672X digital signal processor, FLASH and USB control chip and a slice SDRAM at least, wherein SDRAM, FLASH are connected with described digital signal processor by the EMIF bus with the USB control chip, and software configuration comprises hardware configuration module, USB transport module, processing data packets module and randomness detection algorithm storehouse; Wherein
A) randomness detection algorithm storehouse is compatible and support 15 kinds of test items in the national randomness examination criteria;
B) the hardware configuration module realizes the parameter configuration to various hardware on the random detection card;
C) the USB transport module is realized the transmitted in both directions function of data between test card and usb host;
D) the processing data packets module is resolved the packet of receiving from USB port, and carries out respective handling according to the type of packet.
2. a kind of high-speed random detection card as claimed in claim 1, it is characterized in that described test card has increased storage management module and task management module, with a plurality of detection tasks of parallel processing, wherein the storage management module realizes the management in sample storage district under a plurality of detection task conditions, and the task management module realizes the record to multitask executing state, transmission state.
3. a kind of high-speed random detection card as claimed in claim 1 is characterized in that increasing embedded safety module in the hardware configuration of test card, is connected with digital signal processor by the UHPI bus.
4. a kind of high-speed random detection card as claimed in claim 1 is characterized in that reserving the hardware expanding interface in the hardware configuration of test card, is connected with digital signal processor by the UHPI bus.
5. a kind of high-speed random detection card as claimed in claim 1 is characterized in that solidifying firmware upgrade procedure in the FLASH of test card.
6. a kind of high-speed random detection card as claimed in claim 1 is characterized in that adopting when sample data is read in randomness detection algorithm storehouse the PING-PONG buffer technology.
7. a kind of high-speed random detection card as claimed in claim 1 is characterized in that the detection task processing logic of test card adopts the finite-state automata model, and the packet of definition comprises parameter bag, sample packages and order bag; The system state of definition comprises the free time, parameter is ready, task is ready, detection finishes and wrong 5 kinds of states.
8. a kind of high-speed random detection card as claimed in claim 1 is characterized in that described test card provides api interface, supports multiple testing process.
CN200710304080XA 2007-12-25 2007-12-25 High-speed random detection card Expired - Fee Related CN101470597B (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
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CN103282843A (en) * 2010-12-28 2013-09-04 恩德斯+豪斯流量技术股份有限公司 Field device having long-erm firmware compatibility
CN106652151A (en) * 2015-11-03 2017-05-10 彩富宝科技(北京)有限公司 Method and device for detecting randomness
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CN103282843A (en) * 2010-12-28 2013-09-04 恩德斯+豪斯流量技术股份有限公司 Field device having long-erm firmware compatibility
CN102938830A (en) * 2011-08-16 2013-02-20 上海航天测控通信研究所 Method for increasing speeds of real-time video acquisition of external memory interface (EMIF)
CN106652151A (en) * 2015-11-03 2017-05-10 彩富宝科技(北京)有限公司 Method and device for detecting randomness
CN106652151B (en) * 2015-11-03 2019-01-04 彩富宝科技(北京)有限公司 randomness detecting method and device
CN116594965A (en) * 2023-05-16 2023-08-15 矩阵时光数字科技有限公司 System and method for detecting random number supporting multithreading
CN116594965B (en) * 2023-05-16 2024-05-07 矩阵时光数字科技有限公司 System and method for detecting random number supporting multithreading

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