CN101467205A - On-chip compensation for a fully differential voice coil motor control - Google Patents

Abstract

A disk drive controller including a differential voice coil motor control function is disclosed. The differential voice coil motor control function includes an on-chip compensation network for the inner control loop, including a resistor formed of one or more MOS transistors connected in series. The gate of the MOS transistors in the compensation network is driven with a bias voltage based on a tuning current, where the tuning current is derived so that it varies with process and temperature variations of the integrated circuit, for example with variations in an on-chip capacitor. The on-chip compensation network can be tuned with sufficient precision to properly compensate the inner control loop to provide the desired frequency response in driving the voice coil motor in the disk drive.

Description

The on-chip compensation of fully differential voice coil motor control

Technical field

[0001] the present invention relates to Motor Control Field, and control at the voice coil motor in the disk drive system especially.

Background technology

[0002] the present invention relates to Motor Control Field, and control at the voice coil motor in the disk drive system especially.

[0003] the disk drive technology is a high capacity nonvolatile storage technologies main in the modern personal computer system, and also is the main memory technology that high capacity storage is used in other devices of for example portable digital audio-frequency player.As the basis in disk drive field, the magnetization of the specific region (" farmland ") of data by placing the lip-deep ferromagnetic material layers of disk platter writes.Farmland after each magnetization forms magnetic dipole and corresponding to the stored data value of the direction of dipole.Data bit " is write " farmland determine that by applying electrical current to little solenoid and making the direction of induced magnetism dipole finishes usually by the current polarity of coil, described little solenoid is changed to physically contiguous disk, and data mode is written into disk thus.In modern disk drives, magnetoresistive element is used to the direction of sensing magnetic dipole at place, the selected specific region of magnetic disk surface, reads stored data states thus.Usually, write coil and magnetoresistive element physically are placed in the read/write " head ".

[0004] in traditional disk drive system, spindle motor rotating disk plate, and " voice coil loudspeaker voice coil " motor movement actuator arm are equipped with read/write head at this actuator arm on the far-end of motor.The mobile thus read/write head of voice coil motor is to the magnetic track corresponding to the magnetic disk surface of expecting the address.Traditional voice coil motor is servo-controlled, wherein the position indicator on magnetic disk surface sensed and feed back to control loop with the position of control actuator arm to the expectation position.Usually, " outward " control loop is compared the feedback position signal with the desired locations of actuator, and obtains torque command value from both differences.Torque command is used to produce drive current to voice coil motor, and this voice coil motor produces motor torque with movement actuator arm on desired orientation.In traditional voice coil motor control circuit, comprise " interior " control loop equally, the electric current that wherein is provided to motor is sensed, and this sensing value is provided to backfeed loop to control this current of electric.

[0005] Fig. 1 shows the conventional ADS driving circuit of the voice coil motor in the disk drive system.VCM (voice coil motor) digital to analog converter (DAC) 22 from " outside " servo control loop receives digital torque command signal TRQ_CMD to be used for voice coil motor, and produce the negative input end of simulating signal to error amplifier 24 via resistor 23, this error amplifier 24 receives reference voltage VREF at its positive input terminal.The single-ended output terminal of error amplifier 24 is provided to power amplifier 28, and this power amplifier 28 produces difference output current i at its output terminal T3 and T4 _OUTThis output current i _OUTBe applied to motor M, motor M is with inductance L _mWith parasitic resistor R _mForm provide impedance to arrive power amplifier 28.Sense resistor 31 is included in the loop with motor M, and the voltage at these resistor 31 two ends is held sensing by sensing amplifier 32 at T5, T6.The output of sensing amplifier 32 is provided to the summing junction of the output of VCMDAC via resistor 25.Like this, the voltage at sense resistor 31 two ends is provided as the negative feedback to the dtc signal of the expectation of the output of DAC 22.When circuit balancing (that is current i, _OUTEqual expectation electric current corresponding to torque command signal TRQ_CMD) time, the voltage of the negative input end of error amplifier 24 will equal reference voltage VREF.

[0006] as the basis in control system field, the response characteristic in this inner control loop is determined in the impedance that is provided by motor M.Especially, the inductance coefficent L of motor M _mDefined " limit " in the frequency response in this loop, thereby the response that makes system and has defined the frequency that can vibrate with frequency change.As known in the art, the compensation of the frequency response of motor can realize in control loop, thereby makes the frequency response of control loop can reach the requirement of system, and the instability in avoiding operating.In the traditional circuit in Fig. 1, the mode of R-C (capacitance-resistance) network of this compensation by being connected to error amplifier 24 two ends realizes.In the case, corrective network comprises the capacitor 25 that the series network with resistor 26 and capacitor 27 is connected in parallel.The component value of capacitor 25,27 and resistor 26 is based on the inductance coefficent L of motor M _mAnd resistance R _m, and based on the desired bandwidth of the frequency of operation of control loop (be control loop thereon fully the frequency range of response).

[0007] known as the control system field, capacitor 27 is as the integrator in the control loop, and the stability at lower frequencies of this integrator in the frequency response of control loop provides higher gain.Resistor 26 flattens to offset integrating condenser 27 response characteristic and inserts 90 ° of phase shifts (and correspondingly reducing phase margin) of control loop response, thereby has improved stability.Capacitor 25 is in this response that decays above the high frequency treatment of the cutoff frequency of expecting.

[0008] as shown in Figure 1, VCM DAC 22, error amplifier 24, power amplifier 28 and sensing amplifier 32 (same passive element as resistor 23,25) are implemented as single integrated circuit 20.For the voice coil motor M of conventional size and impedance, the needed component value of corrective network of capacitor 25,27 and resistor 26 generally is embodied as " chip is outer ", in the outside of integrated circuit 20.As shown in Figure 1, this corrective network is connected to the T1 end and the T2 end two ends of integrated circuit 20, and T1 end and T2 end are connected to the input end and the output terminal of error amplifier 24 as shown.Because these elements are outside connections, so their value can be selected as high precision, thereby accurate compensation is provided.On the contrary, if capacitor 25,27 and resistor 26 are embodied as " on the chip ", then their component value can change more than the 10-20%, and this does not allow the reasonable compensation of modern voice coil motor control loop.

[0009] this traditional voice coil loudspeaker voice coil control circuit shown in Figure 1 is known as " single-ended " control loop in the art, and wherein drive current obtains from the single-ended signal of the output terminal of error amplifier 24, drives the single-ended pseudo-differential power amplifier 28 that is input to.Thus, three outer members at two outer end two ends that the external compensation network can be by integrated circuit 20 are realized.

[0010] yet, present many technological trends favors use the fully differential power level and drive voice coil motor in the modern disk drive system.The storage density of disk drive (with the orbit measurement of per inch) constantly increases, and this need improve the noise inhibiting ability of voice coil motor control loop.In addition, the supply voltage of electronic magnetic disc driving governor also is tending towards lower and is low to moderate the convergence battery electric power along with the lasting miniaturization of disk drive system, for example in the portable digital audio-frequency player based on disk drive.This lower supply voltage rank has reduced " space " of the linearity swing of control circuit.The use of fully differential control loop (for example differential errors amplifier drive differential power amplifier) will provide from the squelch of the expectation of power supply, substrate or the coupling of other circuit function blocks, and the use of fully differential control loop will reduce the total harmonic distortion of control loop and need needed linear half of " space " of swinging of single-ended motor-driven as 1 as shown in.

[0011] yet, the realization of the conventional external of fully differential control circuit " chip outer " compensation needs two groups of compensating element,s.With reference to figure 1, the fully differential level needs two examples of the shunt compensation network of capacitor 25,27 and resistor 26.This needs double outer member quantity certainly, and compares with single-ended situation, needs two extra integrated circuit end pins.The ancillary cost of element, and more significantly, pin calculate and circuit board space on cost can be suppressed, particularly in the system of the miniaturization of for example digital audio-frequency player.

Summary of the invention

Therefore [0012] an object of the present invention is to provide a kind of circuit and method of operating thereof, wherein corrective network can be integrated with the control circuit in the FEEDBACK CONTROL of motor, and this motor is the voice coil motor in the disk drive for example.

[0013] an object of the present invention is to provide a kind of like this circuit and method, wherein the on-chip compensation network can closely be adjusted to optimum work.

[0014] an object of the present invention is to provide a kind of like this circuit and method, wherein the compensation to the first order is constant under the situation of manufacturing process and temperature change.

[0015] concerning with reference to those of ordinary skills of following explanation and accompanying drawing thereof, other purpose and advantage of the present invention will be obvious.

[0016] the present invention can be implemented in the feedback control circuit that corrective network is provided to the fully differential signal path.Corrective network comprises metal-oxide semiconductor (MOS) (MOS) transistor that integrated-circuit capacitor is connected with pair of series.Public grid voltage is applied to the grid of MOS transistor under the voltage that is subordinated to the voltage that is produced by main circuit.Main circuit comprises MOS transistor, the device of this MOS transistor and corrective network coupling, thereby and this MOS transistor drive by grid voltage and make it transmit reference current after regulating.Corrective network presents constant compensation to the approximate at least first order thus under the variation of Fabrication parameter and working temperature.

Description of drawings

[0017] Fig. 1 is the circuit diagram of the schematic form of control of traditional voice coil motor and driving circuit;

[0018] Fig. 2 is the circuit diagram of the block diagram form of the disk drive system of constructing according to a preferred embodiment of the invention;

[0019] Fig. 3 is the circuit diagram of the block diagram form of servocontrol in the disk drive system among according to a preferred embodiment of the invention Fig. 2 and voice coil motor control function piece;

[0020] Fig. 4 is the block diagram of voice coil motor control function piece of disk drive system according to a preferred embodiment of the invention and the circuit diagram of schematic form;

[0021] Fig. 5 a and 5b are respectively the sum block block diagram in the voice coil motor control function piece among according to a preferred embodiment of the invention Fig. 4 and the circuit diagram of schematic form;

[0022] Fig. 6 is the adjustable g in the voice coil motor control function piece among according to a preferred embodiment of the invention Fig. 4 _mThe circuit diagram of the schematic form of unit;

[0023] Fig. 7 is used for the block diagram of main circuit of the biasing in the on-chip compensation network of voice coil motor control function piece of control chart 4 and the circuit diagram of schematic form according to a preferred embodiment of the invention;

[0024] Fig. 8 is the circuit diagram of schematic form of resistor of the corrective network of the voice coil motor control function piece among Fig. 4 of replaceable enforcement according to a preferred embodiment of the invention;

[0025] Fig. 9 is used to the on-chip compensation network of the voice coil motor control function piece among Fig. 4 to produce the circuit diagram of schematic form of the clock circuit of scalable electric current according to a preferred embodiment of the invention;

[0026] Figure 10 is the block diagram of voice coil motor control function piece of disk drive system of the interchangeable preferred embodiment according to the present invention and the circuit diagram of schematic form.

Embodiment

[0027] the present invention will be described in conjunction with the preferred embodiments, promptly is embodied as the disk drive controller that is used for computing machine or other digital display circuits, because expection the present invention will be useful especially when being used for this application.Yet, can expect that equally the present invention can provide important benefit and advantage in other application the application of describing except that this instructions.Therefore, be understandable that following description only provides as example, and be not intended to limit the present invention's true scope required for protection.

[0028] Fig. 2 shows the example of the computing machine that comprises disk drive system of realizing the preferred embodiment of the present invention.In this example, personal computer or workstation 2 are embodied as traditional approach, comprise suitable CPU (central processing unit) (CPU), random-access memory (ram), video card and sound card or video and audio-frequency function, network interface capabilities etc.Being included in equally in the computing machine 2 is host adapter 3, and a side of this host adapter 3 connects the system bus of computing machine 2, and opposite side is connected to the bus B that is connected with disk drive controller 7.Bus B is preferably according to traditional standard and realizes, for example comprises reinforced ide (EIDE) standard or small computer system interface (SCSI) standard.Other disk storage devices (hard disk controller, disk drive controller etc.) and other peripherals can also be connected to bus B on demand in a conventional manner.Replacedly, system 2 can be more small-sized system, for example portable digital audio-frequency player etc.

[0029] disk drive controller 7 in this example is corresponding to the disk drive controller architecture, wherein electronic driver physically be implemented in the disc driver rather than computing machine 2 in controller board on.Certainly, in more large-scale system, controller 7 can be implemented in the computing machine 2.In the general block diagram of Fig. 1, controller 7 comprises several integrated circuit, is included in the data channel 4 in the data routing between computing machine 2 and the medium itself.Disk drive controller 7 also comprises controller 13, this controller 13 preferably is embodied as digital signal processor (DSP) or other programmable processors, and disk drive controller 7 also comprises some or all the suitable memory resource (not shown) in other nonvolatile memories such as generally including ROM (read-only memory) (ROM), random-access memory (ram) and for example flash memory.The operation of controller 13 control disk drive systems comprises for example functions such as map addresses, error correction code and decoding.Interface circuit is coupling between bus B and the data channel 4, and comprises that other habitual logical circuits of clock generating circuit etc. also can be included in the disk drive controller 7.

[0030] head stack 20 of disk drive system comprises electronics that writes and read and the mechanical organ that relates to the magnetic storage data.In this example, head stack 20 comprises one or more disks 18, and this disk 18 has the ferromagnet surface (being preferably on the two sides) of pivoting under spindle motor 14 controls.A plurality of read/write head assemblies 15a, 15b can move and be coupled to prime amplifier and write driver functional block 11 by actuator arm 17.Reading side, prime amplifier and write driver functional block 11 read/write head assemblies 15a, the 15b from the disk read operation receives sensed electric current, and amplifies and transmit corresponding to the signal of these the sensed electric currents data channel circuit 4 in the disk drive controller 7.Writing side, write driver circuits in prime amplifier and write driver functional block receives the data of the specific region that will be written into disk 18 from data channel 4, and these data are converted to the appropriate signals that is used for being written to via read/write head assemblies 15a, 15b disk 18.Other circuit functions also can be included in the functional block that is labeled as prime amplifier and write driver functional block 11, comprise and be used for DC (direct current) biasing is applied to read/write head assemblies 15a, the circuit of the magnetic resistance read head among the 15b and be used for may command heating read/write head assemblies 15a, 15b is to keep the flying height control circuit of constant flying height, describe as the U.S. Patent Application Publication No.US2005/0105204 A1 of disclosed application based on people such as Bloodworth on May 19th, 2005, this application licenses to Texas Instruments and is incorporated by reference thereto.

[0031] in this example, disk drive controller 7 comprises the servocontrol 6 that communicates with motion of main shaft control function piece 8 and voice coil loudspeaker voice coil motion control function piece 10.Motion of main shaft control function piece 8 drives spindle motor 14 in the head stack 20 according to the control signal from servocontrol 6, and voice coil loudspeaker voice coil motion control function piece 10 drives voice coil motor 12 according to this control signal simultaneously.As known in the art, spindle motor 14 is controlled the radial position of actuator arm 17 in disk 18 around axle spinning disk 18 and voice coil motor 12.In this way, spindle motor 14 and voice coil motor 12 is placed on read/write head assemblies 15a, 15b on the desired region of magnetic disk surface 18 according to the address value of being passed on by controller 13, thereby makes data can write the suitable physical region of disk 18 or read from this suitable physical region.Power management capabilities piece 9 receives the electric power from computing machine 2 on PWR line shown in Figure 1; And power management capabilities piece 9 comprises one or more voltage stabilizers, by the multiple voltage in these voltage stabilizer power management capabilities piece 9 generations and control disk drive controller 7 and the head stack 20.The function of servocontrol 6, motion of main shaft control 8, power management capabilities piece 9 and voice coil loudspeaker voice coil motion control 10 can be integrated into single integrated circuit 5 with the miniaturization disk drive system and reduce manufacturing cost.

[0032], controlling by the servocontrol 6 in the motion of voice coil motor 12 promotions and the structure and the operation of voice coil loudspeaker voice coil motion control function piece 8 describing according to a preferred embodiment of the invention with reference now to Fig. 3.According to this embodiment of the invention, comprise two backfeed loops in this control function piece.Servocontrol 6 is in this example by monitoring that with respect to the desired locations signal actuator arm 17 manages " outward " control loop with respect to the position on disk 18 surfaces.Voice coil loudspeaker voice coil motion control function piece 10 is managed " interior " control loop by the electric current (and the torque that is applied to actuator arm 17 thus by voice coil motor 12) that is applied to voice coil motor 12 with respect to the torque command signal monitoring that is produced from its external loop control function by servocontrol 6.

[0033] in this embodiment of the present invention, the controller 13 receiving position command signal POS_CMDs of servocontrol 6 from disk drive controller 7.Signal POS_CMD can be in numeric field or analog domain, and this depends on the ad hoc structure of servocontrol 6.Servocontrol 6 also comprises position decoding device 38, and this position decoding device 38 receives the signal of the current radial position of the actuator arm 17 on the expression disk 18 from prime amplifier 11.As known in the art, modern disk drive generally comprises the position indicator at the different radii place that places magnetic disk surface, and for example between every magnetic track, and this position indicator provides the signal of expression radius or orbital position to read/write head 15.Position decoding device 38 is corresponding to the circuit in the servocontrol 6, and this circuit can be decoded from the useful positions signal of indicator signal with the form that is fit to compare with position command signal POS_CMD.In the embodiments of figure 3, summation block 35 produces the error signal POS_ERR of the difference between the feedback signal that produces corresponding to position command signal POS_CMD with by position decoding device 38.Error signal POS_ERR is thus corresponding to the physical location of actuator arm 17 and the current difference between the desired locations.

[0034] control loop compensation functional block 36 receives error signal POS_ERR, and filters or handle this signal to control the stable frequency response in loop guaranteeing outside at analog domain that is fit to or numeric field in a conventional manner in addition.The output of the output of control loop compensation functional block 36 and 6 pairs of voice coil motor control function of servocontrol piece 10 is torque command TRQ_CMD.According to this embodiment of the invention, torque command TRQ_CMD is a control signal, and this control signal is represented direction and the size in order to the torque that actuator arm 17 is moved towards its desired locations from its current location that are applied by voice coil motor 12.

[0035] in this embodiment of the present invention, torque command signal TRQ_CMD is a digital signal, and is similarly received by VCM DAC 40 and be transformed into analog domain to be applied to voice coil motor driver 42.As described in more detail below, voice coil motor driver 42 responds torque command signal TRQ_CMD and produces output current i _OUT, and the feedback signal sensing resistor 44 of sense resistor 44 both end voltage that sense of response connects with voice coil motor 12, and conduct output current i thus _OUTIn this embodiment of the present invention, voice coil motor driver 42 is fully differential driving stages, and this has promoted the use of the supply voltage lower than traditional single-ended voice coil motor driver and has reduced the needed linear swing allowance of driving circuit.

[0036] Fig. 4 illustrates in greater detail the structure of voice coil motor control function piece 10 according to a preferred embodiment of the invention.As mentioned above, VCM DAC 40 receives digital torque command signal TRQ_CMD and is converted into simulating signal DACOUT from servocontrol 6.According to a preferred embodiment of the invention, VCM DAC 40 also produces reference signal DACMID, and this reference signal DACMID is programmed or is set in addition the constant medium rank or the simulating signal of zero-signal.As known in the art, and can find out significantly from its function that the torque that is provided by voice coil motor 12 can be any polarity, this depends on the direction that actuator arm 17 moves.Therefore, can be higher or lower than medium rank corresponding to the simulating signal DACOUT of digital torque command signal TRQ_CMD or be zero signal DACMID.Signal DACOUT, DACMID are applied to sum block 46 with as feedback signal SNS_N and SNS_P.

[0037] although the structure of voice coil motor driver 42 is a fully differential, this configuration of simulating signal DACOUT allows VCM DAC 40 to be constituted as single-ended digital to analog converter rather than fully differential DAC.In fact, VCM DAC 40 can be constructed to simple relatively according to this embodiment of the invention, for example be configured to traditional dual resistor string DAC, an example licenses to the U.S. Patent No. 5 of Texas Instruments on November 2nd, 1999,977, be described in 898, this patent is incorporated by reference thereto.Other output signal of middle grade DACMID can be retrieved as the fixing intermediate value of D/A converting circuit simply.This has greatly reduced the size of circuit complexity and VCM DAC 40, has reduced the cost and the complexity of voice coil motor control function piece 10 thus.

[0038] as shown in Figure 4, sense resistor 44 is connected in series with voice coil motor 12, and conduction current i _OUTT5, the T6 end of voice coil motor control function piece 10 is connected to sense resistor 44 two ends, and is applied to the input end of sensing amplifier 52.Sensing amplifier 52 is urged to differential signal on line SNS_N and the SNS_P thus, and this differential signal is corresponding to the voltage at sense resistor 44 two ends sensings, and thus corresponding to the current i that drives by voice coil motor driver 42 _OUT Sum block 46 receives the differential signal on line SNS_N and the SNS_P and the differential signal of this signal and line DACOUT and DACMID is sued for peace, as the description that will carry out about Fig. 5 a and 5b now.

[0039] Fig. 5 a shows the structure of sum block 46 according to a preferred embodiment of the invention.Shown in Fig. 5 a, g _mThe differential signal that unit 60 receives on line DACOUT and the DACMID, and g _mThe differential signal that unit 62 receives on SNSOUT_P and the SNSOUT_N.Can find out each g more significantly from Fig. 5 b _mUnit 60,62 all presents high input impedance.g _mThe high impedance input of unit 60 impels sum block 46 to be directly connected to VCM DAC 40 under the situation that does not need additional buffer, otherwise for example the simple DAC of dual resistor DAC needs extra impact damper in addition.In addition, g _mThe high impedance input of unit 62 allows the driving of sensing amplifier 52 less relatively.Each g _mThe difference output of unit 60,62 all is applied to summing junction SUMP and SUMN, and each node SUMP and SUMN are connected to ground via resistor 61 and 63 respectively.Shown in Fig. 5 a, g _mIn the unit 60 and 62 each is difference g _mThe unit, wherein the positive output end of unit 60,62 is connected to summing junction SUMP at resistor 61 places, and the negative output terminal of unit 60,62 is connected to summing junction SUMN at resistor 63 places.

[0040] as mentioned above, VCM DAC 40 represents single-ended DAC with respect to the difference of medium rank reference signal DACMID for output terminal DACOUT effectively.Equally, the amplitude of the difference output end of VCMDAC 40 is half of differential signal scope at line SNS_P and SNS_N place effectively.Therefore, g _mThe mutual conductance of unit 60 is configured to g _mThe twice of the mutual conductance of unit 62.In this example, g _mUnit 60 can be constructed to have the mutual conductance of 1/R, and g _mUnit 62 can be constructed to have the mutual conductance of 1/2R, and wherein R is the resistance of resistor 61 and 63.

[0041] Fig. 5 b shows the g in according to a preferred embodiment of the invention the sum block 46 _mThe specific example of the structure of unit 60,62.Be understandable that other g _mThe element circuit configuration can be used to realize g within the scope of the invention with being replaced _m Unit 60 and 62.

[0042] in this embodiment of the present invention, g _mUnit 60 has a pair of differential pin, and a pin is included in the n channel MOS transistor 66a of its grid received signal line DACOUT, and another pin is included in the n channel MOS transistor 66b of its grid received signal line DACMID.The drain electrode of transistor 66a is connected to receive from current source 67 ₁Current i ₁, and the source electrode of this device and body node be connected to current source 68a, and this current source 68a is with current i ₂Be transmitted to ground, current i ₂Greater than current i ₁Similarly, the drain electrode of transistor 66b receives from current source 67 ₂Current i ₁, and the source electrode of transistor 66b is connected with body node through current source 68b, and this current source 68b is also with current i ₂Conduct to ground.The drain electrode of transistor 66a is also connected to p NMOS N-channel MOS N (MOS) transistor 64a ₁And 64a ₂Grid, each MOS transistor 64a ₁And 64a ₂Source electrode all be biased to V _DdSupply voltage.Transistor 64a ₂Drain electrode be connected to the source electrode of transistor 66a and transistor 64a ₁Drain electrode be connected to resistor 61 at node SUMP place.Similarly, the drain electrode of transistor 66b is connected to p NMOS N-channel MOS N (MOS) transistor 64b ₁And 64b ₂Grid, each MOS transistor 64b ₁And 64b ₂Source electrode all be biased to V _DdSupply voltage.Transistor 64b ₂Drain electrode be connected to the source electrode of transistor 66b and transistor 64b ₁Drain electrode be connected to resistor 63 at node SUMN place.Resistor 65 is connected the node place between the source electrode of the source electrode of transistor 66a and 66b.Resistor 65 has the resistance R identical with resistor 61,63.Summing junction SUMN is coupled to ground via resistor 61, and summing junction SUMP is coupled to ground via resistor 63.Preferably, transistor 64,66 mates dimensionally mutually.

[0043] shown in Fig. 5 b, g _mUnit 62 and g _mConstruct in the same manner unit 60, and therefore be not described in detail herein.At g _mIn the unit 62, input signal cable SNS_P and SNS_N are connected to the grid of n channel MOS transistor relative in two differential pin.g _mThe unique different structure of unit is that it comprises the resistor 69 between the source electrode that is connected these n channel devices, and wherein the resistance of resistor 69 is 2R, is the twice of the resistance of resistor 65,61,63.Thus, g _mThe gain of unit 60 is g _mThe twice of the gain of unit 62, this has compensated the single-ended nature (with respect to fixing medium rank DACMID) of input signal DACOUT, and be applied to g _mFully differential input signal SNS_P, the SNS_N of unit 62 are opposite.

[0044] in operation, because each transistor 66a, 66b have the body node that is connected to its source electrode, and because each transistor 66a, 66b must be from its corresponding current sources 67 ₁, 67 ₂Guide current i ₁, so the grid-source voltage (V of each transistor 66a, 66b _Gs) must keep constant.Thus, any difference of the voltage of signal wire DACOUT, DACMID is inevitable manifests at resistor 65 two ends.Under the state of balance, the voltage matches of the voltage of signal wire DACOUT and signal wire DACMID does not have voltage to manifest at resistor 65 two ends, and does not have electric current to be conducted through resistor 65 thus.By conduction process resistor 64a ₂Electric current thus corresponding to current i ₂And current i ₁Between difference (be i ₂-i ₁); Under this equilibrium state by transistor 64b ₂The electric current of conduction is the difference current i equally ₂-i ₁

[0045] yet, if there is not the non-zero differential voltage to provide on signal wire DACOUT and DACMID, this differential voltage is reflected in resistor 65 two ends, impels resistor to conduct corresponding electric current Δ i.Certainly, consider that current source 68a, 68b are as conduction fixed current i ₂Effect, this electric current Δ i must be reflected in by transistor 64a ₂, 64b ₂In the electric current of conduction.For example, if the voltage of line DACOUT is higher than other voltage of middle grade of line DACMID, then electric current Δ i will conduct from left to right through the resistor 65 among Fig. 5 b.Transistor 64a ₂Conduction current [(i thus ₂-i ₁)+Δ i], while transistor 64b ₂Conduction current [(i ₂-i ₁)-Δ i].Because transistor 64a ₁Mirror image is by transistor 64a ₂Electric current, and because transistor 64b ₁Mirror image is by transistor 64b ₂Electric current, therefore two difference electric current [(i ₂-i ₁)+Δ i] and [(i ₂-i ₁)-Δ i] be respectively applied to summing junction SUMP and SUMN, produce corresponding resistor 61 and 63 two ends differential voltages.g _mThe operation of unit 62 is similarly, thereby makes at this g _mThe signal wire input end SNS_P of unit 62 and the differential voltage at SNS_N place cause being provided to the difference current of resistor 61,63 in a similar fashion.But because resistor 69 presents and doubles g _mThe resistance of the resistor 65 in the unit 60 is therefore by g _mThe difference current that the unit produces will be the g under the identical difference input voltage _mHalf of the electric current that unit 60 produces.From g _mUnit 60,62 flows into the electric current of resistor 61 and will determine the voltage at summing junction SUMP place thus, and from g _mUnit 60,62 flows into the electric current of resistor 63 and also will determine the voltage at summing junction SUMN place.According to this embodiment of the invention, the differential voltage at node SUMP, SUMN place will reflect g thus _mThe difference input voltage of unit 60,62 and.

[0046] in the formula that can represent equilibrium condition, these are from g _mThe mutual balance of difference current of unit 60,62 is:

1/2*(SNS_P-SNS_N)＝(DACOUT-DACMID)

Because g _mThe gain of unit 60 is g _mThe twice of the gain of unit 62.This structure compatible of sum block 46 is as the structure of the typical single-ended DAC of VCM DAC 40, thereby makes the output voltage swing of sensing amplifier 52 be generally the twice of the output voltage swing of the medium class value on the line DACMID.The transport function of the differential voltage of sum block 46 between summing junction SUMP and SUMN can be expressed as thus:

SUMP-SUMN＝2(DACOUT-DACMID)-(SNS_P-SNS_N)

Expression formula needs only when device is realized in same integrated circuit and is appropriately mated as can be known thus, and the transport function of sum block 46 is independent of resistor values and other component values.

[0047], is applied to adjustable g as the output of the sum block 46 of the differential voltage on line SUMP and the SUMN again with reference to figure 4 _m Unit 48, thus difference current produced corresponding to the differential voltage at output terminal OUTP and OUTN place at output terminal OUTP and OUTN place.According to a preferred embodiment of the invention, adjustable g _mUnit 48 scalable in sensing, this g _mUnit 48 can response circuit in the gain-adjusted current i that produces of optional position _GmTUNEAnd loop bandwidth is set is mutual conductance g _mFunction.

[0048] as shown in Figure 4, gain-adjusted current i _GmTUNEProduce by the programmable current source in the disk drive controller 7 47.Programmable current source 47 is to be used in response to reference current i _{GmTUNE (REF)}And in response to selecting current i _GmTUNEWith reference current i _{GmTUNE (REF)}Ratio digital command gm_TUNE_CMD and produce analog current i _GmTUNETraditional circuit.According to a preferred embodiment of the invention, this reference current i _{GmTUNE (REF)}With the gain-adjusted current i _GmTUNEBe preferably along with being in the same integrated circuit as adjustable g _mThe changes in capacitance of the capacitor of unit 48 and changing, thus make the frequency response in this inner control loop and bandwidth constant under the situation of technology and temperature change, and the first order is constant at least.As described below, regulate current i _GmTUNERank control adjustable g _mThe mutual conductance g of unit 48 _m, and this mutual conductance g _mIn the loop bandwidth of voice coil loudspeaker voice coil motion control function piece 10, be very strong factor.Thus, according to this embodiment of the invention, be preferably the gain-adjusted current i _GmTUNERank can regulate by the mode of digital command gm_TUNE_CMD, thereby the performance in this inner control loop can be optimised.Thereby the bandwidth that it is contemplated that control loop is predisposed to the nominal rank usually and makes the adjusting current i _GmTUNEPreset, but the change of firmware can make the adjusting current i _GmTUNERegulate on demand from the nominal rank.Those skilled in the art can obtain being used to shown in Fig. 4 and produce this gain-adjusted current i _GmTUNEProgrammable current source 47 variation and substitute.

[0049], adjustable according to the preferred embodiment of the invention g will be described now with reference now to Fig. 6 _mThe structure of unit 48.It is contemplated that and replacedly use structure g _mVarious traditional method of unit 48; Yet, it is contemplated that this ad hoc structure shown in Figure 6 because its make and temperature variations under stability and controllability and useful especially thereof.Adjustable g _mUnit 48 comprises main circuit 66, corresponding tail current in tail current in these main circuit 66 control n channel MOS transistors 76 and the n channel MOS transistor 82 in the controlled circuit 68.The differential voltage that controlled circuit 68 receives from summing junction SUMP, SUMN, and therefore on signal wire OUTP and OUTN, produce the output difference current.

[0050] main circuit 66 comprises difference g _mThe unit, this difference g _mThe unit comprises that source-biased arrives V _DdSupply voltage and grid and drain electrode are connected to the p channel MOS transistor 70a of the collector of n-p-n type bipolar transistor 72a.Second pin of this current mirror comprises that source electrode is at V _DdSupply voltage and grid and drain electrode are connected to the grid of transistor 70a and the p channel MOS transistor 70b of drain electrode.The drain electrode of transistor 70b is connected to the collector of n-p-n type bipolar transistor 72b, and the emitter of this n-p-n type bipolar transistor 72b and the emitter of transistor 72a are connected in that drain electrode place of tail current transistor 76 is public.The source ground of transistor 76.The base stage of n-p-n type bipolar transistor 72a, 72b receives differential reference voltage Δ V, and is as described below, and this differential reference voltage Δ V determines adjustable g _mThe mutual conductance g of unit 48 _mFixed value voltage or regulation voltage.Transistor 72a, 72b are in size, conductance and other coupling mutually in nature.

[0051] collector of the node of drain electrode place of transistor 70b and bipolar transistor 72b is connected to the grid of p channel MOS transistor 75, and the source electrode of this p channel MOS transistor 75 is connected to V _DdSupply voltage and its drain electrode are connected to the grid of the transistor 76 in the main circuit 66.This node is also connected to the grid of the n channel MOS transistor 82 in the controlled circuit 68, and by current source 81 biasings, this current source 81 conduction bias current i _BSo that transistor 75 maintains conducting state.Capacitor 74 is coupling between the drain and gate of transistor 75.In addition, this node at collector place of the drain electrode of transistor 70b and bipolar transistor 72b is also connected to conduction current i _GmTUNE Current source 85 to ground.Current source 85 can be the part (Fig. 4) of programmable current source 47, those skilled in the art with reference to behind this instructions with clear, thereby current mirror transistor reflects this electric current or can this other modes construct this Gain Adjustable current i that provides above-mentioned _GmTUNE

[0052] controlled circuit 68 comprises the differential pair of n-p-n transistor npn npn 80a, 80b, and the transistor in this differential pair is coupling and mate mutually with transistor 72a, 72b in the main circuit 66 mutually dimensionally.The emitter of transistor 80a, 80b interconnects, and is connected to the drain electrode of n channel MOS transistor 82, and the grid of this n channel MOS transistor 82 is connected to the grid of transistor 76 and the source ground of this n channel MOS transistor 82.The collector of transistor 80a is connected to the drain electrode of p channel MOS transistor 78a at output node OUTN place, and the collector of transistor 80b is connected to the drain electrode of p channel MOS transistor 78b at output node OUTP place.The source electrode of transistor 78a, 78b is connected to V _DdSupply voltage and its grid be by common-mode feedback piece 84 control, and this common-mode feedback piece 84 is well known in the artly to be used to guarantee that the common mode voltage of output node OUTP, OUTN keeps constant traditional common-mode feedback control circuit substantially in the DC working range.

[0053] in operation, main circuit 66 thinks here that in response to the difference current that differential reference voltage Δ V produces its bipolar transistor of process 72a, 72b the grid voltage of transistor 70b is controlled by transistor 70a.This differential voltage gathers the Gain Adjustable current i _GmTUNEWith the tail current of definition by transistor 76 conduction.In the Gain Adjustable current i _GmTUNEMake that the drain voltage of transistor 70b is with the grid voltage of modulation transistor 76 and regulate the tail current that is conducted by transistor 76 thus under the main circuit 66 unbalanced situations.Finally, the tail current by transistor 76 is conditioned until reaching equilibrium state, and the difference current that produced by differential reference voltage Δ V this moment will be by the Gain Adjustable current i _GmTUNEBalance.Under this equilibrium state, main circuit 66 has the mutual conductance g of following good definition _m:

$g_m=\frac{\mathrm{\&Delta;i}}{\mathrm{\&Delta;v}}=\frac{i_{\mathrm{gmTUNE}}/2}{\mathrm{\&Delta;V}}=\frac{i_{\mathrm{<figure-callout\; id="2"\; label="gmTUNE"\; filenames="A200780021221E00301.png,A200780021221E00341.png"\; state="\{\{state\}\}">gmTUNE</figure-callout>}}}{2\mathrm{\&Delta;V}}$

[0054] this mutual conductance is therefore by the Gain Adjustable current i _GmTUNEWith reference difference voltage Δ V definition, and as will be described in detail, this mutual conductance can be passed through by digital command gm_TUNE_CMD ride gain adjustable current i _GmTUNEMode regulate (suppose Δ V all the time fixing).

[0055] by this tail current of transistor 76 conduction by transistor 82 reflections, because the grid of transistor 76 and 82 links together and by the drain voltage control of transistor 75.Thus, the tail current by main circuit 66 definition also is the tail current that is conducted by transistor 82 in the controlled difference channel 68.And because transistor 80a, 80b and transistor 72a, 72b are complementary, so the mutual conductance g of controlled circuit 68 _mThe mutual conductance of coupling main circuit 66, and thus also by the Gain Adjustable current i _GmTUNEWith reference difference voltage Δ V definition, and can be by the Gain Adjustable current i _GmTUNERegulate.Under situation about being provided with by main circuit 66 as above-mentioned mutual conductance, the differential voltage signal at line SUMP and SUMN place is reflected as the difference current at line OUTP and OUTN place thus.

[0056] again with reference to figure 4, adjustable g _mLine OUTP, the OUTN of the output of unit 48 is connected to the differential input end of power amplifier 50, and this power amplifier 50 produces output current i at it via the difference output end that T3, T4 end is connected to voice coil motor 12 conversely _OUT Voice coil motor 12 is thus by output current i _OUTDrive (can be any polarity) to produce the expectation torque and to produce the rotational translation of actuator arm 17 expectations thus.

[0057] as can be known, and as known in the art, the inductance L of voice coil motor 12 from the electric equivalent of voice coil motor shown in Figure 4 12 _mPresent nonideal frequency response for the inner control loop of controlling by voice coil loudspeaker voice coil motion control function piece 10.Thus, as shown in Figure 4, loop compensation is preferably and is included in the voice coil motor driver 42 or is connected to this voice coil motor driver 42.

[0058] because voice coil motor driver 42 comprise sum block 46 and adjustable g _mThe structure of the fully differential level of unit 48, according to a preferred embodiment of the invention, only mutually series connection and with capacitor C _pAnd the resistor R of connection _cWith integrated capacitor C _cSingle corrective network need use to realize the compensation of expectation at difference output line OUTP, OUTN two ends.As mentioned above, traditional fully differential voice coil motor drives functional block needs two this corrective networks, and every differential lines is used one.According to embodiments of the invention, this resistor R _cWith capacitor C _c, C _pCorrective network can be by voice coil motor driver 42 the mode of outer member realize; In the case, only need two outer end and three this outer members, therefore it seems that from this point the cost of realizing the fully differential voice coil motor control function can excessive increase.

[0059] as the basis of this area, the frequency response of voice coil motor 12 will have " limit " frequency f _Pole:

$f_{\mathrm{pole}}=\frac{L_m}{R_m+{\mathrm{<figure-callout\; id="44"\; label="R"\; filenames="A200780021221E00311.png,A200780021221E00321.png"\; state="\{\{state\}\}">R</figure-callout>}}_{44}}$

R wherein ₄₄Be the resistance of sense resistor 44.Therefore, the appropriate compensation in the inner control loop of this limit will comprise by resistor R _cWith capacitor C _c" zero " frequency f that the RC network of series connection is determined _Zero:

$f_{\mathrm{zero}}=\frac{1}{2\mathrm{\&pi;}{R}_C{C}_C}$

[0060] because this zero frequency f _ZeroCan accurately realize by outer member, so the manufacturing of modern integrated circuits variation can cause capacitor C _cElectric capacity go up in any direction in 10% scope and to change and can cause traditional polysilicon or diffused resistor R _rChange in resistance get wideer.

[0061] according to a preferred embodiment of the invention, mutually the series connection and with capacitor C _pParallel resistor device R _cWith integrated capacitor C _cFully accurate corrective network can realize at " on the chip " with voice coil motor driver 42, further reduce the manufacturing cost of disk drive system.In addition, according to this embodiment of the invention, the resistor R in this network _cThereby can realize making this resistor R by this way _cCan in being constant frequency response, the first order at least present " zero " frequency under the situation of temperature and manufacturing process variations.

[0062] Fig. 7 show according to this embodiment of the invention mutual series connection and with capacitor C _pParallel resistor device 91 (has resistance R _c) and integrated capacitor C _cThe structure of on-chip compensation network.According to this embodiment of the invention, frequency attenuation capacitor C _pWith height integrated capacitor C _cWith the traditional approach structure of integrated-circuit capacitor, wherein capacitance is determined by desired characteristic as described below.Attenuation capacitor C _pValue will select in a conventional manner so that the decay gain above the expectation of cutoff frequency to be provided.Capacitor C _pIt is contemplated that to having the electric capacity of certain picofarad level, and thus can be easily in the integrated circuit identical, realize with voice coil motor driver 42.Resistor 91 in this embodiment of the present invention be constructed to that a pair of source electrode-drain path is connected in series mutually and with integrated capacitor C _cN channel MOS transistor 90a, the 90b of series connection.The quantity of connecting in this way with the transistor 90 of realizing compensating resistor 91 can change according to the characteristic of voice coil motor 12.The public each other connection of the grid of transistor 90a, 90b and by grid voltage V _GateBiasing.Thus, grid voltage V _GateSource electrode-drain resistance that control is presented by transistor 90a, 90b, and the resistance R of the resistor 91 in the control compensation network thus _c

[0063] quantity that it is contemplated that the transistor 90 of this series connection can control able to programmely, for example by being configured to the switching transistor in parallel with each transistor 90.Fig. 8 shows the structure of the resistor 91 ' in this interchangeable mode, and wherein three transistor 90a, 90b, 90c have source electrode-drain path of being connected in series and the mutual public connection of its grid and by grid voltage V _GateBiasing.In this example, transistor 90b, 90c have the drain/source path that the drain/source path with corresponding bypass n channel MOS transistor 93b, 93c separately is connected in parallel.The grid of transistor 93b, 93c receives independently digital controlled signal BYP_B and BYP_C.Thus, the resistance R of resistor 91 ' _cCan control by the one or both among turn-on transistor 93b, the 93c, thus the one or both among short circuit transistor 90b, the 90c separately.As imagining, with the minimized non-zero resistance R that needs all the time to be used to compensate _c, therefore do not have pass-transistor and transistor 90a to be connected in parallel.In this way, the resistance R of the resistor 91 ' in the corrective network _cdigital controlly provide by this interchangeable embodiment.

[0064] according to a preferred embodiment of the invention, grid voltage V _GateFrom principal and subordinate's circuit, produce to guarantee zero frequency f _ZeroUnder the situation that flow-route and temperature changes is constant.Again with reference to figure 7, " master " side of this principal and subordinate's circuit comprises current source 90, and this current source 90 conducts under the control of programmable current source 57 regulates current i _TUNEProgrammable current source 57 receives reference current i _{TUNE (REF)}, regulate current i _TUNEBased on this reference current i _{TUNE (REF)}And setover.Programmable current source 57 also receives the regulating and controlling current i _TUNEWith reference current i _{TUNE (REF)}The digital command value TUNE_CMD of ratio.For example, current source 90 can be arranged in current mirror, thereby makes the adjusting current i _TUNEProportional with the electric current of conduction in the programmable current source 57; Replacedly, programmable current source 57 can send control signal (voltage or electric current) thereby the conduction in Control current source 90 in a conventional manner.According to this preferred embodiment of the present invention, reference current i _{TUNE (REF)}With the adjusting current i _TUNEChange the electric capacity of the capacitor in the routine clock generating circuit 56 as will be described in the following along with the changes in capacitance of integrated-circuit capacitor.In order to obtain to change at least zero frequency f constant on the first order based on flow-route and temperature _Zero, regulate current i _TUNEShould be based on the electric capacity that is implemented in the same integrated circuit as the capacitor of voice coil loudspeaker voice coil motion control function piece 10, thus make the size of this capacitor and non-conducting technique change be reflected in current i by current source 90 conduction _TUNEIn.

[0065] Fig. 9 shows the reference current i that is used to produce the dependence capacitance adjustment according to this preferred embodiment of the present invention _{TUNE (REF)}And be used to produce the reference current i that relies on electric capacity _{GmTUNE (REF)}The structure of clock generating circuit 56, described reference current i _{GmTUNE (REF)}Be provided to programmable current source 47 (Fig. 4) to control adjustable g _mThe gain of unit 48.Certainly imagination is that other circuit can be used to produce these current i _{TUNE (REF)}And i _{TmTUNE (REF)}, and in fact these circuit need not be clock generator circuit.Those skilled in the art with reference to this instructions will easily obtain these interchangeable circuit.Yet, it is contemplated that to be to use clock generator circuit to produce current i equally especially easily _{TUNE (REF)}And i _{TmTUNE (REF)}Thereby, realize effectively according to disk drive controller function of the present invention, because this clock generator circuit need be used for the operation of disk drive controller 7 owing to other reasons.

[0066] clock generator circuit 56 is based on the charging and the discharge generation clock signal CLK of integrated-circuit capacitor 54, this clock generator circuit 56 according to this embodiment of the invention with adjustable g _mUnit 48 and power amplifier 50 are implemented in the same integrated circuit.Capacitor 54 via current source 50a and switch 51a from V _CcPower source charges (with respect to ground), and via switch 51b and current source 50b discharge.Other switches in switch 51a, 51b and this circuit are realized by the mode of conventional transistor certainly as known in the art.According to this embodiment of the invention, each current source 50a, 50b conduction also depends on the electric current I of the electric capacity of capacitor 54 thus corresponding to the electric current of charging and discharging capacitor 54 _CThis electric current I _CRegulate based on clock signal CLK by matrix current adjustment circuit 49, thereby make electric current I _CCan be adjusted to the rank that the clock signal clk of expected frequency is provided under the situation of the capacitance variations of capacitor 54.

[0067] thus switch 51a, 51b are operated under the complementary non-overlap mode by logical circuit 58 control.The frequency of operation that it is contemplated that switch 51a, 51b is higher than the RC time constant of capacitor 54 chargings and discharge basically, thereby makes the voltage at capacitor 54 two ends become the Linear Triangular shape waveform of segmentation effectively.

[0068] capacitor 54 is connected to the negative input end of comparer 55.Comparer 55 is at the selected voltage level of its positive input terminal reception from resistor divider 52.Resistor divider 52 is configured to be connected a series of resistors between reference voltage VREF and the ground.Higher voltage node in the resistor divider 52 is connected to the positive input terminal of comparer 55 via switch 53hi, thereby as the low voltage node via switch 53lo.Switch 53hi, 53lo are controlled with complementary and non-overlapped mode by logical circuit, thereby make switch 53hi close (and to capacitor 54 chargings) when switch 51a closes, and make switch 53lo close (and to capacitor 54 discharges) when switch 51b closes.In this way, comparer 55 has two datums effectively, compares the voltage at capacitor 54 two ends in charge cycle and the discharge cycle based on these two datums.Comparer 55 produces the square-wave signal corresponding to the switching frequency of switch 51a, 51b thus effectively.This square wave is applied to impact damper 57, this impact damper 57 clocking CLK.Clock signal clk also feeds back to logical circuit 58 and matrix current adjustment circuit 49.

[0069] as mentioned above, the electric current I when charging of matrix current adjustment circuit 49 regulating capacitors 54 and discharge _CThereby, make the frequency matching expected frequency of clock signal clk.Thus, if the electric capacity of capacitor 54 is higher than nominal value, electric current I then _CIncrease by matrix current adjustment circuit 49, and if the electric capacity of capacitor 54 be lower than nominal value, electric current I then _CReduce by matrix current adjustment circuit 49.Therefore, electric current I _CCapacitance variations with capacitor 54 changes.

[0070] this electric current I _CVia current mirror 59 by mirror image to produce reference current i _{TUNE (REF)}With reference current i _{GmTUNE (REF)}Therefore, these current i _{TUNE (REF)}And i _{GmTUNE (REF)}In each be electric current I _CFixed ratio, and also change thus with the changes in capacitance of capacitor 54.Current i _{TUNE (REF)}Be applied to the programmable current source 57 of Fig. 7, this programmable current source 57 is Control current source 90 conversely, and reference current i _{GmTUNE (REF)}Be applied to the programmable current source 47 of Fig. 4 or the programmable current source 47 of control chart 4.

[0071] current source 90 can or be controlled to conduct adjusting current i based on the electric capacity of capacitor 54 in addition corresponding to the part current mirror 59 of clock generator 56 _TUNEThis regulates current i _TUNEFlow into the drain electrode of n channel MOS transistor 92, the grid of this n channel MOS transistor 92 is connected to the grid of its drain electrode and paired n channel MOS transistor 94; The source ground of transistor 92,94.Be arranged in this circuit " from " drain electrode of the transistor 94 of pin is connected to the source electrode of n channel MOS transistor 96, the drain electrode of this n channel MOS transistor 96 is by operational amplifier 98 biasings, and its grid is by operational amplifier 100 biasings.Preferably, according to this embodiment of the invention, size and the structure matching of n channel MOS transistor 96 and each transistor 90a, 90b.The inverting terminal of operational amplifier 98 is coupled to its output terminal, and its non-inverting input terminal receives reference voltage VREF+ Δ V/2, wherein voltage VREF be substantially corresponding to the reference voltage of the common mode voltage at difference output line OUTP, OUTN place and wherein voltage Δ V be the constant voltage of hundreds of millivolts of levels.The non-inverting input terminal of operational amplifier 100 receives reference voltage VREF-Δ V/2, and its inverting terminal is coupled to the node of drain electrode place of the source electrode of transistor 96 and transistor 94, and its outputting drive voltage V _GateBe provided to " from " grid of transistor 96 pin and be provided to the grid of transistor 90a, 90b equally.

[0072] in operation, by the current i of transistor 92 conduction _TUNE94 places are reflected at transistor, thereby make transistor 96 go back conduction current i _TUNE(input to operational amplifier presents very high input impedance).Operational amplifier 98 is reference voltage VREF+ Δ V/2 with the drain bias of transistor 96.On the other hand, operational amplifier 98 produces grid voltage V _Gate, this grid voltage V _GateLevel make the voltage at source electrode place of transistor 96 become to equal reference voltage VREF-Δ V/2.Thus, the source electrode-drain voltage of transistor 96 reaches voltage Δ V by operational amplifier 98,100.And the source electrode-drain current of transistor 96 reaches current i by the operation of the current mirror of transistor 92 and 94 _TUNETherefore, the source electrode-drain resistance of transistor 94 is Δ V/i _TUNEThereby, as the common resistance R that forms resistor 91 _cThe resistance of each transistor 90.

[0073] can think capacitor C _cHave the capacitance that changes with flow-route and temperature:

C _c＝(1+ε)C ₀

[0074] C wherein ₀Be nominal value, and wherein ε is from this nominal value C ₀The number percent that causes because of temperature and technique change changes.As mentioned above, current i _TUNEBe produced as and the reference current i that reflects capacitance variations _{TUNE (REF)}Proportional, thus make current i _TUNEItself also reflects changes in capacitance:

i _TUNE＝(1+ε)I ₀

[0075] I wherein ₀It is current i _TUNENominal value.Thus, current i _TUNEAt least on the first order along with capacitor C _cVariation and change.And, as mentioned above, current i _TUNECan regulate by the mode of programmable current source 57 or other sort circuits.

[0076] as mentioned above, transistor 90a, 90b and transistor 96 physically mate, and under essentially identical operating conditions (voltage VREF is about the common mode voltage at difference output line OUTP, OUTN two ends) receive identical grid voltage.The example of each transistor 90 is represented the source electrode-drain resistance Δ V/i with transistor 96 thus _TUNEIdentical source electrode-drain resistance, and resistance R thus _cCan calculate by following:

$R_c=N\left[\frac{\mathrm{\&Delta;V}}{i_{\mathrm{TUNE}}}\right]=N\left[\frac{\mathrm{\&Delta;V}}{(1+\mathrm{\&epsiv;})I_{\text{0}}}\right]$

Wherein N is series connection with the quantity of the transistor 90 that forms resistor 91 (N=2 in the example of Fig. 7, and N changes to 3 from 1 in the example of Fig. 8).Thus, resistance R _cCan be by regulating current i _TUNEAnd be conditioned, and along with because flow-route and temperature changes with changes in capacitance inverse change.

[0077] as mentioned above, can obtain by resistor 91 and capacitor C _cThe zero frequency f that determines of series connection RC network _Zero:

$f_{\mathrm{zero}}=\frac{1}{2\mathrm{\&pi;}{R}_C{C}_C}$

Perhaps, with reference to above resistance R _cWith capacitor C _cThe expression formula of electric capacity:

$f_{\mathrm{zero}}=\frac{1}{2\mathrm{\&pi;N}\left[\frac{\mathrm{\&Delta;V}}{(1+\mathrm{\&epsiv;})I_0}\right]\left((1+\mathrm{\&epsiv;})C_0\right)}=\frac{I_0}{2\mathrm{\&pi;N}\left(\mathrm{\&Delta;V}\right)C_0}$

[0078] zero frequency f can be found out from this expression formula _ZeroBe independent of owing to the variation of technological parameter or working temperature from the deviation ε of nominal value.As above described about Fig. 8, the transistor 90 of bigger quantity N can be configured to series connection to form resistor 91 ', if the bigger variation of limit of expectation voice coil motor 12, then one or more in parallel in switchgear 93 and these transistors 90 wherein so that zero frequency f to be provided _ZeroWideer variation, this change to surpass by for transferring or regulate current i _TUNEAnd the level of the adjusting that obtains.

[0079] supposes to select zero frequency f _ZeroCancel the pole frequency f in the frequency response of system _Pole, and hypothesis capacitor C _pElectric capacity with respect to capacitor C _cElectric capacity less, inner control loop bandwidth BW can be expressed as:

$\mathrm{BW}=\frac{G\left(\mathrm{drv}\right)G\left(\mathrm{sns}\right)R_s{\mathrm{<figure-callout\; id="2"\; label="g\; m"\; filenames="A200780021221E00301.png,A200780021221E00341.png"\; state="\{\{state\}\}">g</figure-callout>}}_m}{2\mathrm{\&pi;}(R_m+R_{44})C_c}$

Wherein G (drv) is the gain of power amplifier 50, and G (sns) is the gain of sensing amplifier 52, and g _mBe adjustable g _mThe gain of unit 48.Consider capacitor C _cElectric capacity fix by structure on its chip, loop bandwidth can be thus be regulated current i via the value that changes digital command TUNE_CMD _GmTUNEAnd by regulating adjustable g _mThe gain of unit 48 and being conditioned.In addition, because adjustable g _mThe gain g of unit 48 _mDepend on the adjusting current i of the electric capacity that itself depends on on-chip capacitor 54 _GmTUNESo loop bandwidth BW is equally in technique change and temperature change process and constant on the first order at least.The DC gain G in this inner control loop _m(ω=0) can be expressed as:

$G_m(\mathrm{\&omega;}=0)\text{=}\frac{2}{G\left(\mathrm{sns}\right)R_s}$

The transadmittance gain G of this direct current _mKeep constant.

[0080] according to this embodiment of the invention, the on-chip compensation network is provided for the inner control loop of voice coil motor control function piece 10, voice coil motor control function piece 10 even realize with the fully differential form.Thus, not only has the significant advantage that reduces linear swing space, impel the lower supply voltage that obtains according to the present invention, and realize having reduced quantity and the circuit board space of realizing the needed outside terminal of disk drive controller, outer member on the chip of this corrective network.In addition, the corrective network that provides according to this embodiment of the invention is at least also stable in technique change and temperature change process on the first order, and in fact the offset zero frequency can be regulated by simple relatively circuit engineering.

[0081] according to alternative embodiment of the present invention, fully differential voice coil motor control function piece 110 is provided, and wherein on-chip compensation is provided to every differential lines in this functional block.Particularly, can use than the simpler summation block of summation block in first preferred embodiment that is included in the invention described above, necessary is have two corrective networks but wherein these corrective networks can be implemented as with voice coil motor control function piece 110 and be positioned at " on the chip ".Pay close attention to Figure 10 to carry out the more detailed description of this embodiment of the present invention.

[0082] according to this embodiment of the invention, numeral torque command TRQ_CMD receives at the input end of VCM DAC 112, and corresponding to the polarity (direction) of expectation and the level of torque that will be applied by voice coil motor 120, this level of torque is expressed as foregoing inductance L _mAnd dead resistance R _mIn this embodiment of the present invention, VCM DAC 112 is difference digital to analog converters and has the difference output end that is connected to summing junction S1, S2 respectively via resistor 113a, 113b thus.In the embodiment before the present invention, the sense resistor 121 that comprises is connected with voice coil motor 120.Terminal T5, T6 are connected to the opposite side of sense resistor 121.Difference sensing amplifier 122 has the differential input end that is coupled to terminal T5, T6 and produces differential signal corresponding to the differential voltage at sense resistor 121 two ends at its difference output end.Difference output line from sensing amplifier 122 is connected to summing junction S1, S2 via resistor 115a, 115b.

[0083] summing junction S1, S2 are connected to the input end separately of differential errors amplifier 114.The difference output end of error amplifier 114 is connected to the differential input end that is all power amplifier 118, and this power amplifier 118 also is a differential amplifier.The difference output end of power amplifier 118 is connected to terminal T3 and thus across voice coil motor 120 two ends.According to this embodiment of the invention, each differential errors amplifier 114 and differential power amplifier 118 are paraphase, thereby make the polarity of the electric current from terminal T3 to terminal T4 identical with the polarity of the differential signal of the output of VCM DAC 112.

[0084] in operation, sue for peace at summing junction S1, S2 from the difference output end of VCM DAC 112 and the difference output end of sensing amplifier 122.In this example, provide above-mentioned polarity, the polarity of these differential signals is opposite each other.Thus, the differential voltage at summing junction S1, S2 two ends is zero under equilibrium state, wherein current i _OutWith rank coupling by torque command TRQ_CMD order.

[0085] according to this embodiment of the invention, to reactance L owing to voice coil motor 120 _mThe frequency response of control loop in the compensation of limit by being connected to differential errors amplifier 114 each input end and the corrective network at output terminal two ends work.Particularly, a this corrective network is by compensation condenser C _pRealize, and between the positive output end of the negative input end of amplifier 114 and amplifier 114 with the integrated capacitor C that connects with resistor 116a _cIn parallel.Similarly, with integrated capacitor C _cCompensation condenser C with the series network parallel connection of resistor 116b _pBe connected between the positive input terminal and negative output terminal of differential errors amplifier 114.Among resistor 116a, the 116b each realizes (having illustrated two in this example) by one or more n channel transistors, and this n channel transistor has source electrode-drain path of being connected in series and the public connection of its grid and is biased to grid voltage V _GateSimilar to the above, if desired, resistor 116a, 116b can alternatively be embodied as a plurality of such transistors that are connected in series, and fall in source electrode-drain path of selecting in controlled or programmable mode by the switching transistor short circuit.

[0086] and according to this embodiment of the invention, grid voltage V _GateAs above the description about Fig. 7 is obtained by master/slave circuit, thus make resistance that each resistor 116a, 116b present corresponding to reference voltage Δ V with regulate current i _TUNERatio, wherein regulate current i _TUNEWith capacitance variations, thus stable on the first order at least under the situation of temperature and technique change.Thus, according to this alternative embodiment of the present invention, insert the zero frequency f of the frequency response of this control loop _ZeroAlso is constant in the first order under the situation that flow-route and temperature changes.

[0087] in addition, as mentioned above, if realization by that way, then the zero frequency f that sets up by these corrective networks _ZeroCan be adjusted by the transistorized rough sensing in conducting and off resistance device 116a, the 116b.In addition, this compensation is to realize with the same accurate way of external compensation network but by assembly realization on the chip; As a result, the stability in this inner control loop and accurate compensation do not need outside terminal or element.

[0088] though invention has been described according to some illustrative embodiments, but certainly imagine modification and replacement to these embodiment, this modification and the replacement that has obtained advantage of the present invention and benefit is obvious for the those of ordinary skills with reference to this instructions and accompanying drawing thereof.It is contemplated that this modification and replacement are included in the scope of protection of present invention.

Claims (8)

1. differential feedback control circuit comprises:

Sensing amplifier is used for the sensing feedback parameter and is used to produce the differential feedback signal;

Summing circuit is used to produce the differential error signal corresponding to differential input signal and described differential feedback signal;

The differential gain level has and is coupled to described summing circuit in order to receiving the input end of described differential error signal, and has pair of output, and described pair of output provides the middle differential signal in response to described differential error signal;

Differential power amplifier is used to produce the differential output signal in response to differential signal in the middle of described;

First corrective network be coupled to the described pair of output of described differential gain level, and this first corrective network comprises:

At least one capacitor; With

Resistor, this resistor comprises at least one transistor, described at least one transistor has the guiding path that is connected to described at least one capacitor and has control end;

Regulate current circuit, be used for producing the adjusting electric current; With

Biasing circuit is used for described at least one transistorized described control end of described first corrective network of setovering in response to described adjusting electric current.

2. circuit according to claim 1, wherein said differential gain level, described differential power amplifier, described adjusting current circuit, described biasing circuit and described first corrective network realize in an independent integrated circuit;

And wherein said adjusting current circuit produces described adjusting electric current, and described adjusting electric current is along with the variation of the capacitor that forms in the described independent integrated circuit and change.

3. circuit according to claim 2, wherein said adjusting current circuit comprises:

Capacitor; With

Charging and discharge circuit comprise the controllable current source that is coupled to described capacitor.

4. circuit according to claim 1, the described resistor of wherein said first corrective network comprises:

A plurality of transistors, described a plurality of transistors have the guiding path that is connected in series and the control end of public connection;

Wherein said biasing circuit is a plurality of transistorized control end in described first corrective network of setovering in response to described adjusting electric current.

5. circuit according to claim 4, wherein said a plurality of transistor is a metal oxide semiconductor transistor, source electrode-the drain path of this metal oxide semiconductor transistor is connected in series, and the grid of metal oxide semiconductor transistor is by public connection and by described biasing circuit biasing.

6. disk drive controller comprises:

Controller;

Be coupled to the servocontrol functional block of described controller, this servocontrol functional block is used in response to from the signal of described controller and produce torque command signal corresponding to the desired motion of the actuator arm of disk drive;

Voice coil loudspeaker voice coil motion control function piece in the integrated circuit comprises: it is differential signal that input circuit, this input circuit are used for described torque command conversion of signals;

Sensing amplifier is used for from voice coil motor drive signal sensing feedback parameter and is used to produce the differential feedback signal;

Summing circuit is used to produce the differential error signal corresponding to differential input signal and described differential feedback signal;

The differential gain level has and is coupled to described summing circuit in order to receiving the input end of described differential error signal, and have provide in response to described differential error signal in the middle of the pair of output of differential signal;

Differential power amplifier is used for producing the differential voice coil motor drive signal in response to differential signal in the middle of described;

First corrective network, it is coupled to the described pair of output of described differential gain level, and this first corrective network comprises:

At least one capacitor; With

Resistor, this resistor comprises at least one transistor, described at least one transistor has the guiding path that is connected to described at least one capacitor and has control end;

Regulate current circuit, be used for producing the adjusting electric current; With

Biasing circuit is used for described at least one transistorized described control end of described first corrective network of setovering in response to described adjusting electric current.

7. differential feedback control circuit comprises:

Sensing amplifier is used for the sensing feedback parameter and is used to produce the differential feedback signal;

Summing circuit is used to produce the differential error signal corresponding to differential input signal and described differential feedback signal;

The adjustable differential gain stage, have and be coupled to described summing circuit in order to receive the input end of described differential error signal, and has pair of output, this pair of output provides the middle differential signal in response to described differential error signal, and described middle differential signal has in response to regulating the adjustable gain of electric current;

Differential power amplifier is used to produce the differential output signal in response to differential signal in the middle of described; With

Regulate current circuit, be used to produce described adjusting electric current.

8. disk drive controller comprises:

Controller;

Be coupled to the servocontrol functional block of described controller, this servocontrol functional block is used in response to from the signal of described controller and produce torque command signal corresponding to the desired motion of the actuator arm of disk drive; With

Voice coil loudspeaker voice coil motion control function piece in integrated circuit, this functional block comprises:

Digital to analog converter, it has the input end that receives described torque command signal, and the output terminal that provides corresponding to the differential input signal of described torque command signal is provided;

Sensing amplifier is used for the sensing feedback parameter and is used to produce the differential feedback signal;

Summing circuit is used to produce the differential error signal corresponding to described differential input signal and described differential feedback signal;

The adjustable differential gain stage, have and be coupled to described summing circuit in order to receive the input end of described differential error signal, and have the pair of output that middle differential signal is provided in response to described differential error signal, described middle differential signal has in response to regulating the adjustable gain of electric current;

Differential power amplifier is used for producing differential output signal in response to differential signal in the middle of described; With

Regulate current circuit, be used to produce described adjusting electric current.

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