CN101441491A - Integrated circuit of programmable control power device - Google Patents
Integrated circuit of programmable control power device Download PDFInfo
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- CN101441491A CN101441491A CNA2008102333600A CN200810233360A CN101441491A CN 101441491 A CN101441491 A CN 101441491A CN A2008102333600 A CNA2008102333600 A CN A2008102333600A CN 200810233360 A CN200810233360 A CN 200810233360A CN 101441491 A CN101441491 A CN 101441491A
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Abstract
The invention relates to an integrated circuit with a programmable control power device, which comprises a serial communication unit, an erasable register unit, a command decoder, an algorithm execution unit and an expanding unit. The algorithm execution unit comprises a P algorithm module, an I algorithm module, a D algorithm module and the like which are independent from each other; and the expanding unit comprises an eight-path PWM output unit which outputs control signals to a controlled power device, and a device protection unit. The integrated circuit integrates the algorithms module inside so that the systematic programmability is strong and the algorithms can be established quickly, intuitively and efficiently to achieve functions; besides, because the integrated circuit is a hardware structure and all the modules are independent from each other, the real-time processing speed of the modules is fast and the controlled power device is protected comprehensively.
Description
Technical field
The present invention relates to integrated circuit, be specifically related to the integrated circuit that power device is controlled.
Background of invention
The control of power device at present mainly realizes by integrated circuit, single-chip microcomputer and DSP.Integrated circuit is mainly used in regular tap power supply and Electric Machine Control at present, though this adhesive integrated circuit has the low advantage of cost, also has function singleness, can not satisfy the shortcoming of different user specific (special) requirements; Though it is comparatively flexible that single-chip microcomputer and DSP use, can satisfy the requirement of different user by programming, but processing speed is slower in general, lower for switching frequency, or the not too big application of data processing amount can meet the demands, but higher for switching frequency, or the bigger application of data processing amount then some is unable to do what one wishes.And single-chip microcomputer and DSP inside do not have integrated protection to power device usually, and all defencive functions generally all are to realize by software programming, like this when carrying out product development or control algolithm research and debugging, are difficult to avoid the damage to power device.In addition, single-chip microcomputer and DSP all use compilation or C Programming with Pascal Language, use the technician of single-chip microcomputer and DSP must be proficient in compilation or C language, and this has just proposed higher requirement to general technician.
Summary of the invention
First purpose of the present invention is, overcome that existing integrate circuit function is single, the single-chip microcomputer processing speed is low and the data operation ability, and the shortcoming that can't on the control system aspect, programme fast of single-chip microcomputer and DSP, the present invention proposes a kind of integrated circuit of programmable control power device.
Second purpose of the present invention is on the basis of the scheme that realizes first goal of the invention, to provide a kind of integrated circuit that can also carry out the programmable control power device of reliably protecting to power device.
Realizing the technical scheme of described first purpose, is a kind of like this integrated circuit of programmable control power device.This integrated circuit includes the serial communication unit that receives external command and data; Receive this serial communication unit command signal and with external command and data storage erasable register cell within it; Reading command and data and be assigned to the command decoder of algorithm performance element from this register cell; The instruction and data that distributes according to this command decoder is to make up the algorithm performance element of algorithm routine; Link to each other with this algorithm performance element and to the expanding element of controlled power device output control signal by data bus.Wherein, in the algorithm performance element, include separate P algoritic module, I algoritic module and D-algorithm module; In expanding element, include eight-path PWM output unit to controlled power device output control signal.This eight-path PWM output unit is compiled into pwm signal with the algorithm routine that the algorithm performance element makes up, and by setting sequential output.
Realizing the technical scheme of described second purpose, is the further improvement on the basis of the scheme that is realizing first goal of the invention like this.Improve in the integrated circuit of back programmable control power device at this, in its expanding element, also be provided with the device protected location; One end of this device protected location is connected with the main circuit of controlled power device, and the other end is connected with described eight-path PWM output unit.
As can be seen, the present invention is actually in the improvement that is used on the integrated circuit basis of regular tap power supply and Electric Machine Control from the scheme that realizes first goal of the invention.In this integrated circuit, separate P algoritic module, I algoritic module and D-algorithm module have been comprised owing to had in algorithm performance element and this algorithm performance element.So, comparing with existing this adhesive integrated circuit, the present invention just has single-chip microcomputer and DSP advantage flexibly, simultaneously, has solved also that the single-chip microcomputer processing speed is low, data operation ability and the low problem of DSP processing speed.In addition, because programmable features of the present invention is embodied in reconfigurable between the algoritic module.That is to say that the programming among the present invention is to carry out between the algoritic module that is integrated in the integrated circuit, but not carry out the most basic assembly language, C language or VHDL language programming.Like this, the present invention has had the ability of programming on system level, and minimum unit able to programme is an algoritic module.Programming characteristic on the system level frees the technician from the most basic assembly language, C language or VHDL language programming, build control system thereby energy and time can be placed on the algoritic module that is integrated in the integrated circuit.
From realize second goal of the invention, be the further improved plan as can be seen because the device protected location that is independent of other each unit arranged.So; this device protected location just can be monitored the electric current and voltage amount on the main circuit at controlled power device place and the pwm signal of eight-path PWM output unit output in real time; and unusual phenomenon (comprising overcurrent, overvoltage, under-voltage, phenomenon such as drive signal is unusual) made correct action, with the protection power device.
In a word and since existing IC interior integrated algoritic module, so programmability is strong on system level, can support apace, build intuitively, expeditiously algorithm realization function; Because integrated circuit is a hardware configuration, each module is independent mutually again, so its real-time data processing speed soon, also implement general protection to controlled power device.
The present invention is further illustrated below in conjunction with accompanying drawing.
Description of drawings:
Fig. 1 is the structure principle chart of this programmable integrated circuit
Fig. 2 is the schematic block diagram of the specific embodiment of the invention
Embodiment
A kind of integrated circuit of programmable control power device (with reference to figure 1).This integrated circuit includes the serial communication unit that receives external command and data; Receive this serial communication unit command signal and with external command and data storage erasable register cell within it; Reading command and data and be assigned to the command decoder of algorithm performance element from this register cell; The instruction and data that distributes according to this command decoder is to make up the algorithm performance element of algorithm routine; Link to each other with this algorithm performance element and to the expanding element of controlled power device IGBT output control signal by data bus bus2.Wherein, in described algorithm performance element, include separate P algoritic module, I algoritic module and D-algorithm module; In described expanding element, include eight-path PWM output unit to controlled power device IGBT output control signal.This eight-path PWM output unit is compiled into pwm signal with the algorithm routine that the algorithm performance element makes up, and by setting sequential output.
Further, in the integrated circuit of above-mentioned programmable control power device, in its expanding element, also be provided with the device protected location.One end of this device protected location is connected with the main circuit of controlled power device IGBT, and the other end is connected with eight-path PWM output unit.
Integrate and say (with reference to figure 2), when serial communication unit receives outside (comprise personal computer or the smart machine of the sent instruction of similar functions is arranged with it) instruction and data by configured port CONI/F, can send and receive command signal to erasable register cell; After register cell receives the reception instruction that serial communication unit sends, external command and data permanent storage (also can cover storage) that serial communication unit is received; Command decoder is independent of register cell, and it is reading command and data from register cell, and compile out agreement data layout, be assigned to each algorithm performance element and device protected location by data bus bus1; The algorithm performance element reads instruction and data from data bus bus1, allow wherein each independent algorithm module (P algoritic module, I algoritic module and D-algorithm module etc.), programme once more, programmed result is that the algorithm performance element has been programmed to PID control commonly used in the control engineering or PI control (at this moment, the D-algorithm module is not programmed, but it also is present in the algorithm performance element, because these algoritic modules all are to be integrated in the algorithm performance element), pid control module (algorithm performance element) output result sends into eight-path PWM output unit by data bus bus2 again, eight-path PWM output unit is according to the instruction and data on the data bus bus2, produce the pwm signal of respective channel, in order to power controlling device IGBT.
The monitoring in real time of device protected location in the expanding element is from the current and voltage quantities of system power device IGBT main circuit feedback and the pwm signal of eight-path PWM output unit output, and the action setting valve in the device protected location obtains from data bus bus1 by data bus bus3.In case the situation of setting valve scope appears surmounting in the pwm signal of that the current and voltage quantities of the main circuit at controlled power device IGBT place feedback occurs is unusual (comprising overcurrent, overvoltage, under-voltage, phenomenon such as drive signal is unusual) or eight-path PWM output unit output; the device protected location moves immediately; cut off output pwm signal, with protection power device IGBT.Because the device protected location is independent of other each unit, so can accomplish real real-time guard.
Claims (2)
1, a kind of integrated circuit of programmable control power device is characterized in that, this integrated circuit includes the serial communication unit that receives external command and data; Receive this serial communication unit command signal and with external command and data storage erasable register cell within it; Reading command and data and be assigned to the command decoder of algorithm performance element from this register cell; The instruction and data that distributes according to this command decoder is to make up the algorithm performance element of algorithm routine; Link to each other with this algorithm performance element and to the expanding element of controlled power device (IGBT) output control signal by data bus (bus2); Wherein, in described algorithm performance element, include separate P algoritic module, I algoritic module and D-algorithm module; In described expanding element, include eight-path PWM output unit to controlled power device (IGBT) output control signal.
2, according to the integrated circuit of the described programmable control power device of claim 1, it is characterized in that, in described expanding element, also be provided with the device protected location; One end of this device protected location is connected with the main circuit of controlled power device (IGBT), and the other end is connected with described eight-path PWM output unit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008102333600A CN101441491A (en) | 2008-12-17 | 2008-12-17 | Integrated circuit of programmable control power device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008102333600A CN101441491A (en) | 2008-12-17 | 2008-12-17 | Integrated circuit of programmable control power device |
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| CN101441491A true CN101441491A (en) | 2009-05-27 |
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| CNA2008102333600A Pending CN101441491A (en) | 2008-12-17 | 2008-12-17 | Integrated circuit of programmable control power device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8694808B2 (en) | 2010-12-28 | 2014-04-08 | Huawei Technologies Co., Ltd. | Method and apparatus for power supply protocol management, and power supply system applying them |
| CN110596565A (en) * | 2018-06-12 | 2019-12-20 | 佛山市顺德区美的电热电器制造有限公司 | Fault detection method of drive chip, drive chip and main control chip |
| CN117494620A (en) * | 2023-11-16 | 2024-02-02 | 海光集成电路设计(北京)有限公司 | Integrated method, redundant unit deleting method, device, equipment and storage medium |
-
2008
- 2008-12-17 CN CNA2008102333600A patent/CN101441491A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8694808B2 (en) | 2010-12-28 | 2014-04-08 | Huawei Technologies Co., Ltd. | Method and apparatus for power supply protocol management, and power supply system applying them |
| CN110596565A (en) * | 2018-06-12 | 2019-12-20 | 佛山市顺德区美的电热电器制造有限公司 | Fault detection method of drive chip, drive chip and main control chip |
| CN117494620A (en) * | 2023-11-16 | 2024-02-02 | 海光集成电路设计(北京)有限公司 | Integrated method, redundant unit deleting method, device, equipment and storage medium |
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Open date: 20090527 |