CN101436368A - Pixel drive method for display panel - Google Patents
Pixel drive method for display panel Download PDFInfo
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- CN101436368A CN101436368A CNA2007101863037A CN200710186303A CN101436368A CN 101436368 A CN101436368 A CN 101436368A CN A2007101863037 A CNA2007101863037 A CN A2007101863037A CN 200710186303 A CN200710186303 A CN 200710186303A CN 101436368 A CN101436368 A CN 101436368A
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Abstract
The invention relates to a pixel driving method for a display panel. The display panel comprises a first grid line coupled to a grid electrode of a first switching transistor, and a source electrode of the first switching transistor is coupled to a liquid crystal capacitor and a first storage capacitor respectively. The liquid crystal capacitor consists of a pixel electrode and a common electrode, while one end of the first storage capacitor is coupled to a second grid line. The method comprises the following steps: firstly, providing a first modulation signal to the common electrode; secondly, starting the first switching transistor through the first grid line; and finally providing a second modulation signal to the second grid line after starting the first switching transistor, wherein a second switching transistor coupled to the second grid line is operated on a closed area of the transistor by the second modulation signal, and the first modulation signal and the second modulation signal are synchronized mutually.
Description
Technical field
The present invention relates to a kind of driving method, and particularly relate to a kind of image element driving method of display panel.
Background technology
Fig. 1 illustrates wherein a kind of Organization Chart of pixel, and this pixel has the pixel structure (appearance aftermentioned) of Cst on common (Cst on the public electrode). Sign 101 and 102 among the figure is represented N bar gate line (gate line) and the N-1 bar gate line in the display panel respectively, wherein N is a natural number, and 103 and 104 all represent source electrode line (source line), 105 expression thin film transistor (TFT) (thin film transistor, TFT), 106 remarked pixel electrodes (pixelelectrode) are as for 107 expression public electrode wires (common line).Because in this framework, pixel electrode 106 has partly overlapping with public electrode wire 107, thereby has produced storage capacitors Cst, as shown in Figure 2.Fig. 2 is the pixel electrode 106 of Fig. 1 and the part overlapping synoptic diagram of public electrode wire 107.Therefore, claim that framework shown in Figure 1 is the pixel structure of Cst on common.
The pixel structure of above-mentioned Cst on common is widely used on small panel, and collocation is carried out the driving of pixel with modulation signal as the mode of common electric potential usually, to save the cost of source electrode driver.Yet,, make that its aperture opening ratio (aperture ratio) is less, thereby cause resolution (resolution), the quality of image and the power consumption of display panel because this pixel structure has public electrode wire ... all not satisfactory etc. the performance performance.Therefore, relevant dealer all makes display panel towards the dot structure that utilization has a high aperture, in the hope of improving many shortcomings of old display panel.But, make display panel in utilization high aperture ratio pixel structure, and carry out as the mode of common electric potential with modulation signal under the situation of driving of pixel, if still adopt traditional gate line type of drive (promptly to provide a pulse to gate line in regular turn, and then open the pixel that each bar gate line is coupled in regular turn), to cause pixel when opening and the inconsistent problem of brightness after closing, and make the quality of picture descend.For understanding the generation reason of this problem, below do explanation with regard to wherein a kind of dot structure of high aperture earlier.
Fig. 3 illustrates the another kind of Organization Chart of pixel, and this framework is general cognitive Cst ongate framework (appearance aftermentioned). Sign 301 and 302 among the figure is represented N bar gate line and the N-1 bar gate line in the display panel respectively, and 303 and 304 all represent source electrode line, 305 expression thin film transistor (TFT)s, 306 remarked pixel electrodes.Owing in this framework, do not have public electrode wire, therefore have high aperture opening ratio.In addition, overlap because pixel electrode 306 has partly with gate line 302, thereby produced storage capacitors Cst, as shown in Figure 4.Fig. 4 is the pixel electrode 306 of Fig. 3 and the part overlapping synoptic diagram of gate line 302.Therefore, claim that framework shown in Figure 3 is the pixel structure of Cst on gate (Cst on the grid).
Fig. 5 is the equivalent circuit diagram of framework shown in Figure 3.Sign 301～305 among Fig. 5 is the corresponding object of being censured that indicates in the presentation graphs 3 all, represent then that as for Vcom by the formed common electric potential of modulation signal (be the current potential of the public electrode in the subtend substrate of thin-film transistor array base-plate, to call the modulation common electric potential in the following text), voltage on the Vp remarked pixel electrode 306, Clc then represents by the electric capacity that liquid crystal layer constituted between pixel electrode 306, public electrode (not illustrating) and the said two devices, promptly general cognitive liquid crystal capacitance.Below will be with circuit shown in Figure 5, its employed signal waveform (as Figure 6 and Figure 7) of arranging in pairs or groups comes pixels illustrated when opening and the inconsistent generation reason of brightness after closing.
Fig. 6 illustrates the signal waveform of Fig. 5 circuit when the K picture, and wherein K is a natural number.Please according to the explanation needs and with reference to Fig. 5 and Fig. 6.When providing pulse 601 to gate line 301, and then when making thin film transistor (TFT) 305 conductings, owing to be loaded on the voltage of the data voltage of liquid crystal capacitance Clc this moment by source electrode line 303 greater than modulation common electric potential Vcom, therefore in during thin film transistor (TFT) 305 conductings, the level of voltage Vp is drawn high, and makes this pixel demonstrate needed brightness according to the two pressure reduction of modulation common electric potential Vcom and voltage Vp.Yet, when pulse 601 is changeed electronegative potential (low) by noble potential (high), thin film transistor (TFT) 305 is closed, make pixel electrode 306 present float (floating), so the change in voltage that voltage Vp just can begin and then to modulate common electric potential Vcom via the coupling of storage capacitors Cst change.In theory, the change conditions of voltage Vp should be shown in dotted line 602.
At voltage Vp such as dotted line 602 and under the situation of change, even after expression thin film transistor (TFT) 305 is closed, the two pressure reduction of modulation common electric potential Vcom and voltage Vp still can not change.But in fact, the variation in voltage amount Δ Vp of voltage Vp can be less than the variation in voltage amount Δ Vcom of modulation common electric potential Vcom, voltage Vp at most only can rise to 603 level that indicated among Fig. 6 on the historical facts or anecdotes border, thereby cause the brightness inconsequent of pixel, make mean flow rate descend, so the brightness that human eye is experienced descend.
Fig. 7 illustrates the signal waveform of Fig. 5 circuit when the K+l picture.Please according to the explanation needs and with reference to Fig. 5 and Fig. 7.When providing pulse 701 to gate line 301, and then when making thin film transistor (TFT) 305 conductings, owing to be loaded on the voltage of the data voltage of liquid crystal capacitance Clc this moment by source electrode line 303, so in during thin film transistor (TFT) 305 conductings, the level of voltage Vp is dragged down less than modulation common electric potential Vcom.Yet, when thin film transistor (TFT) 305 is closed, makes pixel electrode 306 present and float, so the change in voltage that voltage Vp just can begin and then to modulate common electric potential Vcom via storage capacitors Cst coupling changes.In theory, the change conditions of voltage Vp should be shown in dotted line 702, but in fact voltage Vp at most only can drop to 703 level that indicated among Fig. 5, thereby also causes the brightness inconsequent of pixel, make mean flow rate descend, so the brightness that human eye is experienced descend.Therefore, though the framework of Cst on gate has high aperture opening ratio, drive under the situation of pixel the shortcoming that can cause brightness to descend in the mode of using the modulation common electric potential.
Fig. 8 illustrates another Organization Chart of pixel.Sign 801 and 802 among the figure is represented N bar gate line and the N-1 bar gate line in the display panel respectively, and 803 and 804 all represent source electrode line, 805 expression thin film transistor (TFT)s, 806 remarked pixel electrodes.Because in this framework, pixel electrode 806 all has partly overlap (its objective is increases aperture ratio of pixels) with gate line 801, gate line 802, source electrode line 803 and source electrode line 804, thereby has produced stray capacitance Cg1, stray capacitance Cd1 and stray capacitance Cd2 again respectively outside storage capacitors Cst originally.Fig. 9 is the equivalent circuit diagram of framework shown in Figure 8.Sign 801～805, Cst, Cg1, Cd1 and Cd2 among Fig. 9 be the corresponding object of being censured that indicates in the presentation graphs 8 all, then represent to modulate common electric potential as for Vcom, voltage on the Vp remarked pixel electrode 806, Clc is the liquid crystal capacitance between remarked pixel electrode 806 and the public electrode then.
According to aforementioned, framework shown in Figure 8 is after thin film transistor (TFT) cuts out, and the variation in voltage amount Δ Vp of voltage Vp equally can not equal to modulate the variation in voltage amount Δ Vcom of common electric potential Vcom yet.Therefore, this framework can cause the brightness inconsequent of pixel equally, makes mean flow rate descend, so the brightness that human eye is experienced descends.
Figure 10 illustrates another Organization Chart of pixel, this framework be similarly above-mentioned certain architectures one of them.Sign 1001 and 1002 among the figure is represented N bar gate line and the N-1 bar gate line in the display panel respectively, and 1003 and 1004 all represent source electrode line, 1005 expression thin film transistor (TFT)s, 1006 remarked pixel electrodes, the public electrode wire of 1007 expression thin-film transistor array base-plate sides.Because in this framework, pixel electrode 1006 all has partly overlap (its objective is increases aperture ratio of pixels) with gate line 1001, gate line 1002, source electrode line 1003 and source electrode line 1004, thereby has produced stray capacitance Cg1, storage capacitors Cst1, stray capacitance Cd1 and stray capacitance Cd2 respectively.In addition, because pixel electrode 1006 also has part to overlap with public electrode wire 1007, therefore produce storage capacitors Cst2, as shown in figure 11.Figure 11 is the pixel electrode 1006 of Figure 10 and the part overlapping synoptic diagram of public electrode wire 1007.
Figure 12 is the equivalent circuit diagram of framework shown in Figure 10.Sign 1001～1007, Cg1, Cst1, Cd1 and Cd2 among Figure 12 all represents the corresponding object of being censured that indicates among Figure 10, then represent to modulate common electric potential as for Vcom, voltage on the Vp remarked pixel electrode 1006, Clc is the liquid crystal capacitance between remarked pixel electrode 1006 and the public electrode then.In addition, storage capacitors Cst2 also is illustrated among Figure 12.According to aforementioned, framework shown in Figure 10 is after thin film transistor (TFT) cuts out, and the variation in voltage amount Δ Vp of voltage Vp equally can not equal to modulate the variation in voltage amount Δ Vcom of common electric potential Vcom yet.Therefore, this framework also can cause the brightness inconsequent of pixel equally, makes mean flow rate descend, so the brightness that human eye is experienced descends.
Summary of the invention
Purpose of the present invention just provides a kind of driving method of display panel, and it can solve pixel when opening and the inconsistent problem of brightness after closing, and then promotes image quality.
Based on above-mentioned and other purpose, the present invention proposes a kind of image element driving method of display panel.This display panel comprises that first grid polar curve is coupled to the grid of first switching transistor, and the source electrode of first switching transistor is coupled to the liquid crystal capacitance and first storage capacitors respectively.Above-mentioned liquid crystal capacitance is made of pixel electrode and public electrode, and an end of first storage capacitors couples the second grid line.The method comprises the following steps, at first, provides first modulation signal to public electrode.Then, open first switching transistor by first grid polar curve.Then, after first switching transistor is opened, provide second modulation signal to the second grid line.Wherein, second modulation signal makes the second switch transistor that couples with the second grid line operate in transistor and closes the closed zone, and first modulation signal and second modulation signal are synchronized with each other.
Based on above-mentioned and other purpose, the present invention proposes a kind of image element driving method of display panel, and wherein display panel includes many gate lines.The method comprises the following steps, at first, open the switching transistor that it couples by N bar gate line, and the source electrode of this switching transistor is coupled to N-1 bar gate line by the pixel electrode and first storage capacitors, and be coupled to public electrode by this pixel electrode and liquid crystal capacitance, and this public electrode is coupled to modulation signal, and above-mentioned N is a natural number.Then, after this switching transistor is opened, provide first predeterminated voltage and second predeterminated voltage to the N-1 bar gate line in turn, to transmit first coupled voltages and second coupled voltages in turn by storage capacitors to pixel electrode.Wherein, the voltage swing of first predeterminated voltage and second predeterminated voltage will make the second switch transistor that couples with N-1 bar gate line operate in transistor and close the closed zone, and the voltage modulated time synchronized of the switching time of first predeterminated voltage and second predeterminated voltage and modulation signal.
According to the driving method of the described display panel of one embodiment of the invention, wherein the variation in voltage amount of second modulation signal is more than or equal to the variation in voltage amount of first modulation signal.
According to the image element driving method of the described display panel of one embodiment of the invention, wherein second modulation signal comprises first predeterminated voltage and second predeterminated voltage at least.
According to the driving method of the described display panel of one embodiment of the invention, wherein the pressure reduction of first predeterminated voltage and second predeterminated voltage is more than or equal to the variation in voltage amount of above-mentioned first modulation signal.
The present invention is because of after opening its switching transistor that couples by first grid polar curve, more provide modulation signal to the second grid line, transmit coupled voltages to above-mentioned pixel electrode with the pixel electrode that coupled by second grid line and the above-mentioned switching transistor storage capacitors between the two.Wherein the modulation signal switching transistor that makes the second grid line be coupled operates in transistor and closes the closed zone, and modulation signal is with to modulate common electric potential synchronized with each other.Therefore, by the pressure reduction of adjusting the predeterminated voltage that modulation signal provided, but the just variation in voltage amount of bucking voltage Vp, make the variation in voltage amount of voltage Vp identical with the variation in voltage amount of modulation common electric potential Vcom, solving pixel when opening and the inconsistent problem of brightness after closing, and then promote image quality.
For above and other objects of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs. are described in detail below.
Description of drawings
Fig. 1 illustrates wherein a kind of Organization Chart of pixel.
Fig. 2 is the pixel electrode 106 of Fig. 1 and the part overlapping synoptic diagram of public electrode wire 107.
Fig. 3 illustrates the another kind of Organization Chart of pixel.
Fig. 4 is the pixel electrode 306 of Fig. 3 and the part overlapping synoptic diagram of gate line 302.
Fig. 5 is the equivalent circuit diagram of framework shown in Figure 3.
Fig. 6 illustrates the signal waveform of Fig. 5 circuit when the K picture.
Fig. 7 illustrates the signal waveform of Fig. 5 circuit when the K+1 picture.
Fig. 8 illustrates another Organization Chart of pixel.
Fig. 9 is the equivalent circuit diagram of framework shown in Figure 8.
Figure 10 illustrates another Organization Chart of pixel.
Figure 11 is the pixel electrode 1006 of Figure 10 and the part overlapping synoptic diagram of public electrode wire 1007.
Figure 12 is the equivalent circuit diagram of framework shown in Figure 10.
Figure 13 is the equivalent circuit diagram of adjacent two pixels of employing framework shown in Figure 3.
Figure 14 is the signal waveforms according to the K picture of one embodiment of the invention.
Figure 15 is the signal waveforms according to the K+1 picture of one embodiment of the invention.
Figure 16 is the equivalent circuit diagram of adjacent two pixels of employing framework shown in Figure 8.
Figure 17 is the equivalent circuit diagram of adjacent two pixels of employing framework shown in Figure 10.
Figure 18 is the Vg-Id performance diagram of thin film transistor (TFT).
Figure 19 is the process flow diagram according to the driving method of the display panel of one embodiment of the invention.
The primary clustering symbol description
101,102,301,302,801,802,1001,1002,1301,1302,1303,1601,1602,1603,1701,1702,1703: gate line
103,104,303,304,803,804,1003,1004,1304,1604,1605,1704,1705: source electrode line
105,305,805,1005,1305,1306,1606,1607,1706,1707: switching transistor
106,306,806,1006: pixel electrode
107,1007,1708,1709: public electrode wire
601,701,1401,1402,1403,1501,1502,1503: pulse
602,702: dotted line indicates
603,703: level indicates
Cd1, Cd2, Cd3, Cd4, Cg1, Cg2, Clc, Clc1, Clc2, Cst, Cst1, Cst2, Cst3, Cst4: electric capacity
Vcom: modulation common electric potential
Vgl1, Vgl2: predeterminated voltage
Vp, Vp1, Vp2: voltage
V1, V2, V3: gate line signal
Δ Vgl: the pressure reduction of predeterminated voltage
Δ Vp: the variation in voltage amount of voltage Vp
Δ Vcom: the voltage variety of modulation common electric potential
1802: indicate
1901,1902,1903: step
Embodiment
For convenience of description, the display panels of the following stated, its pixel all adopts one of them of the described framework of prior art.
If the pixel in the display panel adopts framework shown in Figure 3, wherein two neighbors of this panel so, available Figure 13 represents.Figure 13 is the equivalent circuit diagram of adjacent two pixels of employing framework shown in Figure 3, and this two pixel indicates with N pixel and N+1 pixel respectively, and wherein N is a natural number.As for 1301,1302 and 1303 N-1 bar gate line, N bar gate line and N+1 bar gate lines of representing respectively in the display panel of the sign among the figure, and 1304 expression source electrode lines, 1305 and 1306 all represent switching transistor.Cst1 represents the pixel electrode of N pixel and the storage capacitors between the gate line 1301, and the one end couples gate line 1301, and the other end then couples the source electrode of thin film transistor (TFT) 1305.Vp1 represents the voltage on the pixel electrode of N pixel, and Clc1 represents the pixel electrode of N pixel and the liquid crystal capacitance between the public electrode (not illustrating).And Cst2 represents the pixel electrode of N+1 pixel and the storage capacitors between the gate line 1302, and the one end couples gate line 1302, and the other end then couples the source electrode of thin film transistor (TFT) 1306.Vp2 represents the voltage on the pixel electrode of N+1 pixel, and Clc2 represents the pixel electrode of N+1 pixel and the liquid crystal capacitance between the public electrode.Above-mentioned switching transistor can adopt thin film transistor (TFT) to realize, so this embodiment is not in order to limit the present invention.
Method of the present invention has changed the online signal of grid, mode such as Figure 14 and shown in Figure 15.Please earlier with reference to Figure 14, Figure 14 is the signal waveforms according to the K picture of one embodiment of the invention, wherein K is a natural number, this figure lists the signal waveform on the gate line 1301,1302 and 1303 of Figure 13, V1, V2 and V3 represent in regular turn, sign 1401,1402 and 1403 in these three signal waveforms is expressed as pulse respectively, the switching transistor that is connected in order to this gate line of conducting.And after these pulses, can see that these three gate line signals all swing between voltage Vp1, Vp2, modulation signal that provides to gate line is provided for this.And indicate the waveform that Vcom is expressed as the modulation common electric potential, the waveform that modulation signal presented to public electrode just is provided.
Can know that by Figure 14 after the pulse 1401 of gate line signal V1, gate line signal V1 just swings always between predeterminated voltage Vgl1 and Vgl2.Similarly, after the pulse 1402 of gate line signal V2, gate line signal V2 swings between predeterminated voltage Vgl1 and Vgl2 always, and after the pulse 1403 of gate line signal V3, gate line signal V3 also swings between predeterminated voltage Vgl1 and Vgl2 always.And predeterminated voltage Vgl1 and Vgl2 are all less than the activation voltage of the switching transistor that this gate line connected, just the voltage swing of predeterminated voltage Vgl1 and Vgl2 can make the switching transistor that this gate line coupled operate in closed zone, transistor pass (cut-off region holds aftermentioned).In addition, the switching time of predeterminated voltage Vgl1 and Vgl2 also with the voltage modulated time synchronized of modulation common electric potential Vcom.
Please according to the explanation needs and with reference to Figure 13 and Figure 14.When providing pulse 1402 to gate line 1302, and then when making switching transistor 1305 conductings, owing to be loaded on the voltage of the data voltage of liquid crystal capacitance Clc1 this moment by source electrode line 1304 greater than modulation common electric potential Vcom, therefore in during switching transistor 1305 conductings, the level of voltage Vp1 is drawn high, and makes this pixel demonstrate needed brightness according to the two pressure reduction of modulation common electric potential Vcom and voltage Vp1.Then, when pulse 1402 is changeed electronegative potential by noble potential, switching transistor 1305 is closed, making the pixel electrode of N pixel present floats, yet this moment, still present the alternate of predeterminated voltage Vgl1 and Vgl2 on the gate line 1301, transmitting the pixel electrode of two coupled voltages in turn by storage capacitors Cst1, and then influence the variation in voltage amount Δ Vp1 of voltage Vp1 to voltage Vp1 indication.Therefore, variation in voltage amount Δ Vp1 just can represent by formula (1),
ΔVp1＝[Clc1/(Cst1+Clc1)]ΔVcom+[Cst1/(Cst1+Clc1)]ΔVgl ......(1)
Wherein Δ Vgl refers to the two voltage pressure reduction of predeterminated voltage Vgl1 and Vgl2.Can find by formula (1), if make Δ Vgl=Δ Vcom, then Δ Vp1=Δ Vcom.That is to say, as long as make Δ Vgl equal Δ Vcom, after even switching transistor 1305 is closed so, the two pressure reduction of modulation common electric potential Vcom and voltage Vp1 still can not change, therefore can solve this pixel when switching transistor cuts out, cause the inconsistent problem of brightness because of the coupling of the change in voltage of modulation common electric potential Vcom.
When providing pulse 1403 to gate line 1303, and then when making switching transistor 1306 conductings, owing to be loaded on the voltage of the data voltage of liquid crystal capacitance Clc2 this moment by source electrode line 1304 less than modulation common electric potential Vcom, therefore in during switching transistor 1306 conductings, the level of voltage Vp2 is dragged down, and makes this pixel demonstrate needed brightness according to the two pressure reduction of modulation common electric potential Vcom and voltage Vp2.Then, when pulse 1403 is changeed electronegative potential by noble potential, switching transistor 1306 is closed, making the pixel electrode of N+1 pixel present floats, yet this moment, still present predeterminated voltage Vgl1 and Vgl2 on the gate line 1302 in turn, transmitting the pixel electrode of two coupled voltages in turn by storage capacitors Cst2, and then influence the variation in voltage amount Δ Vp2 of voltage Vp2 to voltage Vp2 indication.Because the two can equate that the two also can equate Clc1 and Clc2 storage capacitors Cst1 and Cst2, so variation in voltage amount Δ Vp2 also can be represented by formula (1).
In like manner, in the K picture, gate line 1302 and 1303 is via other pixel that switching transistor coupled, and other gate line is via the pixel that switching transistor coupled, and all can solve pixel in such a way when opening and the inconsistent problem of brightness after closing.
Similarly, when the K+1 picture, need change the online signal of grid too, as shown in figure 15.Please refer to Figure 15, Figure 15 is the signal waveforms according to the K+1 picture of one embodiment of the invention, it lists the signal waveform on the gate line 1301,1302 and 1303 of Figure 13, V1, V2 and V3 represent in regular turn, also list the waveform of voltage Vp1, voltage Vp2 and modulation common electric potential Vcom.In Figure 15,1501,1502 and 1503 indicating impulses respectively, the switching transistor that is connected in order to this gate line of conducting.
Can know that by Figure 15 after the pulse 1501 of gate line signal V1, gate line signal V1 just swings always between predeterminated voltage Vgl1 and Vgl2.Similarly, after the pulse 1502 of gate line signal V2, gate line signal V2 swings between predeterminated voltage Vgl1 and Vgl2 always, and after the pulse 1503 of gate line signal V3, gate line signal V3 also swings between predeterminated voltage Vgl1 and Vgl2 always, and the switching time of predeterminated voltage Vgl1 and Vgl2 also with the voltage modulated time synchronized of modulation common electric potential Vcom.Because when different pictures, the polarity of liquid crystal needs counter-rotating, to avoid the liquid crystal polarization, therefore when the K+1 picture, be sent to the data voltage of same the liquid crystal that source electrode line coupled, itself and the modulation common electric potential Vcom polar relationship between the two, different in the time of can be with the K picture.Yet, based on the identical reason of the described mode of operation of Figure 14, when the K+1 picture, adopt the described mode of Figure 15 as can be known, just can solve pixel when opening and the inconsistent problem of brightness after closing.
If the pixel in the display panel adopts framework shown in Figure 8, wherein two neighbors of this panel so, available Figure 16 represents.Figure 16 is the equivalent circuit diagram of adjacent two pixels of employing framework shown in Figure 8, and this two pixel indicates with N pixel and N+1 pixel respectively, and wherein N is a natural number.Sign 1601,1602 and 1603 among the figure is represented N-1 bar gate line, N bar gate line and the N+1 bar gate line in the display panel respectively, and 1604 and 1605 expression source electrode lines, 1606 and 1607 all represent switching transistor.
In addition, the Cst1 among Figure 16 represents the pixel electrode of N pixel and the storage capacitors between the gate line 1601, and the one end couples gate line 1601, and the other end then couples the source electrode of thin film transistor (TFT) 1606.Vp1 represents the voltage on the pixel electrode of N pixel, Clc1 represents the pixel electrode of N pixel and the liquid crystal capacitance between the public electrode (not illustrating), and Cg1 represents the pixel electrode of N pixel and the stray capacitance between the gate line 1602, Cd1 represents the pixel electrode of N pixel and the stray capacitance between the source electrode line 1604, and Cd2 represents the pixel electrode of N pixel and the stray capacitance between the source electrode line 1605.Cst2 represents the pixel electrode of N+1 pixel and the storage capacitors between the gate line 1602, and the one end couples gate line 1602, and the other end then couples the source electrode of thin film transistor (TFT) 1607.Vp2 represents the voltage on the pixel electrode of N+1 pixel, Clc2 represents the pixel electrode of N+1 pixel and the liquid crystal capacitance between the public electrode, and Cg2 represents the pixel electrode of N+1 pixel and the stray capacitance between the gate line 1603, Cd3 represents the pixel electrode of N+1 pixel and the stray capacitance between the source electrode line 1604, and Cd4 represents the pixel electrode of N+1 pixel and the stray capacitance between the source electrode line 1605.
Equally available Figure 14 of equivalent electrical circuit shown in Figure 16 and the described mode of Figure 15 are operated, so the variation in voltage amount Δ Vp1 of the voltage Vp1 of Figure 16, can represent by formula (2),
ΔVp1＝[Clc1/(Cst1+Clc1+Cb1)]ΔVcom+[Cst1/(Cst1+Clc1+Cb1)]ΔVgl...(2)
Wherein Δ Vgl refers to the two voltage pressure reduction of predeterminated voltage Vgl1 and Vg12, and Cb1=Cg1+Cd1+Cd2.Therefore as can be known, if will make Δ Vp1=Δ Vcom, then Δ Vgl=[(Cst1+Cb1)/Cst1] Δ Vcom.Thus, just can solve this pixel when switching transistor cuts out, cause the inconsistent problem of brightness because of the coupling of the change in voltage of modulation common electric potential Vcom.Because stray capacitance Cst1 and Cst2 can equate, Clc1 and Clc2 can equate, Cd1 and Cd3 can equate, Cd2 and Cd4 can equate, Cg1 and Cg2 can equate, therefore the variation in voltage amount Δ Vp2 of voltage Vp2 also can be represented by formula (2), so equally can be by the two pressure reduction of adjustment predeterminated voltage Vgl1 and Vgl2, solve this pixel when switching transistor cuts out, cause the inconsistent problem of brightness because of the coupling of the change in voltage of modulation common electric potential Vcom.
If the pixel in the display panel adopts framework shown in Figure 10, wherein two neighbors of this panel so, available Figure 17 represents.Figure 17 is the equivalent circuit diagram of adjacent two pixels of employing framework shown in Figure 10, and this two pixel indicates with N pixel and N+1 pixel respectively, and wherein N is a natural number.Sign 1701,1702 and 1703 among the figure is represented N-1 bar gate line, N bar gate line and the N+1 bar gate line in the display panel respectively, and 1704 and 1705 expression source electrode lines, 1706 and 1707 all represent switching transistor, as for 1708 and 1709 public electrode wires of representing N pixel and N+1 pixel respectively.
In addition, the Cst1 among Figure 17 represents the pixel electrode of N pixel and the storage capacitors between the gate line 1701, and the one end couples gate line 1701, and the other end then couples the source electrode of thin film transistor (TFT) 1706.Cst2 represents the pixel electrode of N pixel and the storage capacitors between the public electrode wire 1708, and the one end couples public electrode wire 1708, and the other end then couples the source electrode of thin film transistor (TFT) 1706.Vp1 represents the voltage on the pixel electrode of N pixel, Clc1 represents the pixel electrode of N pixel and the liquid crystal capacitance between the public electrode (not illustrating), and Cg1 represents the pixel electrode of N pixel and the stray capacitance between the gate line 1702, Cd1 represents the pixel electrode of N pixel and the stray capacitance between the source electrode line 1704, and Cd2 represents the pixel electrode of N pixel and the stray capacitance between the source electrode line 1705.Cst3 represents the pixel electrode of N+1 pixel and the storage capacitors between the gate line 1702, and the one end couples gate line 1702, and the other end then couples the source electrode of thin film transistor (TFT) 1707.Cst4 represents the pixel electrode of N+1 pixel and the storage capacitors between the public electrode wire 1709, and the one end couples public electrode wire 1709, and the other end then couples the source electrode of thin film transistor (TFT) 1707.Vp2 represents the voltage on the pixel electrode of N+1 pixel, Clc2 represents the pixel electrode of N+1 pixel and the liquid crystal capacitance between the public electrode, and Cg2 represents the pixel electrode of N+1 pixel and the stray capacitance between the gate line 1703, Cd3 represents the pixel electrode of N+1 pixel and the stray capacitance between the source electrode line 1704, and Cd4 represents the pixel electrode of N+1 pixel and the stray capacitance between the source electrode line 1705.
Equally available Figure 14 of equivalent electrical circuit shown in Figure 17 and the described mode of Figure 15 are operated, and suppose that the online voltage of common electric potential is identical with modulation common electric potential Vcom, and so in fact the variation in voltage amount Δ Vp1 of voltage Vp1 can be represented by formula (3),
ΔVp1＝[(Clc1+Cst2)/(Cst2+Clc1+Cb1+Cst1)]ΔVcom
+[Cstl/(Cst2+Clc1+Cb1+Cst1)]ΔVgl
......(3)
Wherein Δ Vgl refers to the two voltage pressure reduction of predeterminated voltage Vgl1 and Vgl2, and Cb1=Cg1+Cd1+Cd2.Therefore as can be known, if will make Δ Vp1=Δ Vcom, then Δ Vgl=[(Cst1+Cb1)/Cst1] Δ Vcom.Thus, just can solve this pixel when switching transistor cuts out, cause the inconsistent problem of brightness because of the coupling of the change in voltage of modulation common electric potential Vcom.Because capacitor C st1 and Cst3 can equate, Clc1 and Clc2 can equate, Cd1 and Cd3 can equate, Cd2 and Cd4 can equate, Cg1 and Cg2 can equate, Cst2 and Cst4 can equate, therefore the variation in voltage amount Δ Vp2 of voltage Vp2 also can be represented by formula (3), so equally can be by the two pressure reduction of adjustment predeterminated voltage Vgl1 and Vgl2, solve this pixel when switching transistor cuts out, cause the inconsistent problem of brightness because of the coupling of the change in voltage of modulation common electric potential Vcom.
In the above-described embodiments, only have two predeterminated voltages, yet this is for due to two voltage levels of the modulation common electric potential Vcom that arranges in pairs or groups operate though provide to the modulation signal of each gate line.Therefore, if design modulation common electric potential Vcom, provide so to the predeterminated voltage number of the modulation signal of each gate line also must change with a plurality of voltage levels in response to actual needs.In a word, the two is synchronized with each other with modulating common electric potential Vcom as long as the modulation signal that provides to gate line is provided.And if will obtain effect preferably, then provide to the variation in voltage amount of the modulation signal of gate line must be more than or equal to the variation in voltage amount of modulation common electric potential Vcom, just must be more than or equal to providing to the variation in voltage amount of the modulation signal of public electrode.In addition, for the purpose of the design of side circuit, can also just add modulation signal before in the pulse (but actuating switch transistor) of gate line signal.What deserves to be mentioned is that the user can utilize the part of gate line to be used as the wherein electrode of storage capacitors, also can battery lead plate be set or lead the backing plate sheet in that grid is online, with a wherein electrode as storage capacitors.
In addition, the transistor of being mentioned in the aforementioned embodiment closes the closed zone, can utilize the family curve of thin film transistor (TFT) to illustrate.Figure 18 is the Vg-Id performance diagram of thin film transistor (TFT).Please refer to Figure 18, wherein Vg and Id represent the grid voltage and the drain current of thin film transistor (TFT) respectively.This Vg-Id family curve is 15 with channel width, and channel length is 5 thin film transistor (TFT) (being the thin film transistor (TFT) of W/L=15/5), and with the drain bias of this thin film transistor (TFT) under 16V voltage and obtain.Sign 1802 is expressed as the rollback point of the operation of thin film transistor (TFT), and the zone on these rollback point 1802 the right is the transistor turns district, and the zone on the left side is exactly closed zone, transistor pass.In the present invention, provide the transistor that must make thin film transistor (TFT) operate in rollback point 1802 left sides to close the closed zone to the modulation signal of gate line.By the teaching of the various embodiments described above, can summarize a general principle, as shown in figure 19.Figure 19 is the process flow diagram according to the driving method of the display panel of one embodiment of the invention.Please refer to Figure 19, at first, provide first modulation signal to public electrode.Then, open first switching transistor by first grid polar curve.Then, after first switching transistor is opened, provide second modulation signal to the second grid line.Wherein, second modulation signal makes the second switch transistor that couples with the second grid line operate in transistor and closes the closed zone, and first modulation signal and second modulation signal are synchronized with each other.
In sum, the present invention is because of after opening its switching transistor that couples by first grid polar curve, more provide modulation signal to the second grid line, transmit coupled voltages to above-mentioned pixel electrode with the pixel electrode that coupled by second grid line and the above-mentioned switching transistor storage capacitors between the two.Wherein the modulation signal switching transistor that makes the second grid line be coupled operates in transistor and closes the closed zone, and modulation signal is with to modulate common electric potential synchronized with each other.Therefore, by the pressure reduction of adjusting the predeterminated voltage that modulation signal provided, but the just variation in voltage amount of bucking voltage Vp, make the variation in voltage amount of voltage Vp identical with the variation in voltage amount of modulation common electric potential Vcom, solving pixel when opening and the inconsistent problem of brightness after closing, and then promote image quality.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the appended claim person of defining.
Claims (23)
1. the image element driving method of a display panel, this display panel comprises the first grid polar curve of the grid that is coupled to first switching transistor, the source electrode of this first switching transistor is coupled to the liquid crystal capacitance and first storage capacitors respectively, this liquid crystal capacitance is made of pixel electrode and public electrode, and an end of this first storage capacitors couples the second grid line, and this method comprises:
Provide first modulation signal to this public electrode;
Open this first switching transistor by this first grid polar curve; And
After this first switching transistor is opened, provide second modulation signal to this second grid line, wherein the second switch transistor that this second modulation signal makes and this second grid line couples operates in transistor and closes the closed zone, and this first modulation signal is synchronized with each other with this second modulation signal.
2. the method for claim 1, wherein this second modulation signal comprises first predeterminated voltage and second predeterminated voltage at least.
3. the method for claim 1, wherein this second modulation signal provides first predeterminated voltage and second predeterminated voltage in turn.
4. the method for claim 1, wherein an electrode of this first storage capacitors is made of the part institute of this second grid line.
5. method as claimed in claim 2, also be included in open this first switching transistor by this first grid polar curve after, transmit data voltage to this pixel electrode, and when this data voltage during greater than the voltage of this public electrode, provide this first predeterminated voltage to this second grid line earlier, wherein this first predeterminated voltage is less than this second predeterminated voltage.
6. method as claimed in claim 5 also is included in after this first switching transistor opens, and closes this first switching transistor by this first grid polar curve, then provides the 3rd modulation signal to this first grid polar curve.
7. method as claimed in claim 6, wherein the 3rd modulation signal comprises this first predeterminated voltage and this second predeterminated voltage, and this provides the 3rd modulation signal to the step of this first grid polar curve to provide this second predeterminated voltage to this first grid polar curve earlier.
8. method as claimed in claim 6, also be included in after this first switching transistor cuts out, open the second switch transistor that it couples by the 3rd gate line, and after closing this second switch transistor, provide the 4th modulation signal to the 3rd gate line by the 3rd gate line.
9. method as claimed in claim 8, wherein the 4th modulation signal comprises this first predeterminated voltage and this second predeterminated voltage, and this provides the 4th modulation signal to the step of the 3rd gate line to provide this first predeterminated voltage to the 3rd gate line earlier.
10. method as claimed in claim 6 also is included in by this first grid polar curve and opens before this first switching transistor, opens the 3rd switching transistor that it couples by this second grid line.
11. the method for claim 1, wherein the variation in voltage amount of this second modulation signal is more than or equal to the variation in voltage amount of this first modulation signal.
12. method as claimed in claim 2, also be included in open this first switching transistor by this first grid polar curve after, transmit data voltage to this pixel electrode, and when this data voltage during less than the voltage of this public electrode, provide this second predeterminated voltage to this second grid line earlier, wherein this first predeterminated voltage is less than this second predeterminated voltage.
13. method as claimed in claim 12 also is included in after this first switching transistor opens, and closes this first switching transistor by this first grid polar curve, then provides the 3rd modulation signal to this first grid polar curve.
14. method as claimed in claim 13, wherein the 3rd modulation signal comprises this first predeterminated voltage and this second predeterminated voltage, and this provides the 3rd modulation signal to the step of this first grid polar curve to provide this first predeterminated voltage to this first grid polar curve earlier.
15. method as claimed in claim 12, also be included in after this first switching transistor cuts out, open the second switch transistor that it couples by the 3rd gate line, and after closing this second switch transistor, provide the 4th modulation signal to the 3rd gate line by the 3rd gate line.
16. method as claimed in claim 15, wherein the 4th modulation signal comprises this first predeterminated voltage and this second predeterminated voltage, and this provides the 4th modulation signal to the step of the 3rd gate line to provide this second predeterminated voltage to the 3rd gate line earlier.
17. the method for claim 1, wherein the source electrode of this first switching transistor also is coupled to public electrode wire by second storage capacitors.
18. method as claimed in claim 2, wherein the pressure reduction of this first predeterminated voltage and this second predeterminated voltage is more than or equal to the variation in voltage amount of this first modulation signal.
19. the image element driving method of a display panel, wherein this display panel includes many gate lines, and this method comprises the following steps:
Open the switching transistor that it couples by N bar gate line, wherein the source electrode of this switching transistor is coupled to N-1 bar gate line by the pixel electrode and first storage capacitors, and be coupled to public electrode by this pixel electrode and liquid crystal capacitance, this public electrode is coupled to modulation signal, and N is a natural number; And
After this switching transistor is opened, provide first predeterminated voltage and second predeterminated voltage to this N-1 bar gate line in turn, transmitting first coupled voltages and second coupled voltages in turn by this storage capacitors to this pixel electrode,
Wherein the voltage swing of this first predeterminated voltage and this second predeterminated voltage will make the second switch transistor that couples with this N-1 bar gate line operate in transistor and close the closed zone, and the voltage modulated time synchronized of the switching time of this first predeterminated voltage and this second predeterminated voltage and this modulation signal.
20. method as claimed in claim 19, also be included in when opening this switching transistor by this N bar gate line, data signal is to this pixel electrode, and when this data voltage during greater than the voltage of this public electrode, provide this first predeterminated voltage to this N-1 gate line earlier, wherein this first predeterminated voltage is less than this second predeterminated voltage.
21. method as claimed in claim 19, wherein the pressure reduction of this first predeterminated voltage and this second predeterminated voltage is more than or equal to the variation in voltage amount of this modulation signal.
22. method as claimed in claim 19, also be included in when opening this switching transistor by this N bar gate line, data signal is to this pixel electrode, and when this data voltage during less than the voltage of this public electrode, provide this second predeterminated voltage to this N-1 gate line earlier, wherein this first predeterminated voltage is less than this second predeterminated voltage.
23. method as claimed in claim 22, wherein the pressure reduction of this first predeterminated voltage and this second predeterminated voltage is more than or equal to the variation in voltage amount of this modulation signal.
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| CN2007101863037A CN101436368B (en) | 2007-11-12 | 2007-11-12 | Pixel drive method for display panel |
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| CN2007101863037A CN101436368B (en) | 2007-11-12 | 2007-11-12 | Pixel drive method for display panel |
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| CN101436368B CN101436368B (en) | 2011-02-16 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102087839A (en) * | 2009-12-02 | 2011-06-08 | 乐金显示有限公司 | Device and method for driving liquid crystal display device |
| CN102194428A (en) * | 2010-03-10 | 2011-09-21 | 三星移动显示器株式会社 | Display device having increased aperture ratio |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100188112B1 (en) * | 1996-03-15 | 1999-06-01 | 김광호 | Tft-lcd device |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102087839A (en) * | 2009-12-02 | 2011-06-08 | 乐金显示有限公司 | Device and method for driving liquid crystal display device |
| CN102087839B (en) * | 2009-12-02 | 2013-07-03 | 乐金显示有限公司 | Device and method for driving liquid crystal display device |
| US8482554B2 (en) | 2009-12-02 | 2013-07-09 | Lg Display Co., Ltd. | Device and method for driving liquid crystal display device |
| CN102194428A (en) * | 2010-03-10 | 2011-09-21 | 三星移动显示器株式会社 | Display device having increased aperture ratio |
| US9007359B2 (en) | 2010-03-10 | 2015-04-14 | Samsung Mobile Display Co., Ltd. | Display device having increased aperture ratio |
| CN102194428B (en) * | 2010-03-10 | 2016-05-25 | 三星显示有限公司 | There is the display device of the aperture opening ratio of increase |
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| CN101436368B (en) | 2011-02-16 |
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