CN101424838A - LCD device for two-way controlling grid scan line - Google Patents
LCD device for two-way controlling grid scan line Download PDFInfo
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- CN101424838A CN101424838A CNA2007100477275A CN200710047727A CN101424838A CN 101424838 A CN101424838 A CN 101424838A CN A2007100477275 A CNA2007100477275 A CN A2007100477275A CN 200710047727 A CN200710047727 A CN 200710047727A CN 101424838 A CN101424838 A CN 101424838A
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- scan line
- controlling grid
- grid scan
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- crystal indicator
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Abstract
The invention relates to a liquid crystal display device for a bidirectional control grid scanning line. The liquid crystal display device comprises a source electrode driver and a grid electrode driver, as well as a data line and a grid electrode scanning line which are correspondingly connected with the source electrode driver and the grid electrode driver, wherein the grid electrode scanning line is connected with a transmission bus for outputting and closing voltage. The liquid crystal display device can shorten the signal delay time on the grid electrode scanning line.
Description
Technical field
The present invention relates to a kind of liquid crystal indicator, particularly the liquid crystal indicator of two-way controlling grid scan line.
Background technology
Traditional cathode-ray tube (CRT) (Cathode Ray Tube, CRT) display relies on the phosphor powder on the cathode-ray tube (CRT) emitting electrons bump screen to come display image, and LCD (Liquid Crystal Display, LCD) principle is different fully with CRT monitor, usually, liquid crystal indicator has upper substrate and infrabasal plate, have each other certain intervals and mutually over against, be formed on two substrates a plurality of electrodes mutually over against, liquid crystal is clipped between upper substrate and the following basic meal, voltage is applied on the liquid crystal by the electrode on the substrate, thereby changes the arrangement display image of liquid crystal molecule then according to the voltage that is acted on.But aforesaid liquid crystal indicator itself oneself is not launched light, it needs extra light source to come display image, therefore, liquid crystal indicator has the backlight that is positioned at the liquid crystal panel back, thereby controls from backlight quantity of incident light display image according to the arrangement of liquid crystal molecule.The structure of general liquid crystal indicator is as follows: accompany glass substrate, colored filter, electrode, liquid crystal layer and thin film transistor (TFT) between two polaroids, liquid crystal molecule is the material with refractive index and dielectric constant anisotropy.The light process that backlight sends is polaroid down, becomes the polarized light with certain polarization direction.Institute's making alive between the transistor controls electrode, and this voltage acts on the polarization direction that liquid crystal is controlled polarized light, polarized light forms monochromatic polarized light after seeing through corresponding color film chromatograph, if polarized light can penetrate the upper strata polaroid, then demonstrates corresponding color; According to the electric field intensity difference, the deflection angle of liquid crystal molecule is also different, and the light intensity that sees through is different, and the brightness of demonstration is also different, and the combination that the optical filter by three kinds of colors of RGB forms different light intensity shows motley image.
But, general liquid crystal indicator adopts one-sided type of drive, as shown in Figure 1, it mainly comprises source electrode driver 2a, 2b, 2c and gate drivers 1, with corresponding data line SL that is connected of source electrode driver and controlling grid scan line GL with gate drivers, data line SL and controlling grid scan line GL intersect the pixel electrode PX in the zone that surrounds, with data line SL, the thin film transistor (TFT) T that controlling grid scan line GL is connected with pixel electrode PX, the corresponding data presented signal with this row of grid opening signal is by source electrode driver 2a during one-sided type of drive, 2b, 2c enters in the LCD array panel that needs to drive, with all be added with the needed voltage of turn-on transistor on the grid that controlling grid scan line GL is connected, data-signal writes pixel by the transistor of opening in the period that transistor T is opened.After writing end, grid voltage returns to the transistorized voltage of closing, this row write termination, enter the ablation process of next line, so full whole image is finally write in circulation.Cut-in voltage on the controlling grid scan line is to advance to a fixed-direction one by one, has in the same period and has only that voltage is cut-in voltage on the single line.Data signal line loads simultaneously, and all signals enter in the corresponding pixel simultaneously when transistor is opened.Write line by line and keep, finally finish the demonstration of view picture picture.
As shown in Figure 2, when signal process resistance-capacitance network, the relativeness of the size of terminal signal voltage V and time and stray capacitance resistance R such as formula (1) are described:
Wherein, V
0Be therefore loading end signal voltage, C is a capacitance, if the stray capacitance resistance R is long-pending bigger, under the relatively shorter situation of write time, terminal voltage V can be bigger in the difference at network two ends.The result that this reason causes is the delay of voltage on the lead, and concrete outcome as shown in Figure 3.
Distribution basic symbols under the one-sided type of drive that adopts is closed and is stated equivalent schematic diagram at present--Fig. 2, and the capacitance resistance of the parasitism of lead is inevitable.Therefore starting end and the end at lead certainly exists above-mentioned voltage difference.The influence that this voltage difference on the controlling grid scan line is brought is the difference as a result that identical data-signal writes at the controlling grid scan line two ends.This result shows that showing on the image quality is brightness disproportionation one, flicker, image retention etc. in the liquid crystal indicator.For example generation delay in the signal decline process of controlling grid scan line, then the signal of next line picture might partly write this pixel, and the brightness that this place shows differs with the brightness that produces the delay place.The feedback voltage (FeedThroughVoltage) that for example causes: Vft=(Cgs/Ctotal) * (Vgon-Vgoff) again owing to the stray capacitance Cgs of transistor gate source electrode, the voltage that this voltage causes writing is to same direction change, to cause brightness disproportionation one and flicker problem when the feedback voltage of difference is different, thereby may cause image retention etc. bad.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of liquid crystal indicator of two-way controlling grid scan line, by the signal delay time on this liquid crystal indicator controlling grid scan line.
For achieving the above object, the invention provides a kind of liquid crystal indicator of two-way controlling grid scan line, this liquid crystal indicator comprises source electrode driver and gate drivers, with corresponding data line that is connected of source electrode driver and controlling grid scan line with gate drivers, wherein, this controlling grid scan line is connected with the transfer bus that voltage is closed in output.
Description of drawings
Fig. 1 is the liquid crystal indicator synoptic diagram of existing one-sided driving;
Fig. 2 is the equivalence principle circuit diagram of Fig. 1;
Fig. 3 is available liquid crystal display device input voltage signal and output voltage signal synoptic diagram;
Fig. 4 is the liquid crystal indicator first embodiment synoptic diagram of two-way controlling grid scan line of the present invention;
Fig. 5 is the partial enlarged drawing of Fig. 4 liquid crystal indicator;
Fig. 6 is first embodiment of the invention drive signal figure;
Fig. 7 is for adopting liquid crystal indicator input voltage signal of the present invention and output voltage signal synoptic diagram;
Fig. 8 is the liquid crystal indicator second embodiment synoptic diagram of two-way controlling grid scan line of the present invention;
Fig. 9 is liquid crystal indicator the 3rd embodiment synoptic diagram of two-way controlling grid scan line of the present invention;
Figure 10 is third embodiment of the invention drive signal figure.
Embodiment
Be described in further detail below with reference to the liquid crystal indicator of accompanying drawing two-way controlling grid scan line of the present invention.
As shown in Figure 4, the liquid crystal indicator first embodiment synoptic diagram for two-way controlling grid scan line of the present invention, it mainly comprises source electrode driver 12a, 12b, 12c and gate drivers 11, with corresponding data line SL ' that is connected of source electrode driver and controlling grid scan line Gn with gate drivers, Gn+1, Gn+2, data line SL ' and controlling grid scan line Gn, Gn+1, Gn+2 intersects the pixel electrode PX ' in the zone that surrounds, with data line SL ', controlling grid scan line Gn, Gn+1, the on-off element that Gn+2 is connected with pixel electrode PX ', this on-off element is thin film transistor (TFT) T ', wherein, controlling grid scan line Gn, Gn+1, Gn+2 one end also is connected with the transfer bus that voltage Vgoff is closed in output by the gate line signal input transistors Tg of correspondence, controlling grid scan line Gn, Gn+1, Gn+2 is first conductive layer, and data line SL ' is second conductive layer.
Fig. 5 is a liquid crystal indicator partial enlarged drawing shown in Figure 4.What present embodiment adopted is that memory capacitance commonly used at present is positioned at the frame mode on the grid (Gate-Storage), and promptly the lastrow controlling grid scan line is used to a wherein utmost point of the memory capacitance of next line pixel, and another is pixel electrode PX ' very.Pixel electrode PX ' adopts transparent electrode material to make, and material is the compound of indium or materials such as tin or zinc.Controlling grid scan line Gn, Gn+1, Gn+2 adopt progressive scan mode, as shown in Figure 6, be that lastrow controlling grid scan line Gn is added with the signal Vgon that control TFT T ' grid is opened within a certain period of time, this row reverted to transistor shutdown signal Vgoff after the time of opening finished, and next line controlling grid scan line Gn+1 goes up the signal Vgon that Loading Control thin film transistor (TFT) T ' grid is opened simultaneously.The terminal separated into two parts of next line controlling grid scan line Gn+1, a part is as the transistor T g grid of control lastrow input, and a part is as the source electrode of one's own profession input transistors Tg in addition.Interconnected connecting hole mode by third electrode layer D3 links to each other between first, second conductive layer.The transistor drain of these control grid inputs is all closed voltage Vgoff transfer bus with transistor and is connected.
When the capable controlling grid scan line Gn of n signal became Vgoff by Vgon, the capable controlling grid scan line Gn+1 of n+1 signal became Vgon by Vgoff.Because there is signal delay in distribution, delaying of signal will take place from the controlling grid scan line input end to the controlling grid scan line end in signal.The present invention opens transistor T g between n horizontal scanning line Gn and the Vgoff fixed voltage by the capable controlling grid scan line Gn+1 of n+1 in this process, transistor T g closes voltage Vgoff and enters in the capable controlling grid scan line Gn of n by transistor T g, as shown in Figure 7, thereby shortened time delay, by the mode of sequential scanning the input transistors of each row controlling grid scan line signal has been controlled like this.
As shown in Figure 8, the liquid crystal indicator second embodiment synoptic diagram for two-way controlling grid scan line of the present invention, the structure division that second embodiment is identical with first embodiment no longer describes in detail here, the difference of itself and embodiment 1 is that mainly the storage capacitor construction that second embodiment adopts is the frame mode that memory capacitance is positioned at public electrode (Com-Storage).Be the memory capacitance utmost point wherein that public electrode (com electrode) is used to pixel, another is pixel electrode very.The common electric voltage that is used for memory capacitance in the pixel connects by public electrode connecting bus on every side.Second embodiment is identical with the principle of work of first embodiment, can reach the purpose that shortens time delay.
As shown in Figure 9, liquid crystal indicator the 3rd embodiment synoptic diagram for two-way controlling grid scan line of the present invention, present embodiment adopts interleaved mode to carry out, promptly the capable controlling grid scan line Gn of n is added with the signal Vgon that control TFT T ' grid is opened within a certain period of time, this row reverted to transistor shutdown signal Vgoff after the time of opening finished, and the capable controlling grid scan line Gn+2 of n+2 goes up the signal Vgon that Loading Control thin film transistor (TFT) T ' grid is opened simultaneously.The terminal separated into two parts of the capable controlling grid scan line Gn+2 of n+2, a part is as the transistor T g grid of the capable controlling grid scan line Gn input of control n, and a part is as the source electrode of one's own profession Gn+2 input transistors Tg in addition.Interconnected connecting hole mode by third electrode layer D13 links to each other between first, second conductive layer.The transistor drain of the control grid importation of controlling grid scan line end is all closed voltage Vgoff transfer bus with transistor and is connected.
The principle of work of this embodiment is as follows: the type of drive that it divides two frames to drive at first is that the odd-numbered line frame is driven, and secondly is that dual numbers row frame drives.Figure 10 is adopted drive signal figure by present embodiment.When the capable controlling grid scan line Gn of n signal became Vgoff by Vgon, the capable controlling grid scan line Gn+2 of n+2 signal became Vgon by Vgoff.Because there is signal delay in distribution, delaying of signal will take place from the controlling grid scan line input end to the controlling grid scan line end in signal.The present invention opens transistor T g between n horizontal scanning line Gn and the Vgoff fixed voltage by the capable controlling grid scan line Gn+2 of n+2 in this process, transistor T g closes voltage Vgoff and enters in the capable controlling grid scan line Gn of n by transistor T g, as shown in Figure 7, thereby shortened time delay, by the mode of sequential scanning the input transistors of interlacing controlling grid scan line signal is controlled like this, the effect to controlling grid scan line after two frames drive is identical.
That more than introduces only is based on preferred embodiment of the present invention, can not limit scope of the present invention with this.Any measurement mechanism of the present invention is done replacement, the combination, discrete of step well know in the art, and the invention process step is done well know in the art being equal to change or replace and all do not exceed exposure of the present invention and protection domain.
Claims (9)
1. the liquid crystal indicator of a two-way controlling grid scan line, this liquid crystal indicator comprises source electrode driver and gate drivers, with corresponding data line that is connected of source electrode driver and controlling grid scan line with gate drivers, it is characterized in that this controlling grid scan line is connected with the transfer bus that voltage is closed in output.
2. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 1 is characterized in that, the transfer bus that described controlling grid scan line end is closed voltage by the transistor AND gate output of correspondence connects.
3. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 2 is characterized in that, described transistor drain is connected with the transfer bus that voltage is closed in output.
4. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 2 is characterized in that, described transistorized grid is connected with the controlling grid scan line of next line.
5. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 2 is characterized in that, described controlling grid scan line is terminal to be connected with the corresponding transistor source electrode.
6. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 2 is characterized in that, described transistorized grid is connected with the controlling grid scan lines of following two row.
7. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 1 is characterized in that, data line is connected with the connecting hole mode of controlling grid scan line by the third electrode layer.
8. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 1 is characterized in that, described data line and controlling grid scan line intersect the pixel electrode in the zone that surrounds, and the on-off element that is connected with data line, controlling grid scan line and pixel electrode
9. the liquid crystal indicator of two-way controlling grid scan line as claimed in claim 8 is characterized in that, described on-off element is a thin film transistor (TFT).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100477275A CN101424838A (en) | 2007-11-02 | 2007-11-02 | LCD device for two-way controlling grid scan line |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007100477275A CN101424838A (en) | 2007-11-02 | 2007-11-02 | LCD device for two-way controlling grid scan line |
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| CN101424838A true CN101424838A (en) | 2009-05-06 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNA2007100477275A Pending CN101424838A (en) | 2007-11-02 | 2007-11-02 | LCD device for two-way controlling grid scan line |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230178564A1 (en) * | 2021-12-08 | 2023-06-08 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel and display device |
| WO2023102980A1 (en) * | 2021-12-08 | 2023-06-15 | 武汉华星光电技术有限公司 | Display panel and display device |
-
2007
- 2007-11-02 CN CNA2007100477275A patent/CN101424838A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20230178564A1 (en) * | 2021-12-08 | 2023-06-08 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel and display device |
| WO2023102980A1 (en) * | 2021-12-08 | 2023-06-15 | 武汉华星光电技术有限公司 | Display panel and display device |
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Open date: 20090506 |