CN101401319A - A based WCDMA system rake receiver set and method - Google Patents

A based WCDMA system rake receiver set and method Download PDF

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Publication number
CN101401319A
CN101401319A CNA2006800538554A CN200680053855A CN101401319A CN 101401319 A CN101401319 A CN 101401319A CN A2006800538554 A CNA2006800538554 A CN A2006800538554A CN 200680053855 A CN200680053855 A CN 200680053855A CN 101401319 A CN101401319 A CN 101401319A
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data
antenna data
antenna
demodulation
module
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CN101401319B (en
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古艳涛
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Sanechips Technology Co Ltd
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ZTE Corp
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69—Spread spectrum techniques
    • H04B1/707—Spread spectrum techniques using direct sequence modulation
    • H04B1/7097—Interference-related aspects
    • H04B1/711—Interference-related aspects the interference being multi-path interference

Abstract

A RAKE receiver set includes connected sections working on the delay demodulation mode. They include: an antenna data memory, an antenna data reading and writing control section, a multi-path demodulation section, a scrambling code and channelising code generation section, a user parameter control section, a CCH signs disposing section, a TFCI decoding section, characterized in that they also include an antenna data quicklier reading/wait section for controling the antenna data reading and writing control section to read the delay antenna data quicklier or wait, a DCH data combination section for combining the DCH multi-path demodulation results data, an antenna data buffer section for storing the straight input antenna data and the faster input antenna data which is delayed storing according to the correlator length of the multi-path demodulation section, a multi-path parameter control section for demodulating the CCH and DCH with different rates. A RAKE receiving method is disclosed too.

Description

A based WCDMA system RAKE receiver set and method
The present invention relates to a kind of broadband CDMA system for RAKE reception devices and method and technology field based on broadband CDMA system（WCDMA) the BBP uplink receiving device and method of base station, more specifically, refers to RAKE (the multi-path separation merging in the case of base station uplink receiving supports R6 agreements）Receiver hardware realization apparatus and method.Background technology, because spacing wireless transmission environment is complicated and severe, therefore, is generally used RAKE receiver device to carry out the reception of wireless data in WCDMA wireless communication systems.The RAKE receiver device carries out maximum-ratio combing and realizes the recovery of wireless signal by being demodulated to a plurality of multipath.In a wcdma system, the RAKE receiver of existing base station baseband processor generally has following two implementations：One kind is Dedicated Physical Control Channel（DPCCH) and Dedicated Physical Data Channel (DPDCH) is while demodulation modes, in this mode, due to the DPDCH of present frame spreading factor（SF it is) unknown, so can only control-minimum SF enters demodulation, then the liquor-saturated DPCCH and DPDCH for having adjusted a frame, all TFCI symbol datas will be collected into decode and obtain after actual SF, then demodulated completion, frame DPDCH is subjected to quadratic integral；Another is the delayed mode that the DPDCH delay frames of DPCCI-I mono- are demodulated, in this mode, first, DPCCH is normally carried out demodulation, and will be collected into all TFCI symbol datas after a frame DPCCH has been demodulated and enter row decoding, so as to obtain actual SF, then, DPDCH demodulation is proceeded by again, and at this moment DPDCH demodulation can be entered the demodulation of 4 Chus by actual SF.Below, two kinds of implementations referring to the drawings to the RAKE receiver of existing base station baseband processor are described in detail.Wherein assume the speed for directly inputting antenna data that accelerating velocity is 2 times, multi-path demodulation module correlator length ismChip.Fig. 1 is the existing synchronous demodulation pattern RAKE receiver device of WCDMA system that the first pattern is related to.As shown in Figure 1, first, for existing synchronous demodulation pattern RAKE receiver device, including antenna data Slow storing modules 102, multi-path demodulation module 104, scrambler and channel code generation module 106, customer parameter control module 108, control channel Symbol processing module 110, TFCI decoding modules 112 and data channel quadratic integral module 114. Specifically, first, the antenna data of input directly inputs antenna data Slow storing modules 102 and Slow is stored away, then each clock cycle send the antenna data of m chips into multi-path demodulation module 104, customer parameter control module 108 controls 4 outstanding code and channel code generation modules 106 to produce corresponding scrambler and channel code simultaneously, and is also sent in multi-path demodulation module 104.By the antenna data of input and scrambler, the related accumulating operation of channel code progress in multi-path demodulation module 104, wherein, data channel carry out to be carried out according to minimum SF during related accumulating operation, and control channel is so can obtain respectively（DPCCII symbolic number Ju) and data channel（DPDCH symbol data).Next, by the symbol data of control channel be sent in control channel Symbol processing module 110 and carry out channel estimation, maximum-ratio combing, TFCI symbols extract after, can obtain a frame all TFC1 symbols.All TFCI symbol datas of one frame;The actual SF that TFCI decoding modules 112 enter to can obtain corresponding data channel after row decoding, decoding is sent to, then data channel quadratic integral module 114 is given by actual SF.In data channel quadratic integral module 114, before actual SF is obtained, whole data channel symbols data have been stored, first, these symbol datas are read, and two sub-symbols are carried out according to actual SF and are added up, so as to can obtain final data channel symbols.Fig. 2 is the existing Delay Demodulation pattern RAKE receiver device of WCDMA system that second of pattern is related to.As shown in Figure 2, first, for existing synchronous demodulation pattern RAKE receiver device, including antenna data Slow storing modules 202, multi-path demodulation module 204, scrambler and channel code generation module 206, customer parameter control module 208, control channel Symbol processing module 210, TFCI decoding modules 212, antenna data memory 216 and antenna data Read-write Catrol module 218.For existing dolayed demodulation pattern RAKE receiver device, antenna data Read-write Catrol module 218 controls to store the antenna data of input into antenna data memory 206, simultaneously, the antenna data of input and stored delay antenna data are sent to follow-up antenna data Slow storing modules 202, so as to the multi-path demodulation in below step.With the antenna data directly inputted when the Slow of antenna data Slow storing modules 202 survives, then each clock cycle send the antenna data of m chips into multi-path demodulation module 204, simultaneously, customer parameter control module 208 controls scrambler and channel code generation module 206 to produce corresponding scrambler and channel code, and the scrambler and channel code are also directed in multi-path demodulation module 204.In multi-path demodulation module 204, by the antenna data of input and scrambler, the related accumulating operation of channel code progress, such Fen Do can obtain control channel（DPCCH symbol data and the symbol data of data channel (DPDCH)).Then the symbol data of control channel is sent to control channel Symbol processing module 210 and carries out channel estimation, maximum-ratio combing, TFC1 symbols and extract the two all TFCI symbols for obtaining a frame.By a frame it is all ' 1TCJL symbol datas are sent to TFCI decoding modules 212 and enter row decoding, the actual SF of corresponding data channel is can obtain after decoding, and actual SF is sent in customer parameter control module 208, to control scrambler and channel code to produce.As depicted in figs. 1 and 2, in existing RAKE receiver, the RAKE of simultaneously/auspicious mode transfer formula Receiver apparatus is main advantage is that meet the processing time requirement of 3GPP R6 agreements, and the advantage that Delay Demodulation pattern RAKE receiver apparatus is mainly is to make up transmission and the big shortcoming of data storage amount caused by demodulation modes simultaneously.But the processing time that the processing time of dolayed demodulation pattern RAKE receiver device can not meet 3GPP R6 agreements requires, it is therefore desirable to reduce the processing time of dolayed demodulation pattern RAKE receiver device.Because dolayed demodulation pattern RAKE receiver device stores the antenna data of a frame time, for after the SF that corresponding DJPDCH obtains reality, start demodulation again, but, due to existing dolayed demodulation pattern RAKE receiver apparatus delay antenna data input speed and demodulation speed and to directly input the speed of antenna data be the same, so causing total demodulation process time very long.Therefore it may only be necessary to accelerate to postpone the input speed and multi-path demodulation speed of antenna data, it is possible to reduce total demodulation process time, reach that the processing time of 3GPP R6 agreements requires.Simultaneously, 3GPP provides that the actual SF of E-DPDCH can arbitrarily change in the range of 2 ~ 256, and Radio Link need not be rebuild, i.e., the minimum SF of all users is 2, but actual SF is probably any one value in 2,4,8,16,32,64,128,256.According to this feature, if using demodulation modes simultaneously, all users must be demodulated E-DPDCH by SF=2, wait until that E-DPCCH have demodulated a TTI always, collect whole ETFCI and decoded and obtain after actual SF, then carry out quadratic integral.During for SF=2, a l OmsTTI has 19200 data, when number of users reaches 128, it is necessary first to which stores substantial amounts of data, needs up to 250MHz working frequency to complete while handling so many data in a TTI.Therefore, when number of users is more, it is necessary to very big storage resource could meet this requirement, and very high data processing frequency is needed, so as to add the difficulty and cost of system realization.Moreover, in Release 1999, due to DPCH（DJPCH) processing is without strict time requirement, but system is directed to different business needs, has minimum SF limitation, the minimum SF of such as data service is 4, corresponding actual SF scope is 4,8 and 16.Therefore above two RAKE receiver apparatus is used, demodulation modes more save hardware resource to Delay Demodulation pattern ratio simultaneously, because can be demodulated and data storage with actual SF with 4 officials, and the step of eliminate quadratic integral, therefore most of communication systems all use Delay Demodulation pattern.But for 3GPP R6 agreements, up enhancing DPCH (E ~ DPCH) is which increased, the processing of the channel has strict timing restriction.Provided according to 3GPP, processing delay no more than 8. 3ms for 2ms Τ Π in base station system always；Processing delay no more than 24.3mss of the 10ms TTI in base station system always.According to this limitation, if handling E-DPCH using the RAKE receiver device of Delay Demodulation pattern, the requirement of system processing time limitation can not be met.In summary, existing two kinds of RAKE receiver devices can not all meet WCDMA R6 associations View is required, it is necessary to can meet time restriction requirement using one kind, again need not too big storage resource
RAKE receiver device, the problem of it can solve the problem that in above-mentioned correlation technique.Being of the content of the invention present invention provide it is a kind of meet WCDMA it is R6 protocol realization requirements, both met time restriction requirement, again need not too big storage resource the RAKE receiver device based on WCDMA.It, which overcomes traditional synchronous demodulation pattern RAKE receiver, needs to take the shortcoming of more storage resource, while also overcoming traditional Delay Demodulation pattern RAKE receivers needs the shortcoming of longer processing time.According to an aspect of the invention, there is provided a kind of RAKE receiver device, including Delay Demodulation pattern connection work with lower module：Antenna data memory, antenna data Read-write Catrol module, multi-path demodulation module, scrambler and channel code generation module, customer parameter control module, control channel Symbol processing module, TFCI decoding modules, in addition to：Antenna data accelerates reading/wait module, and for accelerating/waiting control signal to antenna data Read-write Catrol module transmission antenna data, control antenna data Read-write Catrol module accelerates to read delay antenna data or wait；Data channel signal merging module, the multi-path demodulation result data of the data channel for continuously being exported after handling the acceleration of multi-path demodulation module merges processing, and obtains final data channel symbols；Antenna data Slow storing modules, accelerate for the antenna data directly inputted according to the correlator length storage of multi-path demodulation module and after delay storage the antenna data of input；And multipath parameter control module, the demodulation for carrying out friction speed to control channel and data channel》In above-mentioned RAKE receiver device, antenna data is the data of 3 GPP agreements.In above-mentioned RAKE receiver device, the SF of the data of 3GPP agreements is the arbitrary value between 2 ' -256.In above-mentioned RAKE receiver device, the input speed for accelerating the antenna data of input is n times of the antenna data directly inputted, and antenna data Slow storing modules include n data Slow memory cell, and each data Slow memory cells store chip.In above-mentioned RAKE receiver device, multipath parameter control module root weighs multipath parameter in the hand, each timeticks read the m chip antenna datas that one antenna data Slow memory cell stores from antenna data Slow storing modules and are sent to multi-path demodulation module below, to carry out the demodulation of friction speed.According to another aspect of the present invention there is provided a kind of RAKE method of reseptances, including the following step 3 of Delay Demodulation pattern work is gathered：Antenna data storing step, antenna data Read-write Catrol step, multi-path demodulation step Suddenly, scrambler and channel code produce step, customer parameter rate-determining steps, control channel Symbol processing step,
TFCI decoding procedures, in addition to following step Recording：Antenna data accelerates reading/waiting step, and walking transmission antenna data of remonstrating with to antenna data Read-write Catrol accelerates/wait control signal, and control antenna data Read-write Catrol step accelerates to read delay antenna data or wait；Data channel signal He Bing Bu Sudden, the multi-path demodulation result data of the data channel continuously exported after handling multi-path demodulation Bu Sudden acceleration merges processing, and obtains final data channel symbols；Antenna data Slow deposits step, the antenna data directly inputted according to the correlator length storage of multi-path demodulation step and the antenna data for accelerating input after delay storage；And multipath parameter rate-determining steps, the demodulation of friction speed is carried out to control channel and data channel.In above-mentioned RAKE method of reseptances, antenna data is the data of 3GPP agreements.In above-mentioned RAKE method of reseptances, the SF of the data of 3GPP agreements is the arbitrary value between 2 ~ 256.In above-mentioned RAKE method of reseptances, the input speed for accelerating the antenna data of input is n times of the antenna data directly inputted.Antenna data Slow, which deposits step, includes each data Slow memory cells storage m chips of n data Slow memory cell.In above-mentioned RAKE method of reseptances, multipath parameter rate-determining steps are according to multipath parameter, each timeticks from antenna data Slow deposit step in read the m chip antenna datas of an antenna data Slow memory cells storage and be sent to multi-path demodulation step below, to carry out the demodulation of friction speed.Art scheme is helped by upper fan, the present invention realizes following technique effect：On the one hand the present invention uses Delay Demodulation pattern, it is to avoid during synchronous demodulation, correspondence DPDCH can only using most ' j, SF=2 be demodulated, so as to produce substantial amounts of data symbol, the problem of causing data transfer and difficult data storage；On the other hand present invention correspondence Delay Demodulation pattern, for delay data using by the way of accelerating demodulation, the data of Delay Demodulation is demodulated time shortening, so that the E-DPCH processing times for meeting R6 agreements limit requirement.Although because Delay Demodulation accelerates to cause hardware resource increased, but, the processing time for being primarily due to the R6 agreements present invention accomplishes WCDMA requires, secondly because increase of the present invention to hardware resource is few more many than the hardware resource that data transfer caused by synchronous demodulation pattern and data storage need, the last control due to the present invention realize it is fairly simple, so being easy to implement.In a word, RAKE receiver of the invention and its method either meet protocol requirement, or hardware realizes resource and hardware to realize in difficulty all has very big advantage than original RAKE receiver and its method.Other features and advantages of the present invention will be illustrated in the following description, also, is partly become apparent from specification, or is understood by implementing the present invention.The purpose of the present invention and other advantages can Realize and obtain by specifically noted structure in the specification, claims and accompanying drawing write.Brief description of the drawings accompanying drawing described herein is used for providing a further understanding of the present invention, constitutes the part of the application, and schematic description and description of the invention is used to explain the present invention, does not constitute inappropriate limitation of the present invention.In the accompanying drawings：Fig. 1 is the traditional synchronous demodulation pattern RAKE receiver device of WCDMA system；Fig. 2 is the traditional Delay Demodulation pattern RAKE receiver device of WCDMA system；Fig. 3 is the block diagram based on WCDMA system RAKE receiver device that first embodiment of the invention is related to；Antenna data in the RAKE receiver device that Fig. 4 is related to for first embodiment of the invention accelerates acceleration/wait control sequential figure of reading/wait module；Fig. 5 is that the antenna data Slow of traditional RAKE receiver apparatus and the antenna data Slow storing modules in the RAKE receiver device of the present invention that first embodiment of the invention is related to deposits Structure Comparison figure；And the multi-path demodulation control sequential figure that Fig. 6 is the multi-path demodulation module in the RAKE receiver device that is related to of first embodiment of the invention；And the flow chart that Fig. 7 is the RAKE method of reseptances that second embodiment is related to.Embodiment below with reference to the accompanying drawings and in conjunction with the embodiments, to describe the present invention in detail.First is real；^ illustrations 3 be this example be related to just several devices are received based on WCDMA system RAKE 4.In RAKE receiver device, including Delay Demodulation pattern connection work with lower module：Antenna data memory 316, antenna data and delay antenna data for storing input；Antenna data Read-write Catrol module 318, the read-write for the antenna data and stored delay antenna data of control input；Multi-path demodulation module 304, for the control according to multipath parameter control module 320 by the antenna data of input and Scrambler, channel code enter 4 in correlation demodulation；Scrambler and channel code generation module 306, for producing scrambler and channel code that correspondence multi-path demodulation needs；Customer parameter control module 308, the generation of scrambler and channel code is controlled for the scrambling code number according to user and the actual SF of user；Control channel Symbol processing module 310, adds up for being controlled channel symbol, channel estimation, maximum-ratio combing；
TFCI is decoded; i:Not block 312, all TFCI symbols that a frame or a Τ are obtained for being extracted to TFCI symbols enter row decoding, and will decode and obtain the actual SF of corresponding DPDCI- I, E-DPDCH and be sent to customer parameter control module 308, in addition to：Antenna data accelerates reading/wait module 322, and for accelerating/waiting control signal to antenna data Read-write Catrol module transmission antenna data, control antenna data Read-write Catrol module accelerates to read delay antenna data or wait；Data channel signal merging module 324, the multi-path demodulation result data of the data channel for continuously being exported after handling the acceleration of multi-path demodulation module merges processing, and obtains final data channel symbols；Antenna data Slow storing modules 302, accelerate for the antenna data directly inputted according to the correlator length storage of multi-path demodulation module and after delay storage the antenna data of input；And multipath parameter control module 320, the demodulation for carrying out friction speed to control channel and data channel.Antenna data can be the data of 3GPP agreements.
The SJF of the data of 3GPP agreements can be the arbitrary value between 2 ~ 256.The input speed for accelerating the antenna data of input can be n times of the antenna data directly inputted, and antenna data Slow storing modules 302 include 11 data Slow memory cells, and each data Slow memory cells store m chips.Multipath parameter control module 320 can be according to multipath parameter, each timeticks read the m chip antenna datas that one antenna data Slow memory cell stores from antenna data Slow storing modules 302 and are sent to multi-path demodulation module 304 below, to carry out the demodulation of friction speed.Specifically, received for E-DPCH RAKE, antenna data Read-write Catrol module 318 controls to store the antenna data of input into antenna data memory 316 first, the antenna data of input and stored delay antenna data are sent to follow-up antenna data Slow storing modules 302 simultaneously, with multi-path demodulation later, the antenna data wherein inputted is to be directly sent to antenna data Slow storing modules 302 below, and stored delay data then accelerates the control of reading/wait module 322 according to antenna data, start the input antenna data for accelerating to postpone if desired, then control antenna data Read-write Catrol module 318 accelerates from the antenna data memory 316 input antenna data of readout delay and is sent in antenna data Slow storing modules 302 below, if corresponding accelerated read of delay antenna data completes, then control antenna data Read-write Catrol module 318 stops reading delay antenna data and waited. Antenna data Slow storing modules 302 will accelerate the antenna number Ju of input to be stored according to the correlator length of multi-path demodulation module 304 after the antenna data directly inputted and delay storage.Antenna data wherein for directly inputting, the antenna data of each antenna data Slow memory cells storage m chips ', and for accelerating the antenna data of such as 2 times inputs, because the antenna data amount inputted in the unit interval is directly input antenna data 2 times, therefore each antenna needs two data Slow memory cells, each unit stores the antenna data of m chips, so as to the requirement for the acceleration demodulation for meeting these antenna data correspondence multipath.Multipath parameter control module 320 is according to multipath parameter simultaneously, and each timeticks read the m chip antenna datas that one antenna data Slow memory cell stores from antenna data Slow storing modules 302 and are sent to multi-path demodulation module 304 below.Scrambler and channel code that customer parameter control module 308 needs with the co- controlling scrambler of multipath parameter control module 320 multi-path demodulation corresponding with the generation of channel code generation module 306.Wherein customer parameter control module 308 is mainly according to the outstanding code number of user and the actual SF of user to control the generation of outstanding code and channel code, and multipath parameter control module 320 is mainly the generation number of times for controlling scrambler and channel code, whether need to continuously generate scrambler and channel code, and control the scrambler and channel code of generation being sent in multi-path demodulation module 304.Just the antenna data and scrambler of input, channel code are carried out correlation demodulation to multi-path demodulation module 304 by the blunt control according to multipath parameter control module 320, wherein for DPCCH and E-DPCCH, only need to a timeticks and enter m chips antenna data of 4 Chu and m chips scrambler, the correlation computations of channel code, and for DPDCH：, the DPDCH of E mono- then need two timeticks, each timeticks carry out a m chips antenna data and m chips scrambler, the correlation computations of channel code.According to the difference of channel code, multi-path demodulation module 304 produces the multi-path demodulation result of these control channels of DPCCH, E-DPCCH respectively, and DPDCH, E-DPDCH these data channels multi-path demodulation result be sent to respectively it is standby from follow-up processing module.Multi-path demodulation result for control channel is sent to control channel Symbol processing module 310 and carries out that symbol is cumulative, channel estimation, maximum-ratio combing, TFCI symbols, which are extracted, to be obtained a frame or a TTI all TFCI symbols and is sent to TFCI decoding modules 312 and enters row decoding, decoding obtains the actual SF of corresponding DPDCH, E-DPDCH and is sent to customer parameter control module 308, for controlling DPDCH, E-DPDCH scramblers, channel code to produce.For the multi-path demodulation result of data channel, it is sent to data channel signal merging module 324, the actual SF provided according to customer parameter control module 308 carries out the cumulative data symbol for obtaining final data channel of symbol data to control continuous multi-path demodulation result twice to carry out data merging according to actual SF. Fig. 4 is acceleration/wait control sequential figure that antenna data in the RAKE receiver device that the present embodiment is related to accelerates reading/wait module 322.It can see from timing diagram, under the control that antenna data accelerates reading/wait module 322, the antenna data reading speed of delay is 2 times of the antenna data directly inputted, therefore for the direct antenna data input time of a frame, only need to half time namely half frame time come accelerate read in antenna data, corresponding multi-path demodulation module 304 also only needs to demodulation of the half frame time completion to E-DPDCH, and then ^ booths stop reading delay antenna data and wait temple remaining half frame time.Fig. 5 is that the antenna data Slow of conventional rake receiver device and the antenna data Slow storing modules 302 in the RAKK receiver apparatus of the present invention that the present embodiment is related to deposits Structure Comparison figure.As shown in figure 5, the left side is the antenna data buffer structure of conventional rake receiver device, the right is that the antenna data Slow of the RAKE receiver device of the present invention deposits structure.Assuming that 0,1 ... ..., it is DPCCH, Ε-DPCCH corresponding day wire size of multipath that η -1 days wire sizes are corresponding, and η, η+1 ... ..., 2 η -1 days wire sizes are DPDCH, Ε-DPDCH corresponding day wire size of multipath.For conventional rake receiver device, every multipath correspondence only needs to a memory cell, the multi-path demodulation of data later of each memory cell storage m chips.And for RAKE receiver device of the present invention, wherein DPCCH and E-DPCCH multipaths only need to a memory cell, the multi-path demodulation of data later of each memory cell storage m chips, and DPDCH and E-DPDCH multipaths accelerate input because the delay antenna data of input is 2 times, therefore every multipath uses the data in requisition for continuous two memory cell, each memory cell storage m chips multi-path demodulation later.Fig. 6 is this reality；The multi-path demodulation control sequential figure of multi-path demodulation module 304 in the ^ RAKE receiver devices that are related to.As shown in fig. 6, being the multi-path demodulation control sequential figure of the multi-path demodulation module 304 of conventional rake receiver device above, here is the multi-path demodulation control sequential figure of the multi-path demodulation module 304 of the RAKE receiver device of the present invention.For conventional rake receiver device, every multipath correspondence only needs to a multi-path demodulation, every time the data of demodulation m chips.And for the RAKIi receiver apparatus of the present invention, wherein DPCCH and E-DPCCH multipaths only need to a multi-path demodulation, the data of m chips are demodulated every time, and DPDCH and E-DPDCH multipaths accelerate input because the delay antenna data of input is 2 times, therefore every multipath is in requisition for double multi-path demodulation, the data channel signal merging module that the data of demodulation m chips are sent to below every time carries out data symbol merging.Second is real；^ According to another aspect of the present invention, as shown in Figure 7 there is provided a kind of RAKE method of reseptances, including the work of Delay Demodulation pattern Yi Xia Bu Sudden：Antenna data storing step S716, antenna data and delay antenna data for storing input；Antenna data Read-write Catrol step S718, the read-write for the antenna data and stored delay antenna data of control input；Multi-path demodulation Bu Sudden S704, correlation demodulation is carried out for the control according to multipath parameter rate-determining steps S720 by the antenna data and scrambler of input, channel code；Scrambler and channel code produce step S706, for producing scrambler and channel code that correspondence multi-path demodulation needs；Customer parameter rate-determining steps S708, the generation of scrambler and channel code is controlled for the scrambling code number according to user and the actual SF of user；4 empty systems 4 say the Symbol processing step poly- S710 of ^, are used for into ^ that " control channel symbol to add up, channel estimation, maximum-ratio combing；TFCI decoding procedure S712, all TFCI symbols that a frame or a TTI are obtained for being extracted to TFCI symbols enter row decoding, and will decode and obtain the actual SF of corresponding DPDCH, E-DPDCH and be sent to customer parameter control step Sudden S708.Also include following step:Antenna data accelerates reading/waiting step S722, and for accelerating/waiting control signal to antenna data Read-write Catrol step transmission antenna data, control antenna data Read-write Catrol step accelerates to read delay antenna data or wait；Data channel signal combining step S724, the multi-path demodulation result data of the data channel for continuously being exported after handling the acceleration of multi-path demodulation step merges processing, and obtains final data channel symbols；Antenna data Slow deposits step S702, accelerates for the antenna data directly inputted according to the correlator length storage of multi-path demodulation step and after delay storage the antenna data of input；And multipath parameter control step S720, the demodulation for carrying out friction speed to control channel and data channel.Antenna data can be the data of 3GPP agreements.
The SF of the data of 3GPP agreements can be the arbitrary value between 2 ~ 256.The input speed for accelerating the antenna data of input can be n times of the antenna data directly inputted, and antenna data Slow, which deposits step S702, includes n data Slow memory cell, and each data Slow memory cells store m chips.Multipath parameter rate-determining steps S720 can be according to multipath parameter, each timeticks from antenna data Slow deposit step S702 in read the m chip antenna datas of an antenna data Slow memory cells storage and be sent to multi-path demodulation step 304 below, to carry out the demodulation of friction speed.Specifically, received for E-DPCH RAKE, antenna data Read-write Catrol step S718 first controls to store the antenna data of input into antenna data memory S716, the antenna data of input and stored delay antenna data are sent to follow-up antenna data Slow simultaneously and deposit the multi-path demodulations of step S702 later, the antenna data wherein inputted is to be directly sent to antenna data Slow Cun Bu Sudden S702 below, and stored delay data then accelerates reading/waiting step S722 control according to antenna data Start the input antenna data for accelerating to postpone if desired, then control antenna data Read-write Catrol step S718 accelerates from the antenna number Ju memory S716 input antenna data of readout delay and is sent to antenna data Slow Cun Bu Sudden S702 below, if corresponding accelerated read of delay antenna number Ju completes, control antenna data Read-write Catrol step S718 stops reading delay antenna data and waited.Antenna data Slow, which deposits step S702, to accelerate the antenna data of input to be stored according to multi-path demodulation step S704 correlator length after the antenna data directly inputted and delay storage.Antenna data wherein for directly inputting, each antenna data Slow memory cells store the antenna data of m chips, and for accelerating the antenna data of 2 times of inputs, because the antenna data amount inputted in the unit interval is directly input antenna data 2 times, therefore each antenna needs two data Slow memory cells, each unit stores the antenna data of m chips, can meet the requirement of the acceleration demodulation of these antenna data correspondence multipath.Multipath parameter rate-determining steps S720 is according to multipath parameter simultaneously, and each timeticks read the m chip antenna datas that one antenna data Slow memory cell stores from antenna data Slow Cun Bu Sudden S702 and are sent to the rapid S704 of multipath pacing below.Customer parameter controls the scrambler and channel code that Bu Sudden S708 control Bu Sudden S720 co- controllings scramblers multi-path demodulation corresponding with channel code generation step S706 generations to need with multipath parameter.Wherein customer parameter rate-determining steps S708 is mainly according to the scrambling code number of user and the actual SF of user to control the generation of scrambler and channel code, and multipath parameter rate-determining steps S720 is mainly the generation number of times of control scrambler and channel code, whether need to continuously generate scrambler and channel code, and control the scrambler and channel code of generation being sent in multi-path demodulation step S704.The antenna data and scrambler of input, channel code are carried out correlation demodulation by multi-path demodulation step S704 according to multipath parameter rate-determining steps S720 control, wherein for DPCCH and E-DPCCH, only need to a timeticks and carry out a m chips antenna data and m chips scrambler, the correlation computations of channel code, and two timeticks are then needed for DPDCH, E-DPDCH, each timeticks carry out a m chips antenna data and m chips scrambler, the correlation computations of channel code.The just blunt difference according to channel code, multi-path demodulation step S704 produces the multi-path demodulation result of these control channels of DPCCH, E-DPCCH respectively, and the multi-path demodulation result of DPDCH, E-DPDCH these data channels is sent in each follow-up Chu Li Bu Sudden respectively.Carry out that symbol is cumulative, channel estimation, maximum-ratio combing for the bright control channel Symbol processing step S710 that is sent to of multi-path demodulation knot of control channel, TFCI symbols, which are extracted, to be obtained a frame or a TTT all TFCI symbols and is sent to TFCI decoding procedures S712 and enters row decoding, decoding obtains the actual SF of corresponding DPDCH, E-DPDCH and is sent to customer parameter rate-determining steps S708, for controlling DPDCH, E-DPDCH scramblers, channel code to produce. For the multi-path demodulation result of data channel, it is sent to data channel signal combining step S724, just the blunt actual SF provided according to customer parameter rate-determining steps S708 controls the continuous multi-path demodulation result twice to carry out data merging, and according to actual SF carries out symbol data Congregation and add to obtain the data symbol of final data channel.The present embodiment accelerate/wait to be controlled, antenna data Slow deposit structure, multi-path demodulation control aspect with the-it is real;^ identical, so omitting its explanations of ^.As can be seen from the above description, the present invention realizes following technique effect：On the one hand the present invention uses Delay Demodulation pattern, it is to avoid during synchronous demodulation, and correspondence E DPDCH can only be demodulated using minimum SF=2, so that produce substantial amounts of data symbol, the problem of causing data transfer and difficult data storage；On the other hand present invention correspondence Delay Demodulation pattern, for delay data using by the way of accelerating demodulation, the data of Delay Demodulation is demodulated time shortening, so that the E-DPCH processing times for meeting R6 agreements limit requirement.Although because Delay Demodulation accelerates to cause hardware resource increased, but, the processing time for being primarily due to the R6 agreements present invention accomplishes WCDMA requires, secondly because increase of the present invention to hardware resource is few more many than the hardware resource that data transfer caused by synchronous demodulation pattern and data storage need, the last control due to the present invention realize it is fairly simple, so being easy to implement.In a word, RAK15 receivers of the invention and its method either meet protocol requirement, or hardware realizes resource and hardware to realize in difficulty all has very big advantage than original RAKE receiver and its method.Obviously, those skilled in the art should be understood that, above-mentioned each module of the invention or each step can be realized with general computing device, they can be concentrated on single computing device, or be distributed in multiple computing device Suo Group into network on, alternatively, they can be realized with the executable program code of computing device, so as to, it can be stored in storage device by computing device is come Chu, or they are fabricated to each integrated circuit modules respectively, or be fabricated to single integrated circuit module to realize by the multiple modules or step in them.So, the present invention is not restricted to any specific hardware and software combination.It should be understood that the change in these specific implementations will be apparent to the person skilled in the art, the spiritual protection domain of the present invention is not departed from.Power described above is the preferred embodiments of the present invention, is not intended to limit the invention, for those skilled in the art, and the present invention can have various more prop up and change.Within the spirit and principles of the invention, any modification, equivalent substitution and improvements made etc., should be included in the scope of the protection.

Claims (6)

  1. Claims
    A kind of 1 RAKE receiver device, including Delay Demodulation pattern connection work with lower module：Antenna data memory（316), antenna data Read-write Catrol module（318), multi-path demodulation module（304), scrambler and channel code generation module（306), customer parameter control module（308), control channel Symbol processing module（310), TFCI decoding modules（312), it is characterised in that also include：Antenna data accelerates reading/wait module（322), for accelerating/waiting control signal to the antenna data Read-write Catrol module transmission antenna data, the antenna data Read-write Catrol module is controlled to add reading delay antenna data or wait；
    Data channel signal merging module（324), the multi-path demodulation result data of the data channel for continuously being exported after handling the multi-path demodulation module acceleration merges processing, and obtains final data channel symbols；
    Antenna data Slow storing modules (302), for the antenna data that just the blunt correlator length storage according to the multi-path demodulation module is directly inputted and the antenna data for accelerating input after delay storage；And multipath parameter control module（320), for the demodulation to control channel and data channel progress friction speed.
    2. RAKE receiver device according to claim 1, it is characterised in that the antenna data is the data of 3GPP agreements.
    3. RAKE receiver device according to claim 2, it is characterised in that the SF of the data of 3GPP agreements is the arbitrary value between 2 ~ 256.
    4. RAKE receiver device according to claim 1, it is characterised in that the input speed of the antenna data of the acceleration input is n times of the antenna data directly inputted, the antenna number Ju Slow storing modules（302) n data Slow memory cell, each data Slow memory cells storage m chips are included.
    5. the RAKE receiver device being confused according to claim 1, it is characterized in that, multipath parameter control module (320) is according to multipath parameter, and each timeticks m chip antenna datas of one antenna data Slow memory cells storage of reading from antenna data Slow storing modules (302) are sent to multi-path demodulation module below（304), to carry out the demodulation of friction speed.
    6. a kind of RAKE method of reseptances, include the following steps of Delay Demodulation pattern work：Antenna data is deposited Chu Bu Sudden, antenna data Read-write Catrol step, multi-path demodulation step song, scrambler and channel code produce step, customer parameter rate-determining steps, control channel Symbol processing step, T.FCI decoding procedures, it is characterised in that further comprising the steps of：
    Antenna data accelerates reading/Deng Dai Bu Sudden, and control signal is accelerated/wait to the antenna data Read-write Catrol step transmission antenna data, controls the antenna data Read-write Catrol step to accelerate to read delay antenna data or wait；
    Data channel signal He Bing Bu Sudden, the multi-path demodulation result data that the data channel continuously exported after the poly- acceleration processing of horse is walked to the multi-path demodulation merges processing, and obtains final data channel symbols；
    Antenna data Slow deposits step, the antenna data directly inputted according to the correlator length storage of the multi-path demodulation Bu Sudden and the antenna data for accelerating input after delay storage；And
    Multipath parameter rate-determining steps, the demodulation of friction speed is carried out to control channel and data channel.RAKE method of reseptances according to claim 6, it is characterised in that the antenna data is the data of 3GPP agreements.RAKE method of reseptances according to claim 7, it is characterised in that the SF of the data of 3GPP agreements is the arbitrary value between 2 ~ 256.RAKE method of reseptances according to claim 6, it is characterized in that, the input speed of the antenna data for accelerating to input is n times of the antenna data directly inputted, and the antenna data Slow, which deposits step, includes each data Slow memory cells storage m chips of n data Slow memory cell.RAKE receiver device according to claim 6, it is characterized in that, multipath parameter controls Bu Sudden according to multipath parameter, each timeticks from antenna data Slow deposit step in read the m chip antenna datas of an antenna data Slow memory cells storage and be sent to multi-path demodulation step below, to carry out the demodulation of friction speed.
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