CN101387894A - Bias current generating circuit and operational amplifier - Google Patents
Bias current generating circuit and operational amplifier Download PDFInfo
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- CN101387894A CN101387894A CNA2008102164142A CN200810216414A CN101387894A CN 101387894 A CN101387894 A CN 101387894A CN A2008102164142 A CNA2008102164142 A CN A2008102164142A CN 200810216414 A CN200810216414 A CN 200810216414A CN 101387894 A CN101387894 A CN 101387894A
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Abstract
The invention is adaptable to the integrated circuit field, and particularly relates to a bias current generator circuit and an operational amplifier. The bias current generator circuit comprises a power supply, a first switch, a second switch, an energy storing/ releasing element, a first transistor, a second transistor and a reference current. One end of the energy storing/ releasing element is connected with the power supply via the first switch, and is connected with grids of the first transistor and the second transistor via the second switch, the other end is grounded, a source/drain electrode of the first transistor is grounded, the grid and the source/ drain electrode are all connected with the reference current, a source/drain electrode of the second transistor is grounded, the grid is connected with the reference current, and when the energy storing/ releasing element releases energy to the grids of the first transistor and the second transistor to recharge, bias current is output by the source/drain electrode of the second transistor. The bias current generator circuit outputs the maximum bias current at the zero-crossing point of input signals and outputs low bias current when the maximum bias current is not required, thereby reducing power consumption, increasing voltage conversion rate, and simultaneously increasing stability by utilizing the open-loop control.
Description
Technical field
The invention belongs to integrated circuit fields, relate in particular to a kind of bias current generating circuit and operational amplifier.
Background technology
The operational amplifier that often needs high conversion rate in simulating signal chip and the analog and digital mixed signal chip, when especially driving the output simulating signal, need big driving force could drive outside resistance or electric capacity, also need satisfy the requirement of harmonic distortion or rising/fall time and the requirement of power consumption simultaneously.
Bias current generating circuit can be exported less quiescent current and drive big load, is widely used in cable actuated, constant-current LED chip for driving, other operational amplifiers or chip for driving.
Require the application low, that output voltage swing is big, output load is big in quiescent dissipation, the driving circuit with low speed paper tape reader static power disspation, high voltage switching rate is very necessary.For example drive application (particularly big screen LED screen) at constant-current LED, in order to guarantee that the PWM modulating pulse can respond 20ns, output current is the above LED chip for driving of 60mA to the maximum, general about 5ns output 60mA current rise time that requires, fall time about 5ns, so the bias current generating circuit of high conversion rate, low speed paper tape reader static power disspation is very essential.
And prior art (application number is: 01270527.6, the utility model name is called: the bias current generating circuit of mentioning the complementary metal oxide semiconductor (CMOS) line driver), can finish automatic biasing, can reach the requirement that quiescent dissipation is low, switching rate is fast within the specific limits, but owing in circuit, formed a closed loop (MN1, MN2, MP1), constituted a gain multiple less than 1 positive feedback, very easily produced self-excitation, thereby reduced the stability of chip; Simultaneously also can reforming phenomena might occur, be unfavorable for producing in batches with technique change.
Summary of the invention
The purpose of the embodiment of the invention is to provide a kind of bias current generating circuit, is intended to solve existing bias current generating circuit and adopts closed-loop control to cause the problem of poor stability.
The embodiment of the invention is achieved in that a kind of bias current generating circuit, comprising:
Power supply, first switch, second switch, storage/release can elements, the first transistor, transistor seconds and reference current;
Described storage/release can element an end be connected with described power supply by described first switch, also pass through described second switch and be connected with the grid of described the first transistor and described transistor seconds; Other end ground connection; When described first switch conduction, when described second switch disconnects, described storage/release and can be used for energy storage by element; When described first switch disconnects, during described second switch conducting, described storage/release can element be used to release can;
Source/the grounded drain of described the first transistor, grid all is connected with described reference current with leakage/source electrode; Source/the grounded drain of described transistor seconds, grid connect described reference current, when described storage/release can element be released can be to the gate charges of described the first transistor and described transistor seconds the time, by the leakage/source electrode output offset electric current of described transistor seconds.
The purpose of the embodiment of the invention also is to provide a kind of operational amplifier, comprise bias current generating circuit, mirror image circuit and amplifying circuit, the output of described bias current generating circuit forms bias current behind described mirror image circuit, output after described amplifying circuit amplifies again; Described bias current generating circuit comprises:
Power supply, first switch, second switch, storage/release can elements, the first transistor, transistor seconds and reference current;
Described storage/release can element an end be connected with described power supply by described first switch, also pass through described second switch and be connected with the grid of described the first transistor and described transistor seconds; Other end ground connection; When described first switch conduction, when described second switch disconnects, described storage/release and can be used for energy storage by element; When described first switch disconnects, during described second switch conducting, described storage/release can element be used to release can;
Source/the grounded drain of described the first transistor, grid all is connected with described reference current with leakage/source electrode; Source/the grounded drain of described transistor seconds, grid connect described reference current, when described storage/release can element be released can be to the gate charges of described the first transistor and described transistor seconds the time, by the leakage/source electrode output offset electric current of described transistor seconds.
The bias current generating circuit that the embodiment of the invention provides when not needing the maximum bias electric current, is exported little bias current at the zero crossing output maximum bias electric current of input signal, has reduced power consumption, has improved voltage conversioning rate; Adopt open loop control simultaneously, improved stability.
Description of drawings
Fig. 1 is the circuit diagram of the bias current generating circuit that provides of the embodiment of the invention;
Fig. 2 is the principle oscillogram of the bias current generating circuit that provides of the embodiment of the invention;
Fig. 3 is the circuit diagram of the operational amplifier that provides of the embodiment of the invention;
Fig. 4 is the circuit diagram of the LED constant current output circuit that provides of the embodiment of the invention.
Embodiment
In order to make purpose of the present invention, technical scheme and advantage clearer,, the present invention is further elaborated below in conjunction with drawings and Examples.Should be appreciated that specific embodiment described herein only in order to explanation the present invention, and be not used in qualification the present invention.
The bias current generating circuit that the embodiment of the invention provides when not needing the maximum bias electric current, is exported little bias current at the zero crossing output maximum bias electric current of input signal, has reduced power consumption, has improved voltage conversioning rate; Adopt open loop control simultaneously, avoided the problem of poor stability.
The bias current generating circuit that the embodiment of the invention provides can adopt complementary metal oxide semiconductor (CMOS), and (Complementary Metal Oxide Semiconductor, CMOS) technology making also can adopt the bipolar technology (Bipolar) of simulation to make; This bias current generating circuit is mainly used in field of power management and microelectronics technology.
Fig. 1 shows the bias current generating circuit that the embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with the embodiment of the invention, and details are as follows.
Bias current generating circuit comprises: power supply 100, first switch 101, second switch 102, storing up/release can element 103, the first transistor 104, transistor seconds 105 and reference current 106; Wherein, an end that stores up/release energy element 103 is connected with power supply 100 by first switch 101, also is connected with the grid of the first transistor 104 with transistor seconds 105 by second switch 102; Other end ground connection; When 101 conductings of first switch, when second switch 102 disconnects, store up/release and to be used for energy storage by element 103; When first switch 101 disconnects, during second switch 102 conductings, store up/release and to be used to release energy by element 103; Source/the grounded drain of the first transistor 104, grid all is connected with reference current 106 with leakage/source electrode; Source/the grounded drain of transistor seconds 105, grid connect reference current 106, can element 103 release can be to the gate charges of the first transistor 104 and transistor seconds 105 time when storing up/releasing, by 105 leakage/source electrode output offset electric current I B of transistor seconds.
As one embodiment of the present of invention, bias current generating circuit also comprises: zero cross detection circuit 107, and export control signal DB and D according to input signal Vi, and control the break-make of first switch 101 and second switch 102.
In embodiments of the present invention, store up/release and to be capacitor C 1 by element, also can be any element that can realize store electrical energy and discharge electric energy.
Now the bias current generating circuit principle that the embodiment of the invention provides is described in conjunction with Fig. 2: when the input signal Vi of zero passage testing circuit 107 is sine wave, the control signal D and the reverse each other square wave of DB of zero cross detection circuit 107 outputs.When DB is high level, the 101 closed conductings of first switch, second switch 102 disconnects, and power supply 100 gives capacitor C 1 charging; When D is high level, first switch 101 disconnects, second switch 102 closed conductings, the electric energy that is stored in the capacitor C 1 passes through the gate charges of second switch 102 to the first transistor 104 and transistor seconds 105, make the instantaneous rising of grid voltage of transistor seconds 105, therefore the also very fast increase of drain electrode output offset electric current I B of transistor seconds 105 provides maximum bias current Im at zero crossing M; The grid voltage of transistor seconds 105 progressively discharges by the first transistor 104 then, makes bias current IB gradually reduce quiescent current Iref.Can guarantee like this when input signal Vi zero crossing M, bias current IB maximum, At All Other Times, bias current IB reduces to quiescent bias current Iref from Im gradually, can satisfy average current Iav much smaller than peak point current.
According to the principle of work of operational amplifier as can be known slew rate (Slew Rate, computing formula SR) is:
When ω t=k π, SR maximum, i.e. SR
Max=A ω;
When the electric capacity of driving is arranged in the circuit, according to law of conservation of charge, obtain Δ UC=I Δ t, so
When the electric capacity of driving is arranged in the circuit, according to law of conservation of charge, obtain Δ UC=I Δ t, so
Further can obtain: I
Max=CSR
Max=CA ω
Wherein, A is the amplitude of oscillation of output signal, and ω is the angular frequency of output signal, and C needs the capacitance that drives in the circuit.By above derivation as can be known, when the input signal zero crossing, need maximum bias current, and relatively little at non-zero crossing to the bias current demand.
If the zero crossing M at input signal Vi strengthens bias current, suitably regulate the Charge Storage amount, can well make the switching rate of zero crossing M meet the demands, simultaneously, at most of the time bias current IB is quiescent biasing Iref, can finish the requirement of low-power consumption (being low quiescent current), high conversion rate.
Fig. 3 shows the circuit of the operational amplifier that adopts the bias current generating circuit that the embodiment of the invention provides, and for convenience of explanation, only shows the part relevant with the embodiment of the invention, and details are as follows:
Operational amplifier comprises: bias current generating circuit 31, mirror image circuit 32 and amplifying circuit 33, wherein, the output of bias current generating circuit 31 forms bias current behind mirror image circuit 32, again output after amplifying circuit 33 amplifies.Wherein, bias current generating circuit 31 is the circuit shown in Figure 1 that the embodiment of the invention provides, and is not giving unnecessary details at this.Mirror image circuit 32 comprises: metal-oxide-semiconductor MP5, MP6, MP7, MN7, MN8, MN9, carry out current offset to operational amplifier behind bias current IB process metal-oxide-semiconductor MP5, MP6, MP7 and metal-oxide-semiconductor MN7, the MN8 of bias current generating circuit 31 outputs, the MN9.Amplifying circuit 33 comprises by metal-oxide-semiconductor MP1, MP2 forms the difference input to pipe, differential voltage signal VP, the VN of input delivers to the source electrode of metal-oxide-semiconductor MN5, MN6 respectively after the voltage-to-current conversion is amplified, metal-oxide-semiconductor MN5, MN6 are with the translation of differential current signal level, after the electric current of metal-oxide-semiconductor MN5 passes through the current mirroring circuit of being made up of metal-oxide-semiconductor MP3, MP4, with current summation through metal-oxide-semiconductor MN6, electric current after the addition causes the variation of output terminal VO voltage, thereby differential voltage signal VP, VN are amplified, by VO output, realize the voltage amplification function.
In embodiments of the present invention, the LED constant current output circuit of employing bias current generating circuit for convenience of explanation, only shows the part relevant with the embodiment of the invention as shown in Figure 4, and details are as follows:
The LED constant current output circuit comprises: operational amplifier A 1, A2, A3 and metal-oxide-semiconductor M1, M2, M3, M4, M5; VB is the bias reference voltage of input, and Iref is the reference current of input; Operational amplifier A 3 constitutes voltage follower 41 with metal-oxide-semiconductor M1, and bias reference voltage VB is the forward input voltage of operational amplifier A 1, A2 behind voltage follower 41; Operational amplifier A 1 promotes circuit 42 with the output impedance that metal-oxide-semiconductor M4 constitutes metal-oxide-semiconductor M2, and operational amplifier A 2 promotes circuit 43 with the output impedance that metal-oxide-semiconductor M5 constitutes metal-oxide-semiconductor M3.Metal-oxide-semiconductor M2, M3 amplify the image current of output mos pipe M1 respectively, and enlargement factor is by the breadth length ratio decision of M2 and M1, M3 and M1.
When the first pulse-width signal PWM1 is input to operational amplifier A 1, when in a single day the automatic bias circuit in the operational amplifier A 1 detects the rising edge of data, the bias current of operational amplifier A 1 increases, form big electric current and driven MOS pipe M4, make the grid voltage of metal-oxide-semiconductor M4 rise rapidly, metal-oxide-semiconductor M4 enters the saturation region rapidly, exports the image current of metal-oxide-semiconductor M2 to Iout1 by metal-oxide-semiconductor M4, and the mirror image of finishing reference current Iref amplifies output.In like manner, when the second pulse-width signal PWM2 is input to operational amplifier A 2, when in a single day the automatic bias circuit in the operational amplifier A 2 detects the rising edge of data, the bias current of operational amplifier A 2 increases, form big electric current and driven MOS pipe M5, make the grid voltage of metal-oxide-semiconductor M5 rise rapidly, metal-oxide-semiconductor M5 enters the saturation region rapidly, export the image current of metal-oxide-semiconductor M3 to Iout2 by metal-oxide-semiconductor M5, the mirror image of finishing reference current Iref amplifies output.
The minimum pulse width of pulse-width signal PWM output is 20ns, output current is 100mA, need carry out fast driving to the grid of metal-oxide-semiconductor at zero crossing, requirement (less than 5ns) with rising/fall time of satisfying output current, and when PWM output pulse was maintained high level, the bias current of driving can be very little.Adopt the LED constant current output circuit of the bias current generating circuit that the embodiment of the invention provides to satisfy the requirement of quick response, low-power consumption like this.
The bias current generating circuit that the embodiment of the invention provides when not needing the maximum bias electric current, is exported little bias current at the zero crossing output maximum bias electric current of input signal, has reduced power consumption, has improved voltage conversioning rate; Adopt open loop control simultaneously, improved stability.
The above only is preferred embodiment of the present invention, not in order to restriction the present invention, all any modifications of being done within the spirit and principles in the present invention, is equal to and replaces and improvement etc., all should be included within protection scope of the present invention.
Claims (6)
1, a kind of bias current generating circuit is characterized in that, described bias current generating circuit comprises:
Power supply, first switch, second switch, storage/release can elements, the first transistor, transistor seconds and reference current;
Described storage/release can element an end be connected with described power supply by described first switch, also pass through described second switch and be connected with the grid of described the first transistor and described transistor seconds; Other end ground connection; When described first switch conduction, when described second switch disconnects, described storage/release and can be used for energy storage by element; When described first switch disconnects, during described second switch conducting, described storage/release can element be used to release can;
Source/the grounded drain of described the first transistor, grid all is connected with described reference current with leakage/source electrode; Source/the grounded drain of described transistor seconds, grid connect described reference current, when described storage/release can element be released can be to the gate charges of described the first transistor and described transistor seconds the time, by the leakage/source electrode output offset electric current of described transistor seconds.
2, bias current generating circuit as claimed in claim 1 is characterized in that, described bias current generating circuit also comprises:
Zero cross detection circuit is exported control signal according to input signal, and controls the break-make of described first switch and described second switch.
3, bias current generating circuit as claimed in claim 1 is characterized in that, described storage/release can element be an electric capacity.
4, a kind of operational amplifier comprises bias current generating circuit, mirror image circuit and amplifying circuit, and the output of described bias current generating circuit forms bias current behind described mirror image circuit, output after described amplifying circuit amplifies again; It is characterized in that described bias current generating circuit comprises:
Power supply, first switch, second switch, storage/release can elements, the first transistor, transistor seconds and reference current;
Described storage/release can element an end be connected with described power supply by described first switch, also pass through described second switch and be connected with the grid of described the first transistor and described transistor seconds; Other end ground connection; When described first switch conduction, when described second switch disconnects, described storage/release and can be used for energy storage by element; When described first switch disconnects, during described second switch conducting, described storage/release can element be used to release can;
Source/the grounded drain of described the first transistor, grid all is connected with described reference current with leakage/source electrode; Source/the grounded drain of described transistor seconds, grid connect described reference current, when described storage/release can element be released can be to the gate charges of described the first transistor and described transistor seconds the time, by the leakage/source electrode output offset electric current of described transistor seconds.
5, operational amplifier as claimed in claim 4 is characterized in that, described bias current generating circuit also comprises:
Zero cross detection circuit is exported control signal according to input signal, and controls the break-make of described first switch and described second switch.
6, operational amplifier as claimed in claim 4 is characterized in that, described storage/release can element be an electric capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008102164142A CN101387894A (en) | 2008-10-07 | 2008-10-07 | Bias current generating circuit and operational amplifier |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2008102164142A CN101387894A (en) | 2008-10-07 | 2008-10-07 | Bias current generating circuit and operational amplifier |
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| CN101387894A true CN101387894A (en) | 2009-03-18 |
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| CNA2008102164142A Pending CN101387894A (en) | 2008-10-07 | 2008-10-07 | Bias current generating circuit and operational amplifier |
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101834565A (en) * | 2010-04-23 | 2010-09-15 | 美商威睿电通公司 | Signal amplifying circuit and signal amplifying method |
| CN102520756A (en) * | 2011-12-28 | 2012-06-27 | 南京邮电大学 | Bias current generating circuit |
| CN103595355A (en) * | 2013-11-25 | 2014-02-19 | 中国电子科技集团公司第四十一研究所 | Constant-current bias system of microwave amplifier |
| CN105974996A (en) * | 2016-07-26 | 2016-09-28 | 南方科技大学 | Reference voltage source |
| CN106779018A (en) * | 2017-01-03 | 2017-05-31 | 爱康普科技（大连）有限公司 | Memory and RFID in limited time |
| WO2019019359A1 (en) * | 2017-07-27 | 2019-01-31 | 广州联星科技有限公司 | Bidirectional current self-adaptive power amplifier bias circuit |
| CN113568460A (en) * | 2020-04-29 | 2021-10-29 | 无锡华润上华科技有限公司 | Bias current generating circuit and flash memory |
| WO2023109426A1 (en) * | 2021-12-13 | 2023-06-22 | 深圳飞骧科技股份有限公司 | Power regulation circuit for power amplifier, and power amplifier |
-
2008
- 2008-10-07 CN CNA2008102164142A patent/CN101387894A/en active Pending
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101834565A (en) * | 2010-04-23 | 2010-09-15 | 美商威睿电通公司 | Signal amplifying circuit and signal amplifying method |
| CN102520756A (en) * | 2011-12-28 | 2012-06-27 | 南京邮电大学 | Bias current generating circuit |
| CN102520756B (en) * | 2011-12-28 | 2013-09-25 | 南京邮电大学 | Bias current generating circuit |
| CN103595355A (en) * | 2013-11-25 | 2014-02-19 | 中国电子科技集团公司第四十一研究所 | Constant-current bias system of microwave amplifier |
| CN103595355B (en) * | 2013-11-25 | 2016-08-17 | 中国电子科技集团公司第四十一研究所 | A kind of microwave amplifier constant biasing system |
| CN105974996A (en) * | 2016-07-26 | 2016-09-28 | 南方科技大学 | Reference voltage source |
| CN106779018A (en) * | 2017-01-03 | 2017-05-31 | 爱康普科技（大连）有限公司 | Memory and RFID in limited time |
| CN106779018B (en) * | 2017-01-03 | 2024-03-22 | 爱康普科技（大连）有限公司 | Time-limited memory and RFID electronic tag |
| WO2019019359A1 (en) * | 2017-07-27 | 2019-01-31 | 广州联星科技有限公司 | Bidirectional current self-adaptive power amplifier bias circuit |
| CN113568460A (en) * | 2020-04-29 | 2021-10-29 | 无锡华润上华科技有限公司 | Bias current generating circuit and flash memory |
| WO2021218160A1 (en) * | 2020-04-29 | 2021-11-04 | 无锡华润上华科技有限公司 | Bias current generation circuit and flash memory |
| WO2023109426A1 (en) * | 2021-12-13 | 2023-06-22 | 深圳飞骧科技股份有限公司 | Power regulation circuit for power amplifier, and power amplifier |
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