CN101383888B - FSK modulating method based on fax modulation and demodulation proposal V.21 - Google Patents
FSK modulating method based on fax modulation and demodulation proposal V.21 Download PDFInfo
- Publication number
- CN101383888B CN101383888B CN2008102250256A CN200810225025A CN101383888B CN 101383888 B CN101383888 B CN 101383888B CN 2008102250256 A CN2008102250256 A CN 2008102250256A CN 200810225025 A CN200810225025 A CN 200810225025A CN 101383888 B CN101383888 B CN 101383888B
- Authority
- CN
- China
- Prior art keywords
- modulation
- modulated
- digital signal
- code element
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
The invention relates to an FSK modulating method based on a facsimile modulation suggestion V.21, which belongs to the technical field of communication modulation-demodulation. When a digital signal 0 appears in binary digital signals to be modulated, a carrier wave with a carrier frequency of 1850 Hz is used for modulation, and if a digital signal 1 appears in the binary digital signals to be modulated, a carrier wave with a carrier frequency of 1650 Hz is used for modulation. During the modulation, a later signal to be modulated takes a phase value of the last sample point of an adjacent former signal which finishes the modulation, thereby the continuity of the phases of the whole modulation signals is maintained. When the method in the invention is used for modulation, even when a frequency changes, the phase hopping is not caused, thereby the continuity of the phases is maintained; and the frequency band occupied by the transmission of the modulation signals with continuous phases is narrow so that the channel use efficiency can be improved.
Description
Technical field
The present invention relates to a kind of frequency shift keying (frequency-shift-key, be called for short FSK) modulator approach, be specially a kind ofly, belong to communication modulation-demodulation technique field based on facsimile modulation/demodulation recommendation FSK modulator approach V.21.
Background technology
According to (the International Telephone andTelegraph Consultative Committee of international telephone and telegraph Advisory Board, abbreviation CCITT) V.21 the facsimile modulation/demodulation recommendation in the suggestion (sees accompanying drawing 8), it is used for transmitting the binary code control signal, and V.21 modulator-demodulator is that the transmission rate of using in the public switched telephone network is the standardization duplex modulator-demodulator of 300 bauds (Baud).Group-three facsimile apparatus (be present general facsimile type, claim the G3 facsimile machine, same group-two facsimile apparatus is called for short the G2 facsimile machine) adopts half-duplex mode communication, is used to transmit binary control signal (signaling-information).Use the characteristic frequency of second channel in the V.21 suggestion: mark adopts Fa=1650Hz, and spacing adopts Fz=1850Hz.V.21 the modulator-demodulator of group-three facsimile apparatus adopts method of synchronization work, needn't be provided at transmission and keep required signal synchronously when stopping.The method of FSK modulation is adopted in this modulation suggestion.But V.21 only provide modulator approach in the suggestion, do not provided concrete modulation implementation method, also do not provided demodulation method and concrete demodulation implementation method, met the V.21 concrete modulation-demo-demodulation method of suggestion so will design.
The most frequently used method of facsimile modulation/demodulation recommendation modulation V.21 has two kinds.A kind of is Frequency conversion, as shown in Figure 1.Frequency conversion has two independently oscillators (frequency of oscillation is Fa and Fz), and producing frequency f 1 respectively is that 1850Hz and f2 are the carrier signal of 1650Hz.Control with digital signal, when the modulator supplied with digital signal is 0, the carrier signal (characteristic frequency is f1) that output frequency is higher; Supplied with digital signal is 1 o'clock, the carrier signal that output frequency is lower (characteristic frequency is f2).Because f1 and f2 come from two oscillators, the phase place of the fsk signal of modulation output generally is discontinuous, and its start-phase often at random.The discontinuous frequency-modulated wave of phase place need take the transmission band of broad, causes the waste of bandwidth resources.
Another kind is the direct frequency modulation method.The direct frequency modulation method is directly to reach the method that changes oscillator frequency with certain parameter of Digital Signals oscillator.The phase place of the fsk signal that this method produces is continuous, and required transmission band is narrower, saves bandwidth resources.But realize with the hardware of an oscillator and physical switch that mostly this hardware implementation mode realizes flexibly not as software, and the realization cost is higher than the software realization, accompanying drawing 2 is the block diagrams that adopt direct frequency modulation method modulation fsk signal.
Summary of the invention
Main purpose of the present invention is to overcome in the past the discontinuous or phase place of the phase place of modulating in the FSK modulator approach that realizes continuously but the problem that not easy-to-use software is realized, the present invention proposes a kind of FSK modulator approach that meets V.21 suggestion that simply is easy to realize, the modulator approach phase place is continuous, saves bandwidth resources.
FSK modulator approach proposed by the invention both can realize with hardware circuit or integrated chip, also can realize with software, and the software realization is generally flexible than the hardware realization, cost is low.
Basic ideas of the present invention:
When running into digital signaling zero in treating modulating binary word signal, be that the carrier wave of 1850HZ is modulated with carrier frequency, digital signal 1 is that the carrier wave of 1650HZ is modulated with carrier frequency then.During modulation, each sampled point phase place of advancing in the accumulative total modulation signal treats that modulation signal is an initial phase with the phase value of last sampled point of the previous modulated signal that is adjacent, can keep the continuity of whole modulating signal phase like this for back one.
The concrete technical scheme that the present invention takes is as follows:
A kind of based on facsimile modulation/demodulation recommendation FSK modulator approach V.21, adopted the continuous direct frequency modulation method of phase place, meet (the International Telephone andTelegraph Consultative Committee of international telephone and telegraph Advisory Board, abbreviation CCITT) the V.21 facsimile modulation/demodulation recommendation in the suggestion, V.21 be proposed to be used in the binary digit control signal of modulation binary digit control signal waiting for transmission or demodulate reception, specifically may further comprise the steps: at first judge that with the numeric code judging module binary digital signal code element to be modulated that is used to transmit is 0 or 1, if 0, with frequency is that the carrier frequency of 1850Hz is modulated, if 1 is that the carrier wave of 1650Hz is modulated with frequency
1) the sample rate F of this modulator approach is 8000Hz, and digital signal code element transmission rate is 300 bauds (Baud), adopts interpolation method that sample rate F is carried out interpolation, and making sample rate F is the integral multiple of digital signal code element transmission rate;
2) with the sample rate after the interpolation divided by digital signal code element transmission rate, obtain the sampled point number M of each digital signal code element, the initial phase place value of binary digital signal code element first to be modulated is made as phase0=0, through phase advance behind M the sampled point of this digital signal code element phase, so current phase place has become phasel=phase0+phase, no matter the next one treats that the modulated digital signal code element is 0 or 1, all treats the initial phase of modulated digital signal code element as the next one with this phase place;
According to said method, all modulation signals for the treatment of are modulated, treat that modulation signal is an initial phase with the phase value of last sampled point of the previous modulated signal that is adjacent for promptly back one; During modulation, the method for employing mould 2 π is limited in the size of phase place within 0～2 π scope.
Advantage of the present invention:
1) the modulator approach phase place is continuous, saves bandwidth resources.
The discontinuous reason of phase place is when frequency changes in the common modulator approach, the initial phase of modulation signal can be 0 from phase all, will make that like this modulating signal phase has saltus step, produce the discontinuous signal of phase place, the discontinuous modulation signal of phase place transmits shared frequency band just than broad.And the modulator approach that we adopt is by the phase place of the modulation signal of the current code element of record, initial phase as next code element modulation signal, even make that like this frequency change also can not cause the saltus step of phase place, thereby guaranteed the continuity of phase place, it is narrow that the continuous modulation signal of phase place transmits shared frequency band, can improve the utilance of channel.
2) modulator approach of the present invention with software implement simple and flexible, adaptability is strong, cost is low.This modulator approach also can realize with hardware.
The explanation of accompanying drawing table
Fig. 1: Frequency conversion modulation flow chart
Fig. 2: direct frequency modulation method modulation flow chart
Fig. 3: based on FSK modulation algorithm flow chart V.21
Fig. 4: High-Level Data Link Control (HDLC) frame structure
Fig. 5: FSK real data (data that actual reception arrives in channel)
Fig. 6: FSK modulating data (with the result data of modulator of the present invention) with the binary code modulation
Fig. 7: the fsk data (data among Fig. 6 after the amplification of black surround part) that phase place is continuous
Fig. 8: Jian Yi parameter V.21.
Embodiment
Describe present embodiment in detail below in conjunction with accompanying drawing:
V.21 modulator is used to transmit binary control signal, so the signal of input is binary digital signal 0 and 1.
The specific implementation step is (as Fig. 3):
1) judges that at first the binary digital signal code element to be modulated that is used to transmit is 0 or 1.
If 0, be that the carrier frequency of 1850Hz is modulated with frequency, if 1 is that the carrier wave of 1650Hz is modulated with frequency.Signal that so successively will be to be modulated is modulated.
Because the sample rate that adopts in the modulation is different with the transmission rate for the treatment of the modulated digital signal code element, so will sample to each digital signal code element when modulating, the sampled point number M of each digital signal code element elects 80 as here.Because V.21 the digital signal code element transmission rate of suggestion requirement is 300 bauds, and the sample rate F of this modulator approach is 8000Hz, this will cause each digital signal code element can not obtain an integer sampled point, so adopt amount of calculation little, realize simple linear interpolation method, sample rate is become the common multiple of 300 baud rates, for example carry out 3 times of interpolation, sample rate is become 24000Hz.So the sampled point number of each digital signal code element has also become 80 points accordingly by 80/3 point.Concrete interpolation implementation method is: the sample value of establishing previous sample point is x
1, then the sample value of a sample point is x
2, the zone between these two sampled points is divided into the p equal portions, establish current sampled point t at q/p point place, corresponding sample value x (t) is:
x(t)＝x
1(p-q)/p+x
2q/p
2) determined the sampled point number M of each digital signal code element after, the initial phase place value for the treatment of modulation signal is made as phase0=0, the phase place of advancing during for n when sampling number is phase=2 * π * f * n/F (F=8000Hz, n=0,1 ... M-1, f are f1 or f2).The digital signal code element of supposing current transmission is 0, adopt the sine wave modulation of frequency f 1=1850Hz, when sampling number did not reach M, the phase place that this sampled point advances was phase=2 * π * f1 * n/F (F=8000Hz, n=0,1, M-2), when sampling number is M, phase advance phase=2 * π * f1 * (M-1)/F, so current phase place has become phasel=phase0+phase, and this phase place is treated the initial phase of modulated digital signal code element as the next one.If next digital signal code element still is 0, then the carrier frequency of modulation employing is constant; If next digital signal code element has become 1, so, the corresponding f2=1650Hz that become of carrier frequency that modulation is adopted, but no matter next digital signal code element is 0 or 1, the next one treats that the initial phase of modulation signal all is phase0+phase, phase place does not produce saltus step all the time, has guaranteed that so just the signal after the modulation is that phase place is continuous, the sine wave signal of frequency change.
3) if treating modulated digital signal does not also finish, then continue to repeat above 1), 2) step, otherwise finish modulation.
During modulation, the method for employing mould 2 π is limited in the size of phase place within 0～2 π scope.
Test result:
V.21 modulation is proposed to be used in the binary system control signaling of modulation facsimile posting.The fax control procedure of binary code all adopts High-Level Data Link Control (High level Data Link Control, abbreviation HDLC) frame structure is (as accompanying drawing 4, annotate: the flag bit of HDLC frame structure is 0x7E, address bit is 0xFF, and control, fax control, facsimile message, Frame Check Sequence all are uncertain, determine according to the facsimile of reality).HDLC-procedure is a kind of bit-oriented link control procedure, and these rules make the monitoring function of communicating pair represent order and response to certain bit combination that the other side sends separately by both sides, can well adapt to interactive operation.Basic HDLC structure is made up of a plurality of frames, and every frame is divided into some fields, the confirmation that this structure provides sign, error checking and correction and correctly receives information for frame.
Accompanying drawing 4 has provided a HDLC frame structure, and it is made up of leader, flag sequence, address field, control field, information field (being divided into FCF facsimile control field and FIF facsimile information field), Frame Check Sequence etc.
When one section FSK modulating data (figure such as accompanying drawing 5) that typically meets V.21 suggestion that receives from actual channel of input.This segment data is the data of one section intercepting, can see clearly that from accompanying drawing 5 density degree of each several part of these data is different, and the frequency of the part of dredging as can be known through frequency detecting is 1650Hz, and the frequency of close part is 1850Hz.Binary system HDLC frame structure data sequence before the modulation of the actual correspondence of this section modulating data is as follows:
011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111001111110011111100111111011111111110000001100001000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000001111010000110011000100111110001010001011111100111111001111110
Further adopt hexadecimal representation as follows:
7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E
7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E?7E
FF
C0?C2?04?04?04?04?04?04?04?04?04?04?04?04?04?04?04?04?04?1E?86?62?7C
51
7E?7E?7E
According to the facsimile rules in the CCITT suggestion T.30, front end is several 0x7E (01111110) (number of the 0x7E in the HDLC frame structure before the modulation that the number of the 0x7E in the HDLC frame structure before the modulation that the G3 facsimile machine of different brands obtains and the G3 facsimile machine of same brand repeatedly obtain during repeated call can be different slightly for flag bit in the above data sequence, the number of 0x7E is 41 in this segment data), ensuing 0xFF (11111111) is an address bit, the centre is control field 0xC0 (11000000 successively, 0xC2 (11000010), information field 0x04 (00000100) etc., middle signaling is different at every turn, will be (for example according to concrete facsimile posting, the number difference of facsimile machine, signaling difference in the middle of used fax-rate all can not cause on an equal basis) decides, 0x7E (01111110) appears again being masked as at last, this meets the binary system HDLC frame structure of the T.30 communication control procedure regulation of CCITT suggestion fully, and this is one section typical representative data.Above-mentioned binary signal is modulated, can obtain continuous modulation signal of phase place such as accompanying drawing 6, can see that modulation signal is one section different modulating data of density, the component frequency of dredging is 1650Hz, close component frequency is 1850Hz, get certain part (as drawing the part of black box) amplification (seeing accompanying drawing 7) with appointing in the accompanying drawing 6, can see that data in the black surround are density inequality (wherein have the thick black line in two places partly different with other parts density), the data that two frequencies are described have, but but can't see the discontinuous situation of phase place after amplifying, illustrate that this modulator approach can guarantee the continuity of the phase place of modulation signal.
Obtain modulation signal after with modulator approach of the present invention above-mentioned binary signal being modulated, send to the G3 facsimile machine and carry out the demodulation checking, the G3 facsimile machine is approved this modulating data, shows that modulation result is correct.
Through checking, on the facsimile machine of different brands repeatedly the data sequence before the repeated call pairing modulation of different data sequences of obtaining with modulator approach modulation of the present invention and be sent to and carry out demodulation on the G3 facsimile machine and verify that the result is correct.
In addition, the software that designs according to this modulator approach carries out V.21 signaling modulated test on the cdma mobile communication base station system, and the result is correct.
Claims (1)
1. one kind based on facsimile modulation/demodulation recommendation FSK modulator approach V.21, at first judge that with the numeric code judging module binary digital signal code element to be modulated that is used to transmit is 0 or 1, if 0, with frequency is that the carrier frequency of 1850Hz is modulated, if 1 is that the carrier wave of 1650Hz is modulated with frequency; It is characterized in that, further comprising the steps of:
1) the sample rate F of this modulator approach is 8000Hz, and digital signal code element transmission rate is 300 bauds, adopts linear interpolation method that sample rate F is carried out interpolation, and making sample rate F is the common multiple of digital signal code element transmission rate and sample rate;
2) with the sample rate after the interpolation divided by digital signal code element transmission rate, obtain the sampled point number M of each digital signal code element, the initial phase place value of binary digital signal code element first to be modulated is made as phase0=0, through phase advance behind M the sampled point of this digital signal code element phase, so current phase place has become phase1=phase0+phase, no matter the next one treats that the modulated digital signal code element is 0 or 1, all treats the initial phase of modulated digital signal code element as the next one with this phase place;
According to said method, all modulation signals for the treatment of are modulated, treat that modulation signal is an initial phase with the phase value of last sampled point of the previous modulated signal that is adjacent for promptly back one; During modulation, the method for employing mould 2 π is limited in the size of phase place within 0～2 π scope.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008102250256A CN101383888B (en) | 2008-10-24 | 2008-10-24 | FSK modulating method based on fax modulation and demodulation proposal V.21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2008102250256A CN101383888B (en) | 2008-10-24 | 2008-10-24 | FSK modulating method based on fax modulation and demodulation proposal V.21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101383888A CN101383888A (en) | 2009-03-11 |
| CN101383888B true CN101383888B (en) | 2010-09-22 |
Family
ID=40463498
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008102250256A Expired - Fee Related CN101383888B (en) | 2008-10-24 | 2008-10-24 | FSK modulating method based on fax modulation and demodulation proposal V.21 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101383888B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115102816B (en) * | 2022-06-16 | 2023-11-03 | 上海道生物联技术有限公司 | FSK-based phase transition method and system for mixed modulation signals |
-
2008
- 2008-10-24 CN CN2008102250256A patent/CN101383888B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| CN101383888A (en) | 2009-03-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR920004132B1 (en) | Packetized ensemble modem | |
| CA2263280C (en) | Method and apparatus for mobile satellite communication | |
| KR100681280B1 (en) | Digital variable symbol rate modulation | |
| CN100490367C (en) | Base station equipment and terminal equipment | |
| US4691342A (en) | Multi-speed, full duplex modem | |
| KR100452789B1 (en) | Pilot signal transmission technique and digital communication system using same | |
| KR20010089721A (en) | Handset time synchronization to a wireless telephone base station | |
| US11245434B2 (en) | Low power long-range radio | |
| US7280593B2 (en) | Method and system for sample and reconstruction synchronization for digital transmission of analog modem signal | |
| US20030031196A1 (en) | Wire communication device, wire communication apparatus, wire communications method, and wire communications system | |
| WO2005112291A1 (en) | Cellular communications system using baseband carrier injection and related methods | |
| CN101383888B (en) | FSK modulating method based on fax modulation and demodulation proposal V.21 | |
| IL142379A0 (en) | Modem relay over packet based network | |
| Aulin et al. | Exact asymptotic behavior of digital FM spectra | |
| CN101404634B (en) | FSK demodulation method based on facsimile modulation/demodulation recommendation | |
| EP1604500A1 (en) | Arrangements and methods for a digital communication system | |
| Brenig | Data transmission for mobile radio | |
| JP2002232384A (en) | Orthogonal frequency division multiplex signal transmitting method and orthogonal frequency division multiplex signal transmitter | |
| US6965608B1 (en) | Method and apparatus for transmitting data in a public network | |
| US20020067772A1 (en) | Method and system for sending information over metal wire | |
| KR970704274A (en) | Communication systems and means of transmission therefor | |
| US4380081A (en) | Digital receiver for four-phase-modulated carrier | |
| JP3451052B2 (en) | Communication system using data signal multiplexing system | |
| JPH0454735A (en) | Modulator-demodulator | |
| CN116170114A (en) | Communication method, device and equipment based on USRP (universal serial bus protocol) ad hoc network |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: BEIJING ZHONGBO SHIXUN TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: BEIJING INDUSTRY UNIVERSITY Effective date: 20131230 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 100124 CHAOYANG, BEIJING TO: 100096 CHANGPING, BEIJING |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20131230 Address after: 100096, Beijing, Changping District science and Technology Park, super Road, No. 3, building 2418, room 9 Patentee after: Beijing Zhongbo Video Technology Co. Ltd. Address before: 100124 Chaoyang District, Beijing Ping Park, No. 100 Patentee before: Beijing University of Technology |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100922 Termination date: 20161024 |