CN101383371B - Image sensor and method for manufacturing same - Google Patents
Image sensor and method for manufacturing same Download PDFInfo
- Publication number
- CN101383371B CN101383371B CN200810215656XA CN200810215656A CN101383371B CN 101383371 B CN101383371 B CN 101383371B CN 200810215656X A CN200810215656X A CN 200810215656XA CN 200810215656 A CN200810215656 A CN 200810215656A CN 101383371 B CN101383371 B CN 101383371B
- Authority
- CN
- China
- Prior art keywords
- transistor
- conductivity type
- electric interface
- substrate
- bonding pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 28
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 238000009792 diffusion process Methods 0.000 claims description 10
- 238000002347 injection Methods 0.000 claims description 7
- 239000007924 injection Substances 0.000 claims description 7
- 238000005468 ion implantation Methods 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 55
- 150000002500 ions Chemical class 0.000 description 16
- 230000003287 optical effect Effects 0.000 description 15
- 239000004065 semiconductor Substances 0.000 description 13
- 230000035945 sensitivity Effects 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 9
- 239000002184 metal Substances 0.000 description 7
- 230000005684 electric field Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000002950 deficient Effects 0.000 description 3
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- 230000000295 complement effect Effects 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- RPAJSBKBKSSMLJ-DFWYDOINSA-N (2s)-2-aminopentanedioic acid;hydrochloride Chemical compound Cl.OC(=O)[C@@H](N)CCC(O)=O RPAJSBKBKSSMLJ-DFWYDOINSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14636—Interconnect structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
- H01L27/14607—Geometry of the photosensitive area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
Abstract
Provided are methods for manufacturing an image sensor. A method for manufacturing an image sensor can include: forming a readout circuitry on a substrate; forming an electrical junction region in the substrate; forming an interconnection connected to the electrical junction region; and forming an image sensing device on the interconnection. The readout circuitry can be formed on a first substrate. The electrical junction region can be formed in the first substrate to electrically connect the image sensing device with the readout circuitry. The image sensing device can be formed using a second substrate that is then bonded on the interconnection.
Description
Technical field
The present invention relates to a kind of imageing sensor and the method that is used to make this imageing sensor.
Background technology [0001]
Imageing sensor is the semiconductor device that is used for optical imagery is converted to the signal of telecommunication.Imageing sensor roughly is classified as charge-coupled device (CCD) imageing sensor or complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor (CIS).
In correlation technique, photodiode utilizes ion to inject, form at substrate with reading circuit.Owing to do not increase chip size in order to increase pixel quantity, the size of photodiode reduces day by day, so the area of light receiving part reduces, thereby has reduced picture quality.
In addition, because stacks as high is not reduced to the same degree of minimizing with the area of light receiving part, the photon numbers that incides light receiving part is also owing to the optical diffraction that is called as Airy disc reduces.
As the possibility that is used to overcome this defective, carried out such trial (being called as " three-dimensional (3D) imageing sensor "): use amorphous silicon (Si) to form photodiode, on silicon (Si) substrate, form reading circuit, and use the method such as water-water bonding on reading circuit, to form photodiode.Photodiode is connected with reading circuit by interconnection device.
Simultaneously, according to correlation technique, owing to be doped with N type impurity at the source electrode and the drain electrode counterpoise of the transfering transistor both sides of reading circuit, therefore electric charge take place share phenomenon.When the generation electric charge was shared phenomenon, the sensitivity of output image reduced, and may produce image error.
Summary of the invention
In addition, in correlation technique, optical charge is not easy to move between photodiode and reading circuit.Therefore, produced dark current or reduced saturation and sensitivity.
Embodiments of the invention provide a kind of imageing sensor and manufacture method thereof, and this imageing sensor can prevent the generation that electric charge is shared, and can improve fill factor, curve factor simultaneously.
Embodiment also provides a kind of imageing sensor and manufacture method thereof, this imageing sensor can by between photodiode and reading circuit for optical charge provides the fast moving path, minimize the dark current source and prevent saturation and the reduction of sensitivity.
In one embodiment, a kind of method that is used for the shop drawings image-position sensor comprises: form reading circuit on first substrate; On first substrate, form electric interface (electrical junction region) so that be electrically connected with reading circuit; On electric interface, form interconnection device; And on interconnection device, form image sensing device.
In another embodiment, a kind of method that is used for the shop drawings image-position sensor comprises: form the reading circuit that comprises the first transistor and transistor seconds on first substrate; Form electric interface in first substrate, between the first transistor and transistor seconds, described electric interface is electrically connected with reading circuit; Formation is electrically connected to the interconnection device in electric interface via transistor seconds; And on described interconnection device, form image sensing device.
The details of one or more embodiment is provided in the drawing and description below.Require from described specification and accompanying drawing and accessory rights, other feature will be tangible.
Description of drawings
Fig. 1 is the viewgraph of cross-section according to the imageing sensor of embodiment;
Fig. 2-the 7th is according to the viewgraph of cross-section of the method that is used for the shop drawings image-position sensor of embodiment;
Fig. 8 is the viewgraph of cross-section according to the imageing sensor of another embodiment;
Fig. 9 is the viewgraph of cross-section according to the imageing sensor of another embodiment.
Embodiment
Hereinafter, describe the embodiment of imageing sensor and manufacture method thereof with reference to the accompanying drawings.
In description to embodiment, should be appreciated that when layer (or a film) be called as another layer or substrate " on " time, this layer (or film) can be directly on another layer or substrate, perhaps also can have the intermediate layer.In addition, should be appreciated that when layer is called as at another layer " below " that can perhaps also can there be one or more intermediate layer in this layer directly below another layer.In addition, it is also understood that when layer be called as two-layer " between " time, this layer can be this sole layer between two-layer, perhaps also can have one or more intermediate layer.
The disclosure is not limited to complementary metal oxide semiconductors (CMOS) (CMOS) imageing sensor, but can easily be applied to any imageing sensor that needs photodiode.
Fig. 1 is the viewgraph of cross-section according to the imageing sensor of embodiment.
In one embodiment, imageing sensor can comprise: the reading circuit 120 that forms on first substrate 100; Electric interface 140 in first substrate, this electricity interface 140 is electrically connected with reading circuit 120; Interconnection device 150 on the electricity interface 140; And the image sensing device on the interconnection device 150 210.
Describe in the still unaccounted Reference numeral manufacture method below among Fig. 1.
Hereinafter, with reference to Fig. 2 to 7 the method that is used for the shop drawings image-position sensor according to embodiment has been described.
Can prepare first substrate 100 that is formed with interconnection device 150 and reading circuit 120 therein.For example, device isolation layer 110 can be formed, so that be limited with the source region in second conductivity type, first substrate 100.Can in active area, form and comprise transistorized reading circuit 120.In one embodiment, reading circuit 120 can comprise transfering transistor Tx121, reset transistor Rx123, driving transistors Dx125 and select transistor Sx127.After forming described transistorized grid, the ion implanted region 130 that can form floating diffusion region FD131 and comprise each transistorized source/drain regions 133,135 and 137.In addition, according to embodiment, can add the noise canceller circuit (not shown) to improve sensitivity.
The formation of reading circuit 120 in first substrate 100 can comprise: in first substrate 100, form electric interface 140, and the first conductivity type bonding pad 147 that is connected with interconnection device 150 on the electric interface 140 of formation.
According to embodiment, device is designed such that between the source electrode of transfering transistor Tx and drain electrode and has electrical potential difference, so that optical charge can be by dump fully.Therefore, the optical charge that produces from photodiode fully is dumped to floating diffusion region, thereby can improve the sensitivity of output image.
In other words, according to embodiment, in being formed with first substrate 100 of reading circuit 120, form electric interface 140 as illustrated in fig. 2, to allow between the source electrode of transfering transistor Tx121 both sides and drain electrode, producing electrical potential difference, so that optical charge can be by dump fully.
Hereinafter, describe optical charge dump structure in detail according to embodiment.
Different with node as the unsteady diffusion FD131 of N+ knot, the positive-negative-positive 140 that is not fully sent to it as electric interface 140 and the voltage that applied when predetermined voltage by pinch off.This voltage is called as pin voltage (pinning voltage), and it depends on the doping content in P0 district 145 and N-district 143.
Particularly, the electronics that produces from photodiode 210 (referring to Fig. 1) moves to positive-negative-positive 140, and is transferred to the node of the diffusion FD131 that floats and is converted into voltage when transfering transistor Tx121 connects.
Because the maximum voltage value of P0/N-/P-knot 140 becomes pin voltage, and the maximum voltage value of the node of the diffusion FD131 that floats becomes the threshold voltage vt h of Vdd-Rx123, therefore, by the electrical potential difference between the both sides that are implemented in transfering transistor Tx131, the electronics that photodiode from chip top 210 produces fully can be dumped to the node of diffusion FD131 that floats, and not have electric charge to share.
In other words, according to embodiment, in first substrate 100, form P0/N-/P-trap knot, apply+voltage and apply ground voltage to the N-district 143 of this P0/N-/P-trap knot in 4-Tr CMOS active pixel sensor (APS) operating period of resetting allowing to P0145 and P-trap 141, so that when predetermined voltage or predetermined voltage are above, produce pinch off, as in bipolar junction transistor (BJT) structure at this P0/N-/P-trap binode place.This predetermined voltage is called as pin voltage.Therefore, produced electrical potential difference between the source electrode of transfering transistor Tx121 both sides and drain electrode, this electrical potential difference has prevented to share phenomenon at the electric charge of on/off operating period of transfering transistor Tx.
Therefore, with in the correlation technique photodiode is different with the situation that N+ knot (N+/P-trap) is connected simply, such as saturation reduce and the sensitivity reduction defective can be avoided.
Next,, can between photodiode and reading circuit, form the first conductivity type bonding pad 147, so that the fast moving path of optical charge to be provided, thereby minimize dark current, and can prevent that saturation from reducing and the sensitivity reduction according to an embodiment.
For this purpose, can on tying 140 surface, P0/N-/P-be formed for the first conductivity type bonding pad 147 of ohmic contact.N+ district 147 can be formed to be passed P0 district 145 and contacts N-district 143.
Simultaneously, become source of leaks, can minimize the width of the first conductivity type bonding pad 147 in order to prevent the first conductivity type bonding pad 147.For this purpose, in one embodiment, can be in etching be used for carrying out connector after the through hole of the first Metal Contact 151a and inject.In another embodiment, can on substrate, form ion and inject the pattern (not shown), can use this ion to inject pattern then and form the first conductivity type bonding pad 147 as ion implantation mask.
In other words, only use N type impurity to carry out local heavily doped reason in this embodiment and be to form, minimize dark signal simultaneously in order to help ohmic contact to contact formation part.Whole transfering transistor source electrode is being carried out under the heavily doped situation, and dark signal may increase via Si surface unsaturated bond.
Interlayer dielectric 160 can be on first substrate 100, formed, and interconnection device 150 can be formed.Interconnection device 150 can include, but is not limited to the first Metal Contact 151a, first metal 151, second metal 152, the 3rd metal 153 and the 4th Metal Contact 154a.
As shown in Figure 3, can on second substrate 200, form crystalline semiconductor layer 210a.Although photodiode 210 is described to be formed in this crystalline semiconductor layer, embodiment is not limited to this.Therefore, image sensing device can adopt three-dimensional (3D) image sensor architecture that is positioned on the reading circuit, to improve fill factor, curve factor.In addition, by being formed on crystalline semiconductor layer inside, the defective in the image sensing device can be reduced.
For example, can utilize epitaxial growth and on second substrate 200, form crystalline semiconductor layer 210a.Then, can between second substrate 200 and crystalline semiconductor layer 210a, inject hydrogen ion, to form hydrogen ion implantation layer 207a.In one embodiment, can after injecting, the ion that is used to form photodiode 210 carry out described hydrionic injection.
Next, with reference to Fig. 4, can utilize ion to be infused in and form photodiode 210 among the crystalline semiconductor layer 210a.For example, can in the bottom of crystalline semiconductor layer 210a, form the second conductivity type conductive layer 216.For example, can inject formation high concentration P-type conduction layer 216 in the bottom of crystalline semiconductor layer 210a by on the whole surface of second substrate 200 of no mask, carrying out blanket formula ion.In one embodiment, the second conductivity type conductive layer 216 can be formed the junction depth that has less than 0.5 μ m.
Then, can on the second conductivity type conductive layer 216, form the first conductivity type conductive layer 214.For example, can inject formation low concentration N type conductive layer 214 on the second conductivity type conductive layer 216 by on the whole surface of second substrate 200 of no mask, carrying out blanket formula ion.In one embodiment, the first conductivity type conductive layer 214 can be formed the junction depth with 1.0～2.0 μ m.
According to embodiment, be thicker than the second conductivity type conductive layer 216 owing to the first conductivity type conductive layer 214 is formed, so charge storage capacity can improve.Be thicker than high concentration P-type conduction layer 216 by N type conductive layer 214 is formed, the charge storage region of the expansion that charge storage capacity can be caused owing to thicker N type conductive layer 214 improves.
In another embodiment, can on the first conductivity type conductive layer 214, form high concentration first conduction type conductive layer 212.For example, can inject formation high concentration N+ type conductive layer 212 on the first conductivity type conductive layer 214 by on the whole surface of second substrate 200 of no mask, carrying out blanket formula ion.This high concentration first conduction type conductive layer 212 can help the ohmic contact between the interconnection device 150 of the photodiode 210 and first substrate 100.
Next,, first substrate 100 can be engaged with second substrate 200, so that photodiode 210 contact interconnection devices 150 with reference to Fig. 5.Here, before first substrate 100 and second substrate 200 were bonded with each other, the surface energy that can increase the surface that will engage by the activation via plasma was carried out described joint.Simultaneously, in a particular embodiment, can use the dielectric or the metal level that are arranged on the joint interface to carry out described joint, to improve engaging force.
After first substrate 100 and second substrate 200 are bonded with each other, can hydrogen ion implantation layer 207a be changed over the geocorona (not shown) by carrying out heat treatment.Photodiode 210 then, can use blade to remove the part of second substrate 200, and photodiode 210 is stayed the geocorona below, so that can expose as illustrated in fig. 6.
Then, can carry out the etching of separated light electric diode at each unit picture element.In one embodiment, can fill etched part with dielectric (not shown) between pixel.
Next, with reference to Fig. 7, can carry out the technology that is used to form upper electrode 240 and filter (not shown).
In imageing sensor and manufacture method thereof according to embodiment, device is designed such that between the source electrode of transfering transistor Tx and drain electrode and has electrical potential difference, so that optical charge can be by dump fully.
In addition, according to embodiment, form the electric charge bonding pad between photodiode and reading circuit, so that the fast moving path of optical charge to be provided, thereby the dark current source is minimized, and can prevent that saturation from reducing and the sensitivity reduction.
Fig. 8 is the viewgraph of cross-section according to the imageing sensor of another embodiment, and shows in detail first substrate that comprises interconnection device 150.
As shown in Figure 8, imageing sensor can comprise: the reading circuit 120 that forms on first substrate 100; Electric interface 140 in first substrate, this electricity interface 140 is electrically connected with reading circuit 120; The interconnection device 150 that is electrically connected with electric interface 140; And the image sensing device on interconnection device 150 210.
Present embodiment can adopt the technical characterictic with reference to the described embodiment of Fig. 1-7.
For example, device can be designed such that between the source electrode of transfering transistor Tx and drain electrode and have electrical potential difference, so that optical charge can be by dump fully.
In addition,, between photodiode and reading circuit, form the electric charge bonding pad, so that the fast moving path of optical charge to be provided, thereby the dark current source is minimized, and can prevents that saturation from reducing and the sensitivity reduction according to embodiment.
Simultaneously, different with the described embodiment of reference Fig. 1, the first conductivity type bonding pad 148 is formed on a side in electric interface 140.
According to embodiment, the N+ bonding pad 148 that is used for ohmic contact can be formed contiguous P0/N-/P-knot 140.Here, because device is operated under the reverse biased that puts on P0/N-/P-knot 140, therefore forms N+ bonding pad 148 contacts 151a with M1C technology source of leaks may be provided, thereby may on the Si surface, produce electric field EF.Contact in electric field forms the crystal defect that produces during the technology and has served as source of leaks.
In addition, be formed in N+ bonding pad 148 under the lip-deep situation of P0/N-/P-knot 140, increased owing to N+/P0 knot 148/145 electric field that causes.This electric field has also served as source of leaks.
Therefore, do not provide being doped with the P0 layer but being doped with and formed the layout that wherein is formed with the first contact plunger 151a in the active area of N+ bonding pad 148.Then, be connected with N-knot 143 via N+ bonding pad 148, the first contact plunger 151a.
According to embodiment, on the Si surface, do not produce electric field.Therefore, can reduce the dark current of the integrated CIS of 3D.
Fig. 9 is the viewgraph of cross-section according to the imageing sensor of another embodiment, and shows in detail first substrate that comprises interconnection device 150.
As shown in Figure 9, this imageing sensor comprises: the reading circuit 120 that comprises the first transistor 121a and transistor seconds 121b on first substrate 100; Electric interface 140 in first substrate 100, between the first transistor 121a and transistor seconds 121b, described electric interface 140 is electrically connected with reading circuit 120; Be electrically connected to the interconnection device 150 in electric interface 140; And the image sensing device on interconnection device 150 210.
Present embodiment can adopt the technical characterictic of the foregoing description.
For example, according to embodiment, device can be designed such that between the source electrode of transfering transistor Tx and drain electrode and have electrical potential difference, so that optical charge can be by dump fully.
In addition,, between photodiode and reading circuit, form the electric charge bonding pad, so that the fast moving path of optical charge to be provided, thereby the dark current source is minimized, and can prevents that saturation from reducing and the sensitivity reduction according to embodiment.
Simultaneously, according to present embodiment, the formation of the reading circuit 120 on first substrate 100 has been described in more detail.
The first transistor 121a and transistor seconds 121b can be formed on first substrate 100.For example, the first transistor 121a and transistor seconds 121b can be respectively (but being not limited to) the first transfering transistor 121a and the second transfering transistor 121b.The first transistor 121a and transistor seconds 121b can side by side or sequentially be formed.
Then, can between the first transistor 121a and transistor seconds 121b, form electric interface 140.In one embodiment, electric interface 140 can be a PN junction 140.
For example, the PN junction 140 according to embodiment can comprise: first conduction type ion implanted layer 143 that forms on the second conductivity type epitaxial loayer (or trap) 141 and the second conduction type ion implanted layer 145 that forms on the first conduction type ion implanted layer 143.
In a particular embodiment, PN junction 140 can be P0 (145)/N-(143)/P-(141) knot as shown in Figure 2.
Can form the high concentration first conduction type bonding pad 131b that is connected with interconnection device 150 in the side of transistor seconds 121b.This high concentration first conduction type bonding pad 131b can be high concentration N+ ion implanted region (a N+ knot), and can be used as (but being not limited to) second floating diffusion region FD2 (131b).
Reading circuit according to embodiment comprises: be used for the electronics that the photodiode from chip top produces is moved to the part that this reading circuit is formed at the N+ knot 131b of Si substrate wherein; And the part that is used for the electronics that N+ ties 131b is moved to N-knot 143, thereby can realize the 4Tr operation.
Provided the reason that forms P0/N-/P-knot 140 and N+ knot 131b as illustrated in fig. 9 discretely below.
When forming the N+ doping and contacting in the positive-negative-positive 140 of P0/N-/P-knot 140, dark current can and produce by N+ layer on the positive-negative-positive 140 and contact etch infringement.In order to reduce this dark current, the N+ knot 131b that forms part as contact can separate with positive-negative-positive 140.
In other words, when on the surface of positive-negative-positive 140, carrying out N+ doping and contact etch, may form source of leaks.In order to prevent the formation of these source of leaks, can on N+/P-epitaxy junction 131b, form contact.
Because during the signal read operation, the grid of the grid of transistor seconds Tx2 (121b) and the first transistor Tx1 (121a) is switched on, therefore, the electronics that produces from the photodiode 210 on chip top transmits via P0/N-/P-epitaxy junction 140 from the first conductivity type bonding pad 131b, and move to the first floating diffusion region FD1 (131a), thereby two samplings that can realize being correlated with.
Any quoting to " embodiment ", " embodiment ", " example embodiment " or the like in this specification means that special characteristic, structure or the characteristic described in conjunction with this embodiment are included among at least one embodiment of the present invention.This wording everywhere appearance in this manual might not all refer to same embodiment.In addition, when having described special characteristic, structure or characteristic, think and realize that in conjunction with other embodiment this feature, structure or characteristic are within those skilled in the art's the limit of power in conjunction with any embodiment.
Although described embodiment with reference to the various exemplary execution mode of embodiment,, should be appreciated that those skilled in the art can expect falling into a large amount of other modification and the execution modes within the spirit and scope of principle of the present disclosure.More specifically, can within the scope of the disclosure, accompanying drawing and appended claim, carry out variations and modifications to part and/or layout that subject combination is arranged.Except the variation and modification of part and/or layout, the purposes that substitutes also will be tangible for a person skilled in the art.
Claims (18)
1. imageing sensor comprises:
The reading circuit that comprises the first transistor and transistor seconds on first substrate;
Electric interface in first substrate, between described the first transistor and described transistor seconds, described electric interface is electrically connected with described reading circuit;
Be used to be connected to the interconnection device in described electric interface; And
Image sensing device on described interconnection device.
2. imageing sensor according to claim 1, also be included in first conductivity type, second bonding pad of a side of described transistor seconds, described first conductivity type second bonding pad is connected with described interconnection device, wherein when described transistor seconds is switched on, be delivered to described electric interface from described first conductivity type second bonding pad from the signal of described interconnection device.
3. imageing sensor according to claim 1, wherein said electric interface comprises:
The first conduction type ion injection region in described first substrate; And
The second conduction type ion injection region on the described first conduction type ion injection region.
4. imageing sensor according to claim 1, wherein said electric interface provide described reading circuit the first transistor source electrode and the drain electrode between electrical potential difference.
5. imageing sensor according to claim 4, wherein said the first transistor comprises first transfering transistor, and described transistor seconds comprises second transfering transistor, and the ion implantation concentration in the described electric interface at the source electrode place of described the first transistor is lower than the ion implantation concentration at the floating diffusion region of drain electrode place of described the first transistor.
6. imageing sensor according to claim 1, wherein said electric interface comprises PN junction.
7. imageing sensor according to claim 1, wherein said electric interface comprises positive-negative-positive.
8. imageing sensor according to claim 1 also comprises the first conductivity type bonding pad that is connected with described interconnection device, and the wherein said first conductivity type bonding pad is formed on a side of described transistor seconds.
9. imageing sensor according to claim 1, wherein said image sensing device comprises:
The first conductivity type conductive layer; And
The second conductivity type conductive layer on the described first conductivity type conductive layer.
10. method that is used for the shop drawings image-position sensor comprises:
On first substrate, form the reading circuit that comprises the first transistor and transistor seconds;
In first substrate, between described the first transistor and described transistor seconds, form the electricity knot
The district, described electric interface is electrically connected with described reading circuit;
Be formed for being connected to the interconnection device in described electric interface; And
On described interconnection device, form image sensing device.
11. method according to claim 10, a side that also is included in described transistor seconds forms first conductivity type, second bonding pad, described first conductivity type second bonding pad is connected with described interconnection device, wherein when described transistor seconds is switched on, be delivered to described electric interface from described first conductivity type second bonding pad from the signal of described interconnection device.
12. method according to claim 10 wherein forms described electric interface and comprises:
In described first substrate, form the first conduction type ion injection region; And
On the described first conduction type ion injection region, form the second conduction type ion injection region.
13. method according to claim 10, wherein said electric interface be formed make described reading circuit the first transistor source electrode and the drain electrode between have electrical potential difference.
14. method according to claim 13, wherein said the first transistor comprises first transfering transistor, and described transistor seconds comprises second transfering transistor, and the ion implantation concentration in the described electric interface at the source electrode place of described the first transistor is lower than the ion implantation concentration at the floating diffusion region of drain electrode place of described the first transistor.
15. method according to claim 10, wherein said electric interface comprises PN junction.
16. method according to claim 10 comprises also forming the first conductivity type bonding pad that is connected with described interconnection device that the wherein said first conductivity type bonding pad is formed on a side of described transistor seconds.
17. method according to claim 10 wherein forms described image sensing device and comprises:
Form the first conductivity type conductive layer; And
On the described first conductivity type conductive layer, form the second conductivity type conductive layer.
18. method according to claim 10 wherein forms described image sensing device and comprises: second substrate that will comprise described image sensing device joins described first substrate to.
Applications Claiming Priority (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR20070090293 | 2007-09-06 | ||
| KR1020070090293 | 2007-09-06 | ||
| KR10-2007-0090293 | 2007-09-06 | ||
| KR20070091083 | 2007-09-07 | ||
| KR10-2007-0091083 | 2007-09-07 | ||
| KR1020070091083 | 2007-09-07 | ||
| KR10-2008-0065719 | 2008-07-07 | ||
| KR1020080065719 | 2008-07-07 | ||
| KR1020080065719A KR100898472B1 (en) | 2007-09-07 | 2008-07-07 | Method for Manufacturing Image Sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101383371A CN101383371A (en) | 2009-03-11 |
| CN101383371B true CN101383371B (en) | 2011-03-16 |
Family
ID=40463081
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008102138129A Expired - Fee Related CN101383360B (en) | 2007-09-06 | 2008-09-08 | Image sensor and method for manufacturing same |
| CN200810215656XA Expired - Fee Related CN101383371B (en) | 2007-09-06 | 2008-09-08 | Image sensor and method for manufacturing same |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2008102138129A Expired - Fee Related CN101383360B (en) | 2007-09-06 | 2008-09-08 | Image sensor and method for manufacturing same |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR100898473B1 (en) |
| CN (2) | CN101383360B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101087933B1 (en) * | 2008-09-30 | 2011-11-30 | 주식회사 동부하이텍 | Image Sensor and Method for Manufacturing thereof |
| JP2012124318A (en) * | 2010-12-08 | 2012-06-28 | Sony Corp | Method of manufacturing solid state imaging device, solid state image sensor, and electronic apparatus |
| CN109979930B (en) * | 2017-12-28 | 2020-12-04 | 南京大学 | 2X 2 array layout based on composite dielectric grid photosensitive detector and working method |
| CN109830563B (en) * | 2019-02-26 | 2022-07-19 | 京东方科技集团股份有限公司 | Detection panel and manufacturing method thereof |
| CN114339087A (en) * | 2020-09-30 | 2022-04-12 | 思特威(上海)电子科技股份有限公司 | TOF image sensor pixel structure and ranging system |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6730900B2 (en) * | 2002-02-05 | 2004-05-04 | E-Phocus, Inc. | Camera with MOS or CMOS sensor array |
| JP3641260B2 (en) * | 2002-09-26 | 2005-04-20 | 株式会社東芝 | Solid-state imaging device |
| KR100889365B1 (en) * | 2004-06-11 | 2009-03-19 | 이상윤 | 3-dimensional solid-state image sensor and method of making the same |
| KR100606934B1 (en) * | 2004-07-05 | 2006-08-01 | 동부일렉트로닉스 주식회사 | Method of fabricating a CMOS image sensor |
| KR100718878B1 (en) * | 2005-06-28 | 2007-05-17 | (주)실리콘화일 | Separation type unit pixel of image sensor having 3 dimension structure and manufacture method thereof |
| KR100714484B1 (en) * | 2005-08-12 | 2007-05-04 | 삼성전자주식회사 | Image sensor and method for fabricating the same |
-
2008
- 2008-07-07 KR KR1020080065718A patent/KR100898473B1/en not_active IP Right Cessation
- 2008-09-08 CN CN2008102138129A patent/CN101383360B/en not_active Expired - Fee Related
- 2008-09-08 CN CN200810215656XA patent/CN101383371B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR100898473B1 (en) | 2009-05-21 |
| CN101383360A (en) | 2009-03-11 |
| CN101383371A (en) | 2009-03-11 |
| CN101383360B (en) | 2011-02-16 |
| KR20090026032A (en) | 2009-03-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101383368B (en) | Image sensor and method for manufacturing same | |
| CN101388360B (en) | Image sensor and method for manufacturing the same | |
| CN101383371B (en) | Image sensor and method for manufacturing same | |
| CN101471361B (en) | Image sensor and method for manufacturing the sensor | |
| KR101016545B1 (en) | Image Sensor and Method for Manufacturing thereof | |
| CN101471353B (en) | Image sensor and method for manufacturing the sensor | |
| JP2009065156A (en) | Method of manufacturing image sensor | |
| CN101471362A (en) | Image sensor and method for manufacturing the sensor | |
| CN101715076A (en) | Image sensor and method for manufacturing thereof | |
| US8222587B2 (en) | Image sensor and method for manufacturing the same | |
| CN101471367B (en) | Image sensor and method for manufacturing the sensor | |
| CN101729795A (en) | Image sensor and method for manufacturing thereof | |
| CN101715083A (en) | Image sensor and manufacturing method of image sensor | |
| CN101715082A (en) | Image sensor and manufacturing method thereof | |
| CN101729804A (en) | Image sensor and method for manufacturing thereof | |
| CN101728325A (en) | Method for manufacturing image sensor | |
| CN101715074A (en) | Image sensor and method for manufacturing thereof | |
| KR20100080149A (en) | Method for manufacturing an image sensor | |
| CN101715080A (en) | Image sensor and method for manufacturing thereof | |
| CN101383369B (en) | Image sensor and method for manufacturing same | |
| KR100898472B1 (en) | Method for Manufacturing Image Sensor | |
| CN101640208A (en) | Image sensor and method for manufacturing the same | |
| CN101471373B (en) | Image sensor and method for manufacturing the sensor | |
| KR101038886B1 (en) | Image Sensor and Method for Manufacturing thereof | |
| CN101383363B (en) | Image sensor and method for manufacturing same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110316 Termination date: 20130908 |