CN101373709A - Method for preparing non-crack nitride semiconductor substrate - Google Patents

Method for preparing non-crack nitride semiconductor substrate Download PDF

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Publication number
CN101373709A
CN101373709A CNA2008101676209A CN200810167620A CN101373709A CN 101373709 A CN101373709 A CN 101373709A CN A2008101676209 A CNA2008101676209 A CN A2008101676209A CN 200810167620 A CN200810167620 A CN 200810167620A CN 101373709 A CN101373709 A CN 101373709A
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China
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nitride
semiconductor substrate
layer
crack
nitride semiconductor
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徐永宽
于祥潞
程红娟
杨巍
赖占平
严如岳
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CETC 46 Research Institute
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CETC 46 Research Institute
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Abstract

The invention disclose a method for preparing a non-split nitride semiconductor substrate. By adopting the method, the dislocation density of a nitride substrate can be effectively reduced, and the problem that the polishing speed of the surface of the nitride substrate is not uniform is solved. The method comprises the following steps: step 1, nitride with pit-shaped surface grows on a foreign substrate by adopting the HVPE method and controlling the process conditions; step 2, the nitride layer with the pit-shaped surface is taken out of an HVPE reaction furnace, an insertion layer is added on the nitride layer, and the insertion layer is transition metal or the alloy of the transition metal; step 3, the extension piece of the nitride with the insertion layer is placed in the HVPE reaction furnace for annealing treatment at the high temperature; step 4, a nitride with smooth surface grows on the insertion layer after the annealing treatment by adopting the HVPE method and controlling the processing condition; and step 5, the growth is completed, the temperature is reduced, and the insertion layer splits, so as to obtain the nitride semiconductor substrate.

Description

A kind of method for preparing the non-crack nitride semiconductor substrate
Technical field
The invention belongs to the nitride-based semiconductor technical field, relate in particular to a kind of method for preparing the non-crack nitride semiconductor substrate.
Background technology
It with GaN the direct band gap that the GaN based nitride semiconductor of representative has (comprising GaN, AlGaN, InGaN etc.) broad, also have characteristics such as puncture voltage height, saturated electrons drift speed height, chemistry and Heat stability is good simultaneously, thereby its aspect such as semiconductor device of working is with a wide range of applications under adverse circumstances such as indigo plant, green glow and ultraviolet light-emitting diode, laser diode, ultraviolet detector and high temperature, high frequency, high power.Wherein studying more GaN base device with major application prospect has: GaN base LED, LD, ultraviolet detector, HEMT etc.
Restriction at present comprises that the nitride-based semiconductor performance of GaN base device and the key issue that reliability improves are to lack suitable backing material.The fusing point of nitride-based semiconductor is high, and the equilibrium vapour pressure when reaching its fusing point is high, so growing nitride single crystal is very difficult.Up to the present, preparing the most ripe method of nitride single-crystal substrate is HVPE method (Hydride Vapor Phase Epitaxy, hydride vapour phase epitaxy method), this method is that growth thickness surpasses 200 microns nitride single epitaxial on foreign substrate, then foreign substrate is removed, thereby obtained nitride-based semiconductor self-supporting substrate.But grow on foreign substrate, the nitride single-crystal dislocation density that obtains is bigger, and causes defectives such as lattice mismatch and coefficient of thermal expansion mismatch easily, thereby causes crackle even wafer breakage.In order to reduce dislocation density, obtain the more intact nitride of wafer, (see U.S. Pat 7 for details in the prior art, 323,256B2) provide following solution: the growth of HVPE method was divided into for two steps, at first under the condition of long hole, grows, there are a lot of holes on the Grown GaN surface under this condition, and then grow filling out under the condition of hole, under this condition the hole of back growth is filled and led up, obtain the surface in smooth nothing hole.Grow under the growth conditions of long hole, dislocation was concentrated to the end, hole, and the dislocation density of part between hole and the hole is reduced greatly.But in this solution, the dislocation in the hole can be extended to growing surface in filling out the hole process, when GaN being carried out chemical machinery (CMP) polishing, is filled out the position in hole and the polishing speed of other positions and has difference simultaneously.We found through experiments, adopt above method growing gallium nitride substrate, when Grown GaN thickness surpasses 200 μ m, thermal stress still can cause the wafer cracking when cooling, and also very easily causes cracking in the process at the bottom of with mechanical lapping or laser-stripping method peeling liner.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of method for preparing the non-crack nitride semiconductor substrate, adopts this method can effectively reduce the dislocation density of nitride, obtains more intact non-crack nitride semiconductor substrate.
For solving the problems of the technologies described above, the inventive method comprises the steps:
Step 1, adopt the HVPE method, and have the nitride of cheating the shape surface by the control process conditions one deck of on foreign substrate, grow;
Step 2, add insert layer on described nitride layer with shape surface, hole, this insert layer is transition metal or its alloy;
Step 3, the nitride epitaxial sheet that has described insert layer is carried out The high temperature anneal;
Step 4, employing HVPE method, and by controlling process conditions at the nitride that has smooth surface through continued growth one deck on the insert layer of described annealing in process;
Step 5, carry out corresponding subsequent treatment, thereby obtain the nitride-based semiconductor substrate.
The described nitride layer thickness with shape surface, hole of step 1 can be 2 μ m~100 μ m.
The operation of the described adding insert layer of step 2 can be that described nitride layer with shape surface, hole is taken out from the hvpe reactor device, and outside this hvpe reactor device, carry out.
The method of the described adding insert layer of step 2 can be magnetron sputtering method, and described insert layer material can be Titanium.
The described annealing in process of step 3 can be carried out in the hvpe reactor device.
The described nitride layer thickness with smooth surface of step 4 can be at least 200 μ m.
The described subsequent treatment of step 5 for described have the nitride layer growth ending of smooth surface after, the processing of lowering the temperature.Then thermal stress is broken the insert layer place, thereby obtains self-supporting nitride-based semiconductor substrate, promptly has the nitride layer of smooth surface.
Beneficial effect of the present invention is:
The present invention prepares on the basis of nitride in existing two-step method, increased the step that adds insert layer and insert layer is carried out high annealing, not only further reduced dislocation density, alleviated the effect of stress to nitride, lower the temperature after having solved growth ending, and nitride self-supporting substrate wafer problem easy to crack when peeling off, and efficiently solve the uneven problem of nitride substrate wafers surface finish speed.
Description of drawings
Fig. 1 is that preparation does not have the schematic flow sheet that splits gallium nitride self-supporting substrate.
Embodiment
Below in conjunction with accompanying drawing, and be that example is described in further detail the present invention with preparation gallium nitride self-supporting substrate.
Fig. 1 prepares does not have the schematic flow sheet that splits gallium nitride self-supporting substrate, and 101 is foreign substrate among the figure, and 102 is hole shape surface Ga N layer, and 103 is insert layer, and 104 for there not being hole GaN layer, and 105 is the self-supporting substrate that obtains after peeling off.
According to existing experience, more easily realize the growth of smooth surface GaN under the hot conditions, low temperature is more easily realized hole shape surface Ga N growth; Low growth rate more easily realizes the growth of smooth surface GaN, and high growth rates is more easily realized the growth of hole shape surface Ga N; Low V/III more easily realizes the growth of smooth surface GaN than (NH3/HCl flow-rate ratio), and high V/III more easily realizes cheating the growth of shape surface Ga N.And shape surface, hole is not prone to crackle.Because adopting process equipment difference, the required process conditions of nitride with certain surface state that realize growing are not quite similar, but above rule all is suitable for.
As shown in Figure 1, the inventive method specifically comprises the steps:
Steps A, at first departing under the condition of optimizing growth, cheating the gallium nitride layer 102 on shape surface, thickness 2 μ m with the HVPE method one deck of on foreign substrate 101, grow -100 μ m;
Step B, the GaN epitaxial wafer that will cheat the shape surface take out, and add insert layer 103.Specifically can adopt magnetron sputtering, vacuum evaporation, electron beam evaporation, plating, these methods of chemical vapour deposition (CVD), and the insert layer material can be metal or alloy such as Ti, W, Ni, Ta, Co, Cr, Au, Pt;
Step C, the GaN epitaxial wafer that will have an insert layer 103 are put into HVPE equipment, high annealing, because lattice mismatch and capillary effect, insert layer 103 is concentrated in the hole, occurs the slit in the hole with the hole gap location, spills part GaN surface;
Step D, optimizing the smooth gallium nitride 104 of growth layer of surface under the growth conditions then, GaN begins growth from the slit of insert layer, by cross growth whole insert layer 103 is covered, and the continued growth certain thickness, the above thickness of 200 μ m of generally will growing.Like this because cross growth, the a lot of dislocations that concentrate in the hole can not be penetrated in the described ganoid gallium nitride layer 104, greatly reduce the dislocation density of not having in the gallium nitride layer 104 of hole, and the hole is not filled by the GaN of subsequent growth in the present embodiment, but will cheat filling by the insert layer material, the effect that the hole still has relieve stresses, therefore, the nothing hole gallium nitride layer 104 that obtains is difficult for breaking.Also therefore the nitride wafers surface of subsequent growth no longer includes the uneven problem of polishing speed.
Lower the temperature behind step e, the growth ending, the different thermal stress that cause with the GaN thermal coefficient of expansion of foreign substrate 101 are concentrated at insert layer 103 places, and generation is broken, thereby realized not having separating of hole GaN layer 104 and following hole shape surface Ga N layer 102 and foreign substrate 101, obtained not having nothing hole GaN layer 104 part after splitting low dislocation GaN self-supporting substrate and promptly separating.
Below by a concrete example the inventive method process engineering is described further, in this embodiment, the inventive method specifically comprises the steps:
1, a surface sapphire polished silicon wafer substrate is put into the hvpe reactor stove, be warmed up to 1000 ℃, begin to cheat the growth of shape surface Ga N.Control V/III (flow-rate ratio of NH3 and HCl) is 50, and the HCl flow is made as 100sccm, grows 20 minutes, obtains the hole shape surface Ga N that thickness is about 50 μ m;
2, the wafer with growth takes out, and utilizes magnetron sputtering, plating layer of metal Ti on the shape GaN of hole, the about 200nm of thickness.
3, wafer is put into the HVPE stove again, be warmed up to 1020~1080 ℃ and carry out high annealing, annealing time is controlled at 30~120min.
4, adopt the GaN layer of optimized conditions continued growth smooth surface then.Growth temperature is controlled at 1050 ℃, and the V/III ratio is 15, and the HCl flow is 50sccm, grows the about 400 μ m of GaN thickness of the smooth surface that growth obtains 4 hours.
5, lower the temperature behind the growth ending, foreign substrate and hole shape surface Ga N layer are peeled off automatically because of thermal stress, if foreign substrate and hole shape surface Ga N layer are not peeled off from smooth surface GaN layer fully, then need to take corresponding measure, thereby obtain the GaN layer that self-supporting GaN single crystalline substrate is a smooth surface so that it is peeled off fully.
Above-described specific embodiment, purpose of the present invention, technical scheme and beneficial effect are further described, institute it should be noted, the above only is specific embodiments of the invention, and those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope of the present invention.Like this, if of the present invention these are revised and modification belongs within the scope of the technical scheme of claim record of the present invention and equivalent technologies thereof, then the present invention also is intended to comprise these changes and modification interior.

Claims (8)

1. a method for preparing the non-crack nitride semiconductor substrate is characterized in that comprising the steps:
Step 1, adopt the HVPE method, and have the nitride of cheating the shape surface by the control process conditions one deck of on foreign substrate, grow;
Step 2, add insert layer on described nitride layer with shape surface, hole, this insert layer is transition metal or its alloy;
Step 3, the nitride epitaxial sheet that has described insert layer is carried out The high temperature anneal;
Step 4, employing HVPE method, and by controlling process conditions at the nitride that has smooth surface through continued growth one deck on the insert layer of described annealing in process;
Step 5, carry out corresponding subsequent treatment, thereby obtain the nitride-based semiconductor substrate.
2. the method for preparing the non-crack nitride semiconductor substrate according to claim 1 is characterized in that:
The described nitride layer thickness with shape surface, hole of step 1 is 2 μ m~100 μ m.
3. the method for preparing the non-crack nitride semiconductor substrate according to claim 1 is characterized in that:
The operation of the described adding insert layer of step 2 is that described nitride layer with shape surface, hole is taken out from the hvpe reactor device, and outside this hvpe reactor device, carry out.
4. the method for preparing the non-crack nitride semiconductor substrate according to claim 3 is characterized in that:
The method of described adding insert layer is a magnetron sputtering method.
5. according to claim 3 or the 4 described methods that prepare the non-crack nitride semiconductor substrate, it is characterized in that:
Described insert layer material is a Titanium.
6. according to claim 1 or the 3 described methods that prepare the non-crack nitride semiconductor substrate, it is characterized in that:
The described annealing in process of step 3 is carried out in the hvpe reactor device.
7. the method for preparing the non-crack nitride semiconductor substrate according to claim 1 and 2 is characterized in that:
The described nitride layer thickness with smooth surface of step 4 is at least 200 μ m.
8. according to claim 1 or the 3 described methods that prepare the non-crack nitride semiconductor substrate, it is characterized in that:
The described subsequent treatment of step 5 is for lowering the temperature after having the nitride layer growth ending of smooth surface described.
CNA2008101676209A 2008-10-21 2008-10-21 Method for preparing non-crack nitride semiconductor substrate Pending CN101373709A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111435694A (en) * 2019-01-14 2020-07-21 中国科学院物理研究所 GaN epitaxial wafer and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111435694A (en) * 2019-01-14 2020-07-21 中国科学院物理研究所 GaN epitaxial wafer and preparation method thereof

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