CN101373128A - Intelligent control circuit with cipher timing detonator - Google Patents

Intelligent control circuit with cipher timing detonator Download PDF

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Publication number
CN101373128A
CN101373128A CNA2008101560378A CN200810156037A CN101373128A CN 101373128 A CN101373128 A CN 101373128A CN A2008101560378 A CNA2008101560378 A CN A2008101560378A CN 200810156037 A CN200810156037 A CN 200810156037A CN 101373128 A CN101373128 A CN 101373128A
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China
Prior art keywords
cpu
circuit
control circuit
resistance
voltage
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CNA2008101560378A
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Chinese (zh)
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CN101373128B (en
Inventor
张鑫浩
王维
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DANYANG HONGYE FUTIAN FISHING Co Ltd
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DANYANG HONGYE FUTIAN FISHING Co Ltd
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Publication of CN101373128A publication Critical patent/CN101373128A/en
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Publication of CN101373128B publication Critical patent/CN101373128B/en
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Abstract

The invention relates to an intelligent password timing blaster control circuit which comprises a double CPU control circuit, a hardware watchdog reset circuit, a charge control circuit, a percussion control circuit, and the like. The double CPU control circuit comprises two CPUs, which are communicated with each other through a serial interface. The hardware watchdog reset circuit, a high voltage sampling circuit, a battery power measurement circuit and a datum voltage generation circuit are connected with the first CPU; and a control terminal of the charge control circuit is connected with the first CPU, and a charge control terminal thereof is connected with the second CPU. The percussion control circuit comprises a percussion machine connected with the first CPU. The invention improves the reliability of the circuit through the respective controls of the two CPUs. When either CPU can not work normally, blasting can not be conducted, thereby achieving high reliability and high safety. The battery power, the charge voltage and the datum voltage can be accurately measured. When any link can not meet the requirements, the blasting can not be conducted, thereby preventing the occurrence of mis-explosion.

Description

Intelligent control circuit with cipher timing detonator
Technical field
The present invention relates to the control circuit of the initiator used in a kind of fried masonry industry, specifically relate to a kind of reliability height, can intelligence intelligent control circuit with cipher timing detonator regularly.
Background technology
All Nonel detonator to be used in mining, cut into a mountain fried stone and other construction project, be mostly at present to adopt the fuse cord detonation mode, but this mode very long fuse cord need be arranged that the expense of at every turn detonating is higher, and retractable cable is cumbersome.Simultaneously, this kind mode is also dangerous.The present domestic detonator detonates mode of wideling popularize comparison safety, but present initiator can accurately be not regularly, and when initiator or other parts occur when unexpected, detonator can not detonate.Can not determine whether detonator can also detonate this moment, therefore for a long time can not be near checking, and this time-delay detonating for a long time is easy to cause casualties the also common all spaces in a newspaper of this type of incident.
Summary of the invention
For solving the deficiencies in the prior art, the object of the present invention is to provide a kind of reliability height, can realize intelligent time-controlled intelligent control circuit with cipher timing detonator, realize the intelligent timing controlled of Nonel detonator, improve security.
For achieving the above object, the present invention is achieved by the following technical solutions:
A kind of intelligent control circuit with cipher timing detonator, it is characterized in that comprising two cpu control circuits, hardware watchdog reset circuit, high pressure sample circuit, battery electric quantity measuring circuit, reference voltage generating circuit, charging control circuit and percussion control circuit, described pair of cpu control circuit comprises a CPU and two CPU of the 2nd CPU, connect by resistance between two CPU, by serial interface communication, and two CPU are coupled together by reset line; Described hardware watchdog reset circuit, high pressure sample circuit, battery electric quantity measuring circuit, reference voltage generating circuit link to each other with a CPU, and the control end of charging control circuit links to each other with a CPU, and the charging control end links to each other with the 2nd CPU; Described percussion control circuit comprises firing device, links to each other with a CPU.
Aforesaid intelligent control circuit with cipher timing detonator is characterized in that described hardware watchdog reset circuit is the watchdog reset chip.
Aforesaid intelligent control circuit with cipher timing detonator, it is characterized in that described high pressure sample circuit comprises voltage follower, resistance and the electric capacity of being made up of operational amplifier, the input of the described voltage follower of being made up of operational amplifier is connected with high-voltage charging voltage via behind resistance and the pressure filter circuit that electric capacity is formed, is connected with the input of a CPU behind the low pass filter that output is formed via resistance and electric capacity.
Aforesaid intelligent control circuit with cipher timing detonator, it is characterized in that described reference voltage generating circuit comprises reference voltage chip, resistance and electric capacity, cell voltage is connected with a CPU through the reference voltage chip, is connected to resistance that is used for dividing potential drop and the electric capacity that is used for filtering on the reference voltage chip.
Aforesaid intelligent control circuit with cipher timing detonator, it is characterized in that the battery electric quantity measuring circuit comprises voltage follower, resistance and the electric capacity of being made up of operational amplifier, the input of the described voltage follower of being made up of operational amplifier is connected with cell voltage via behind resistance and the pressure filter circuit that electric capacity is formed, is connected with the input of a CPU behind the low pass filter that output is formed via resistance and electric capacity.
Aforesaid intelligent control circuit with cipher timing detonator, it is characterized in that described charging control circuit comprises relay, oscillator and transistor circuit boost, the control end of relay is connected with a CPU, first common of relay is connected with battery, first Chang Kaiduan of relay is connected the oscillator that boosts with second common, and second Chang Kaiduan links to each other with the 2nd CPU by transistor circuit.
The invention has the beneficial effects as follows: intelligent control circuit with cipher timing detonator of the present invention is controlled respectively by two CPU, improved the reliability of circuit, during any one CPU cisco unity malfunction, all can not detonate, thereby high reliability and high security have been reached, when breaking down, any one CPU can reset by reset circuit, can measure exactly battery electric quantity, charging voltage, reference voltage, any one link does not reach when requiring, all can not detonate, prevent the quick-fried generation of mistake.Timing can be set by software, carries out countdown, charges after reaching certain hour again, has improved the reliability of detonating.
Description of drawings
Fig. 1 is the wiring schematic diagram of the two cpu control circuits among the present invention;
Fig. 2 is the wiring schematic diagram of the hardware watchdog reset circuit among the present invention;
Fig. 3 is the wiring schematic diagram of the high pressure sample circuit among the present invention;
Fig. 4 is the wiring schematic diagram of the reference voltage generating circuit among the present invention;
Fig. 5 is the wiring schematic diagram of the battery electric quantity measuring circuit among the present invention;
Fig. 6 is the circuit connection schematic diagram of the power connection part in the charging control circuit among the present invention;
Fig. 7 is the circuit connection schematic diagram that the charging control section in the charging control circuit among the present invention is divided.
The specific embodiment
Below in conjunction with accompanying drawing the present invention is done concrete introduction.
Since regularly initiation control circuit require to be perfectly safe, reliable and accurately, intelligent control circuit with cipher timing detonator of the present invention has adopted two CPU to realize highly reliable timing initiation control.Among the present invention, intelligent control circuit with cipher timing detonator is made up of two cpu control circuits, hardware watchdog reset circuit, high pressure sample circuit, battery electric quantity measuring circuit, reference voltage generating circuit, charging control circuit and percussion control circuit etc.Two cpu control circuit the one CPU U5 and two CPU of the 2nd CPU U7 connect by resistance between two CPU, by serial interface communication, and by reset line two CPU are coupled together.Hardware watchdog reset circuit, high pressure sample circuit, battery electric quantity measuring circuit, reference voltage generating circuit link to each other with a CPU U5, the control end of charging control circuit links to each other with a CPU U5, the charging control end links to each other with the 2nd CPU U7. and the percussion control circuit comprises firing device, links to each other with a CPUU5.
Specifically introduce control circuit of the present invention below in conjunction with embodiment.
Two cpu control circuits are cores of this control circuit, are responsible for the measurement and timing initiation control of entire circuit.Form by a CPU U5 and the 2nd CPU U7.Show as Fig. 1, communicate by serial line interface between a CPU U5 and the 2nd CPU U7.By linking to each other by resistance R 39 between the TXD pin on the RXD pin on resistance R 40, the CPU U5 and the 2nd CPU U7, guaranteed communication reliably between a CPU U5 and the 2nd CPU U7 between the RXD pin on TXD pin on the one CPU U5 and the 2nd CPU U7.Have only all operate as normal of a CPU U5 and the 2nd CPU U7, could the timing controlled detonation chain.
The hardware watchdog reset circuit is mainly in order to prevent the deadlock of a CPU U5 and the 2nd CPU U7, the CPU that can automatically reset, the operate as normal of assurance CPU.Circuit is made up of watchdog reset chip U1, and its circuit as shown in Figure 2.Link to each other by pin MISO, MOSI, SCK and CS between the one CPU U5 and the watchdog reset chip U1.During the one CPU U5 operate as normal, the reset pin RST of watchdog reset chip U1 exports high level.When a CPU U5 occur to crash, during cisco unity malfunction, the reset pin RST output low level of watchdog reset chip U1 is connected to the reset pin RST1 of a CPU U5, and a CPU U5 is resetted, and a CPU U5 restarts operation.The PB2 pin of the one CPU U5 is connected with the reset pin RST2 of the 2nd CPU U7, by programme-control the 2nd CPU U7 is resetted simultaneously after a CPU U5 resets, thereby guarantees the normal operation of two CPU.
The high pressure sample circuit is finished the measurement of high-voltage charging voltage, and when charging voltage reached certain voltage, control circuit began to detonate, and finishes shot.The high pressure sample circuit is used for judging whether charging arrives the voltage of percussion.Its circuit as shown in Figure 3, by operational amplifier U3, resistance R 33, R34, R35, compositions such as capacitor C 10, C15.V1 is the voltage of high-voltage charging, carry out the voltage follower that dividing potential drop and capacitor C 10 filtering input is made up of operational amplifier U3 by resistance R 34, R35, the low pass filter that output is formed by resistance R 33 and capacitor C 15, import the AD input ADC7 pin ADC7-U5 of a CPU U5 then, carry out voltage measurement.The pin ADC7 of the one CPU U5 inside has the AD sampling of 10 bit resolutions, can finish the measurement of voltage signal.
Reference voltage generating circuit produces the reference voltage of 2.5V as shown in Figure 4, supplies the reference voltage of the inside AD sampling of a CPU U5.Circuit is by resistance R 19, compositions such as capacitor C 5, C7 and reference voltage chip U2.Cell voltage V2 is connected with a CPU U5 through reference voltage chip U2, is connected to resistance R 19 that is used for dividing potential drop and capacitor C 5, the C7 that is used for filtering on reference voltage chip U2.Reference voltage generating circuit guarantees the precision of voltage measurement and stable correct, provides correct result to the correct judgement of the voltage that detonates, and has realized the high reliability of initiator.
The battery electric quantity measuring circuit is finished the measurement of battery electric quantity, and when battery electric quantity was lower than certain voltage, the reminding user to replace battery had guaranteed the normal use of initiator.Its circuit is as shown in Figure 5: by operational amplifier U3, and resistance R 21, R22, R17 and compositions such as capacitor C 4, C8.V2 is a cell voltage, carry out the voltage follower that dividing potential drop and capacitor C 4 filtering input is made up of operational amplifier U3 by resistance R 21, R22, the low pass filter that output is formed by resistance R 17 and capacitor C 8, import the AD input ADC6 pin ADC6-U5 of a CPU U5 then, carry out voltage measurement.The ADC6 pin of the one CPU U5 inside has the AD sampling of 10 bit resolutions, can finish the measurement of voltage signal.
Charging control circuit is the key that initiator is realized highly reliable and high safety, is made up of power connection, time-delay control, charging control section parallel circuit.The power connection partial circuit is made up of relay K 1, diode D1, electric capacity R10 and R28, triode Q8 etc. as shown in Figure 6.Behind the initiator trigger, a CPU U5 and the 2nd CPU U7 delay time respectively, are undertaken relay K 1 is controlled by a CPUU5 when delay time all arrives.Charge power supply is connected with the normally opened contact V2ON of relay K 1, and the common of relay K 1 is connected with cell voltage V2.When the pin PD2 of the one CPU U5 was high level, cell voltage V2 and pin Chang Kaiduan V2ON connected, and pin PD2 disconnects cell voltage V2 and Chang Kaiduan V2ON during for low level.When having only cell voltage V2 and Chang Kaiduan V2ON to connect, could charge to transformer T1.
Time-delay control is carried out software timer time-delay, the control of just charging respectively by a CPU U5 and the 2nd CPU U7 when delay time all arrives.The one CPU U5 is responsible for charge power supply and connects (as Fig. 6), and the 2nd CPU U7 is responsible for charging control.Charging is controlled as shown in Figure 7: be made up of resistance R 41, R42, R43, R24 and triode Q10, Q11 etc.The conducting of triode Q11 is controlled by the PB0 pin PB0-U7 of the 2nd CpU U7, when PB0 pin PBO-U7 is low level, and triode Q10 conducting, thereby also conducting of triode Q11, this is beginning CG ground connection often.Because pin COM succeeds the common port of electrical equipment K1, CG meets Chang Kaiduan.Therefore, when Fig. 6 repeat circuit K1 connects, pin COM and Chang Kaiduan CG conducting.Form the oscillator that boosts by Chang Kaiduan V2ON, pulse transformer T1, capacitor C 24, resistance R 44, diode D5, the triode Q13 that is connected with power supply, secondary boosting to about 700V is as the high voltage source of the usefulness of detonating.When pin PB0 is high level, forbid charging.This charging control circuit is controlled respectively by a CPUU5 and the 2nd CPU U7, has improved the reliability of circuit.The irregular working of any one CPU all can not be detonated.Thereby the high reliability of playing, high security.When charging voltage arrives certain voltage, detonate by the pin PD2 control percussion of a CPU U5 among Fig. 6.When pin PD2 for low level time percussion detonate.
The single-chip microcomputer that initiator adopts control circuit of the present invention to make adds the advanced control method of program, can realize numerous uses and management function, and its concrete function is as described below:
1, coded lock function
When loading onto the battery opening power, except that power lights is bright, can not carry out any operation, and must import the six unique figure place passwords that this machine had, by " affirmation " key, buzzer yowls one when the input password is correct, and display screen demonstrates the time, if password input error, the short ring of buzzer two does not demonstrate the time, need re-enter correct password and could continue operation.So just prevent maloperation and unexpected the generation, improved the security of using greatly.
2, the time is adjustable
After the time shows, if the time of feeling is improper, can directly press " minute " key, the adjustment time, whenever, after arriving the longest minute,, move in circles again by getting back to again the shortest minute by once increasing by one minute, be convenient to setting-up time.
3, regularly pull the trigger function
After the time is determined, just can be by " percussion " button, this moment, this machine was by determining that the good time enters the countdown state, time is unit with the second, constantly reduce, the flicker that also do not stop along with the minimizing of time of power supply indicator simultaneously reminds this machine of user to start, please leaves as early as possible, amber light is lighted in the middle of the time reduces to a half, when the time reduced to last 6 seconds, this machine entered charged state, and red light is lighted to electric capacity and charged, when the time reduces to zero, start the high-tension circuit discharge by control circuit by electronic switch, produce high tension spark, light primer in the detonator and finish the action of detonating by syringe needle.
4, storage memory function
This machine is whenever finished once-through operation and is ignited capital record respectively in memory, and can inquire about at any time.
5, voltage can be surveyed and the low-voltage warning function
For reliable initiation, this machine being provided with can be looked into the function of voltage, can inquire about at any time, and when voltage is low to might cisco unity malfunction the time, its can be reported to the police automatically, requires to change battery.
6, be convenient to the function of managing
If this machine unique password is forgotten, can give for change according to numbering by dealer or producer, or reset password.
The present invention is safe and reliable, and is easy to use, has boundless market prospects.
The foregoing description does not limit the present invention in any form, and all technical schemes that mode obtained of taking to be equal to replacement or equivalent transformation all drop in protection scope of the present invention.

Claims (6)

1. intelligent control circuit with cipher timing detonator, it is characterized in that comprising two cpu control circuits, hardware watchdog reset circuit, high pressure sample circuit, battery electric quantity measuring circuit, reference voltage generating circuit, charging control circuit and percussion control circuit, described pair of cpu control circuit comprises a CPU and two CPU of the 2nd CPU, connect by resistance between two CPU, by serial interface communication, and two CPU are coupled together by reset line; Described hardware watchdog reset circuit, high pressure sample circuit, battery electric quantity measuring circuit, reference voltage generating circuit link to each other with a CPU, and the control end of charging control circuit links to each other with a CPU, and the charging control end links to each other with the 2nd CPU; Described percussion control circuit comprises firing device, links to each other with a CPU.
2. intelligent control circuit with cipher timing detonator according to claim 1 is characterized in that described hardware watchdog reset circuit is the watchdog reset chip.
3. intelligent control circuit with cipher timing detonator according to claim 1, it is characterized in that described high pressure sample circuit comprises voltage follower, resistance and the electric capacity of being made up of operational amplifier, the input of the described voltage follower of being made up of operational amplifier is connected with high-voltage charging voltage via behind resistance and the pressure filter circuit that electric capacity is formed, is connected with the input of a CPU behind the low pass filter that output is formed via resistance and electric capacity.
4. intelligent control circuit with cipher timing detonator according to claim 1, it is characterized in that described reference voltage generating circuit comprises reference voltage chip, resistance and electric capacity, cell voltage is connected with a CPU through the reference voltage chip, is connected to resistance that is used for dividing potential drop and the electric capacity that is used for filtering on the reference voltage chip.
5. intelligent control circuit with cipher timing detonator according to claim 1, it is characterized in that the battery electric quantity measuring circuit comprises voltage follower, resistance and the electric capacity of being made up of operational amplifier, the input of the described voltage follower of being made up of operational amplifier is connected with cell voltage via behind resistance and the pressure filter circuit that electric capacity is formed, is connected with the input of a CPU behind the low pass filter that output is formed via resistance and electric capacity.
6. intelligent control circuit with cipher timing detonator according to claim 1, it is characterized in that described charging control circuit comprises relay, oscillator and transistor circuit boost, the control end of relay is connected with a CPU, first common of relay is connected with battery, first Chang Kaiduan of relay is connected the oscillator that boosts with second common, and second Chang Kaiduan links to each other with the 2nd CPU by transistor circuit.
CN2008101560378A 2008-09-26 2008-09-26 Intelligent control circuit with cipher timing detonator Expired - Fee Related CN101373128B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101615031B (en) * 2009-05-07 2011-05-04 浙江中控自动化仪表有限公司 Failure detection circuit of embedded dual processor system
CN105387776A (en) * 2015-12-11 2016-03-09 成都天博威科技有限公司 Control circuit for high-voltage excitation delay detonating
CN111290012A (en) * 2020-02-25 2020-06-16 四川美创达电子科技有限公司 Ignition control system for seismic source bomb

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4674047A (en) * 1984-01-31 1987-06-16 The Curators Of The University Of Missouri Integrated detonator delay circuits and firing console
US5157222A (en) * 1989-10-10 1992-10-20 Joanell Laboratories, Inc. Pyrotechnic ignition apparatus and method
US6082265A (en) * 1995-07-26 2000-07-04 Asahi Kasei Kogyo Kabushiki Kaisha Electronic delay detonator
US5912428A (en) * 1997-06-19 1999-06-15 The Ensign-Bickford Company Electronic circuitry for timing and delay circuits
CN201311252Y (en) * 2008-09-27 2009-09-16 张鑫浩 Intelligent password timing detonator control circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101615031B (en) * 2009-05-07 2011-05-04 浙江中控自动化仪表有限公司 Failure detection circuit of embedded dual processor system
CN105387776A (en) * 2015-12-11 2016-03-09 成都天博威科技有限公司 Control circuit for high-voltage excitation delay detonating
CN111290012A (en) * 2020-02-25 2020-06-16 四川美创达电子科技有限公司 Ignition control system for seismic source bomb

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Granted publication date: 20110907

Termination date: 20120926